HK1090471B

HK1090471B - Coaxial waveguide microstructures and methods of formation thereof

Info

Publication number: HK1090471B
Application number: HK06110925.3A
Authority: HK
Inventors: D．W．谢勒; J．J．费希尔
Original assignee: Nuvotronics, Inc.
Priority date: 2003-03-04
Filing date: 2004-03-04
Publication date: 2013-12-06

Description

Coaxial waveguide microstructure and method of forming the same

Cross reference to related applications

This application claims priority from U.S. provisional application No. 60/452,073 filed 3/4/2003 and 60/474,549 filed 5/29/2003 in accordance with 35u.s.c. 199(e), the entire disclosures of which are incorporated herein by reference.

Technical Field

The present invention relates generally to micromachining techniques and electronic devices. The present invention more particularly relates to coaxial waveguide microstructures and methods of forming these microstructures, and to electronic devices including these microstructures.

Background

Coaxial waveguide microstructures formed in a sequential build process are described, for example, in international application publication No. WO 00/39854 (WO' 854). Referring to fig. 1A, WO' 854 discloses a coaxial waveguide microstructure 100 formed in a sequential build process. The microstructure includes: an insulating substrate 102; a metal ground line 104 formed on the substrate 102, the ground line being spaced apart and divided into two parts; a metal bracket 106 formed on the surface of the insulating substrate between the divided ground lines 104; a signal line 108 for transmitting signals, which is located on the support 106; a ground wall 110 formed on the ground line; and a ground line 112 formed on the ground wall 110. Such coaxial waveguide microstructures have various disadvantages. For example, supporting the signal wires with metal brackets can cause reflections of the propagating waves to some extent, thereby creating signal interference. In addition, since, for example, a metal is required to be connected to the insulating substrate as a supporting means, the method cannot be easily adjusted to have a stacked structure of a predetermined plurality of coaxial layer structures. A stacked architecture is required when, for example, crossovers (crossovers) and for implementing complex distribution networks. In addition, the choice of substrate material is not flexible in this known structure, but is limited to insulating materials to achieve similar waveguide performance. In addition, the coaxial waveguide structure cannot be separated from the substrate due to the requisite mechanical attachment of the support to the substrate.

Coaxial waveguide microstructures formed in a sequential build process are described, for example, in international application publication No. WO 00/39854 (WO' 854). Referring to fig. 1A, WO' 854 discloses a coaxial waveguide microstructure 100 formed in a sequential build process. The microstructure includes: an insulating substrate 102; a metal ground line 104 formed on the substrate 102, the ground line being spaced apart and divided into two parts; a metal bracket 106 formed on the surface of the insulating substrate between the divided ground lines 104; a signal line 108 for transmitting signals, which is located on the support 106; a ground wall 110 formed on the ground line; and a ground line 112 and an air or vacuum core volume formed over the ground wall 110. Such coaxial waveguide microstructures have various disadvantages. For example, supporting signal wires with metal brackets may reflect propagating waves to some extent, thereby creating signal interference. In addition, this method cannot easily be adapted to overlapping structures having a plurality of predetermined coaxial layer structures, since for example a metal support needs to be attached to the insulating substrate as a support means. In addition, the substrate material cannot be flexibly selected, but is limited to an insulating material. In addition, the coaxial waveguide structure cannot be separated from the substrate due to the requisite attachment of the support to the substrate.

Figure 1B illustrates another coaxial waveguide microstructure disclosed in WO' 854. The microstructure 114 includes: a semiconductor substrate 114; first and second ground lines 118, 120; an insulating support 122 and a signal line 124. The semiconductor has a recess, and the first ground line is formed on a surface of the substrate and a surface of the recess. Thus, the signal line is formed almost flush with the surface of the semiconductor substrate. Thereby being easily connected with other connectors formed on the semiconductor substrate. However, this structure also has various disadvantages. For example, the process cannot be tailored to a multi-axial layer structure due to the need for a recessed substrate, the geometry of the waveguide structure, and the need to have a groove in the planar substrate to achieve the necessary planarization. Finally, it is not clear that the structure is self-supporting and thus removable from the substrate, which is useful in, for example, stacked coaxial networks.

There is therefore a need for improved methods for forming coaxial waveguide microstructures that overcome or substantially ameliorate one or more of the problems in the related art described above.

Summary of The Invention

According to a first aspect of the present invention, a coaxial waveguide microstructure is provided. The microstructure includes a substrate and a coaxial waveguide disposed on the substrate. The coaxial waveguide includes: a center conductor; an outer conductor including one or more walls, the outer conductor spaced from and disposed about the center conductor; one or more insulating support members for supporting the center conductor, the support members being in contact with the center conductor and enclosed within the outer conductor; and a core volume between the center conductor and the outer conductor, wherein the core volume is in a vacuum or gaseous state.

According to another aspect of the present invention, a method of forming a coaxial waveguide microstructure by a sequential build process is provided. The method comprises the following steps: (a) depositing a plurality of layers on a substrate, the layers comprising one or more of a metallic material, a sacrificial photoresist material, and an insulating material, thereby forming a structure on the substrate, the structure comprising: a center conductor; an outer conductor including one or more walls, the outer conductor spaced from and disposed about the center conductor; one or more insulating support members for supporting the center conductor, the support members being in contact with the center conductor and enclosed within the outer conductor; and a core volume between the center conductor and the outer conductor, wherein the core volume comprises a sacrificial photoresist; and (b) removing the sacrificial photoresist from the core volume.

Other features and advantages of the invention will be apparent to those skilled in the art upon review of the following specification, claims and drawings.

Brief Description of Drawings

The invention will be discussed with reference to the following drawings in which like reference numerals refer to like features and in which:

FIGS. 1A-B are cross-sectional views illustrating known coaxial waveguide microstructures;

FIGS. 2-13 are cross-sectional and top views illustrating a first exemplary coaxial waveguide microstructure at various stages of formation of the invention;

FIGS. 14-26 are cross-sectional and top views illustrating a second exemplary coaxial waveguide microstructure at various stages of formation according to the present invention;

FIGS. 27 and 28 are cross-sectional views each illustrating a plurality of first and second exemplary coaxial waveguide microstructures in a stacked configuration of the present invention;

FIGS. 29-31 are cross-sectional views illustrating exemplary waveguide microstructures in a stacked configuration and connected by vias in accordance with the present invention;

FIG. 32 illustrates two waveguides in the form of a single or power coupler according to the present invention;

FIGS. 33A-B illustrate exemplary structures of the present invention for transitioning between coaxial and non-coaxial waveguide microstructures;

FIG. 34 illustrates an exemplary waveguide microstructure of the present invention secured to a substrate by a flexible structure.

FIG. 35 illustrates an exemplary masking structure for preventing contamination of a coaxial waveguide microstructure according to the present invention.

FIGS. 36-38 illustrate various exemplary structures for interconnection of waveguide microstructures in accordance with the present invention;

fig. 39 illustrates an exemplary coaxial waveguide microstructure of the present invention with solder secured thereto.

Detailed Description

An exemplary process, which will be described below, includes a sequential build for making a microstructure that contains metal, insulation, and a gas or vacuum atmosphere. In the sequential build process, a structure of layers of various metals is formed sequentially by a prescribed method. When performing lithographic patterning and other optional processes, such as planarization techniques, flexible methods of forming various elements, such as for example suspended (suspended) coaxial waveguide microstructures, are provided.

The sequential build process is typically accomplished by one or more of the following processes: (a) metal coating, sacrificial photoresist coating, and dielectric coating processes; (b) surface planarization; (c) photoetching; and (d) etching or other layer removal. Electroplating techniques have been found to be particularly effective when depositing metals, but other metal deposition techniques, such as Physical Vapor Deposition (PVD) and Chemical Vapor Deposition (CVD) techniques, may also be employed. A typical sequential build process including electroplating techniques will be described below.

An optionally patterned, electrically conductive base or seed layer is formed at all locations where metal is to be plated. Patterning may be accomplished, for example, by selective deposition on a conductive base layer or seed layer, such as by shadow masking, etching the seed with a resist and etchant, or by applying a thin passivation, such as a thin permanent insulator, to the seed layer, as is known in the art of electroplating on seed layers. By coating and patterning, a photoresist pattern or mold is formed on the base or seed layer. The metal structure is then electroplated on all areas where the base or seed layer is exposed until the desired thickness is reached. The resulting structure is optionally planarized to eliminate significant thickness differences from subsequent processes performed.

One or more insulating layers may be deposited at desired points in subsequent processing. For example, if it is desired to plate metal on the exposed insulating material in a subsequent plating step, the insulating layer may be formed prior to forming the seed layer; or if it is desired to prevent electroplating on the exposed insulating material, the insulating layer is formed after the seed layer is formed. The insulating layer may be formed by, for example, spin coating and patterning of an insulator. This technique is useful when the patterned layer does not adversely affect the protective layer formed thereon, such as when the patterned insulator has a thickness (e.g., a few microns) that is significantly less than the thickness (e.g., 100 microns) of the protective layer formed thereon. Another technique for forming insulating features involves pre-patterning the base or seed layer in a manner such that after the protective pattern/mold is formed, metal is not formed in some areas of the base layer, but rather leaving voids that may be subsequently filled with insulating material. In this case, the insulating material is typically filled to the level of or above the resist mold and planarized with the protective layer and any metal to create a planar layer before the next subsequent process begins.

When all of the structural layers have been fabricated, the sacrificial protective film is removed from the structure, leaving other materials, including the insulator, in place. This can be accomplished by using solvents or developers in which the protective film is soluble, while other materials are insoluble or relatively insoluble. Optional finishing steps such as chemical polishing and/or outer coating may be required.

The method and apparatus of the present invention will next be described with reference to fig. 2-13, which show cross-sectional and top views of exemplary coaxial waveguide microstructures, various stages of formation, in accordance with an aspect of the present invention. These coaxial waveguides can efficiently transmit Radio Frequency (RF) energy, e.g., several MHz to 100GHz or higher, such as millimeter waves and microwaves, as well as DC signals.

Referring to fig. 2, the waveguide is formed on a substrate 2, and the substrate 2 may be, for example, a ceramic, a semiconductor, a metal, or a polymer. The substrate may be, for example, a printed circuit board or a semiconductor substrate, such as a silicon wafer or a gallium arsenide wafer. The coefficient of expansion of the substrate may be similar to the material used to form the waveguide and should be selected so as to maintain its integrity during the formation of the waveguide. In addition, the surface of the substrate 2 on which the waveguide is formed is generally planar. The surface of the substrate may be, for example, lapped and/or polished to achieve a high degree of planarity. The surface of the formed structure may be planarized prior to or after formation of any layers in the process. Conventional planarization techniques are typically used, such as Chemical Mechanical Polishing (CMP), lapping, or a combination of these methods. Other known planarization techniques, such as mechanical finishing, e.g., machining, diamond turning, plasma etching, laser ablation, etc., may also or alternatively be used.

A base layer 4 is deposited on the substrate 2 to form the bottom wall of the waveguide outer conductor in the final waveguide structure. The base layer 4 may be formed of a highly conductive material such as a metal or metal alloy (collectively referred to as "metal"), for exampleCopper, nickel, aluminum, chromium, gold, titanium, and alloys thereof; a doped semiconductor material; or combinations thereof, such as multiple layers of these materials. The base layer 4 is deposited by conventional techniques such as plating, e.g. electroplating or electroless plating, Physical Vapor Deposition (PVD), e.g. sputtering, or Chemical Vapor Deposition (CVD). Plated copper is considered particularly suitable for use as a base material, and these techniques are well understood in the art. The plating film may be formed by, for example, a chemical method using a copper salt and a reducing agent. Suitable Materials are commercially available, including, for example, CIRCUOSIT available from Rohm and Haas Electronic Materials, L.L.C., Marlborough, MA.^TMAnd (4) electroless copper. Alternatively, these metals can be plated using a conductive seed layer followed by electroplating. Suitable electrolytic Materials are commercially available, including, for example, COPPER GLEAM available from Rohm and Haas Electronic Materials, L.L.C^TMAnd (5) acid coating the film product. It is also possible to use an activated catalyst followed by electrodeposition. The substrate (and subsequent layers) are patterned into the appropriate geometry by the outlined methods to produce the desired device structure.

The thickness of the base layer (and other walls of the waveguide outer conductor that are subsequently formed) is selected to provide mechanical stability to the waveguide and sufficient conductivity for electrons moving through the waveguide. At very high frequencies, the effects of structure and thermal conductivity become more pronounced, with skin depths typically less than 1 micron. The thickness will thus depend on, for example, the particular substrate material, the particular frequency to be transmitted, and for which purpose. For example, where the final structure is to be removed from the substrate, it may be beneficial to use a thicker base layer, for example from about 20-150 microns or 20-80 microns, for structural integrity. Where the final structure is to be held in contact with the substrate, a thinner base layer is required, as determined by the surface depth requirements for the frequency used. The base layer 4 may then optionally be planarized using the techniques described above.

Referring to fig. 3, a photoresist layer 6 is deposited on the base layer 4, exposed and developed to form a pattern 8 for subsequent deposition of lower sidewall portions of the waveguide outer conductor.The pattern 8 comprises two parallel trenches in the protective layer exposing the top surface of the base layer 4. Conventional photolithography steps and materials may be used for this purpose. The protective layer can be a positive or negative protective layer, such as the Shipley BPR available from Rohm and Haas electronic materials, L.L.C^TM-100、PHOTOPOSIT^TMSP or PHOTOSIT^TMSN; or dry sheets such as LAMINARTM dry sheets also available from Rohm and Haas Electronic Materials, L.L.C.

As shown in fig. 4, the lower sidewall portion 10 of the waveguide outer conductor is next formed. The materials and techniques suitable for forming the sidewalls are the same as described above for the base layer. The sidewalls are typically formed of the same material as the base layer 4, but a different material may be used. In the coating process, the seed layer or the coating base (base) can be omitted, in which case the metal is applied directly in a subsequent step only to the previously formed, exposed metal regions. It should be understood, however, that the exemplary structures shown in the figures typically form only a small portion of a particular device, and that metallization of these or other structures may begin at any layer in subsequent processing, in which case a seed layer is typically used.

A surface planarization treatment may be performed at this stage to remove unwanted metal deposited on the surface of the protective layer in addition to providing a flat surface for subsequent steps. By surface planarization, the total thickness of a particular layer can be more tightly controlled than the layer thickness achieved by coating alone. The metal and protective layers may be planarized to the same extent, for example using a CMP process, and then, for example, a planarization step may be performed which slowly removes the metal, protective film and any insulator at the same rate, thereby better controlling the final thickness of the layer.

As shown in fig. 5, a supporting layer 12 of insulating material is next deposited on the protective layer 6 and the lower sidewall portions 10. In subsequent processing, the support structure is patterned from the support layer 12 to support the waveguide center conductor to be formed. Since these structures will be located in the core region of the final waveguide structure, the support layer 12 should be formed of a material such that the pair of support structures pass throughThe energy transmitted by the waveguide does not produce excessive losses. Such materials should also be capable of providing the required mechanical strength for supporting the center conductor and should be relatively insoluble in the solvents used to remove the sacrificial protective film from the final waveguide structure. The support layer 12 is typically made of an insulating material selected from the group consisting of: inorganic materials, e.g. silica and silica, SOL gels, various glasses, silicon nitride (Si)₃N₄) Alumina (Al)₂O₃) Like alumina, aluminum nitride (AlN), and magnesium oxide (MgO); organic materials such as polyethylene, polyester, polycarbonate, cellulose acetate, polypropylene, polyvinyl chloride, polyvinylidene chloride, polystyrene, polyamide, and polyimide; organic-inorganic hybrid materials, such as organosilsesquioxane materials; photodefinable insulators, such as photoresists which can be used as side effects or photoring oxygen compounds which are not attacked by the sacrificial resist removal process to be carried out. Materials that can be conveniently deposited by spin coating, roll coating, spray coating, Chemical Vapor Deposition (CVD), or lamination are suitable. The support layer 12 is deposited to a thickness to provide the necessary support for the center conductor without cracking or breaking. In addition, from a planarity standpoint, the thickness should not have a significant effect on the subsequent application of the protective layer.

Referring to fig. 6, the support layer is next patterned using standard photolithography and etching techniques to provide a plurality of conductor supports 12'. A plurality of conductor supports 12' may be associated with both lower sidewall portions 10. One end of each leg is formed on one or other of the lower sidewall portions 10 and the other end extends to a position between the sidewall portions 10 above the protective layer 6. The brackets 12' on each side wall section are spaced from each other, the spacing being generally fixed. Those on one side wall portion are generally offset from those on the opposite side wall portion so as not to be directly opposite. In another embodiment, the bracket member 12' may extend from one sidewall portion 10 to the other. The number, shape and arrangement of the legs 12' should provide support for the center conductors while preventing excessive signal loss. In addition, the shape and periodicity or aperiodicity should be selected to prevent reflection at frequencies where low loss transmission is desired, which can be calculated using methods known in the art of manufacturing bragg gratings or filters, unless such functionality is desired.

Referring to fig. 7, a protective layer 6' is deposited on the substrate and exposed to light and developed to form patterns 14 and 16 for subsequent deposition on the intermediate sidewall portions of the outer conductor and the central conductor of the waveguide, respectively. The pattern of the intermediate sidewall portions comprises two grooves coextensive with the two lower sidewall portions 10. The ends of the lower sidewall portions 10 and the conductor supports 12' that are above the lower sidewall portions are exposed by the pattern 14. The pattern 16 for the center conductor is a trench parallel to and between the two intermediate sidewall patterns, exposing opposite ends of the conductor support 12' portion and the support portion. Conventional photolithography steps and materials as described above may be used for this purpose.

As shown in fig. 8, the intermediate sidewall portions 18 of the outer and central conductors 20 are next formed by depositing a suitable material into the trenches formed by the protective layer 6'. Suitable materials and techniques for forming the intermediate sidewall portions 18 and central conductor 20 are the same as those mentioned above for the base layer 4 and lower sidewall portions 10, but different materials and/or techniques may be used. As previously described, a surface planarization treatment may optionally be performed at this stage to remove unwanted metal deposited on the surface of the protective layer, in addition to providing a flat surface for subsequent steps, and optionally applied to any or all of the layers.

Referring to fig. 9, a protective layer 6 "is deposited on the substrate and patterned by exposure and development 22 for subsequent deposition of upper sidewall portions of the outer conductor. The pattern 22 for the intermediate side wall portions comprises grooves coextensive with the two intermediate side wall portions 18. Conventional photolithography steps and methods as described above may be used for this purpose.

As shown in fig. 10, the upper sidewall portions 24 of the outer conductor are next formed by depositing a suitable material into the trenches formed by the protective layer 6 ". Suitable materials and techniques for forming the upper sidewall are the same as those mentioned above for the base layer and other sidewall portions. The upper sidewalls 24 are typically formed of the same materials and techniques used to form the base layer and other sidewalls, although other materials and/or techniques may also be used. Surface planarization is optionally performed at this stage to remove any unwanted metal deposited on the surface of the protective film, in addition to providing a flat surface for subsequent processing.

Referring to fig. 11, the protective layer 6 is formedDeposited on the substrate and exposed and developed to form a pattern 26 for subsequent deposition of the top wall of the waveguide outer conductor. The pattern 26 for the top wall exposes the upper side walls 24 and portions therebetween. Optionally, a protective layer 6Can also create one or more protective layers 6 between the upper sidewall portions 24The area of (a). These remaining portions may be in the form of, for example, protective layer pillars (pilars) 31. Will prevent the outer conductor top wall from remaining protective layer 6 in these regionsSubsequent deposition of the regions. As described in more detail below, this results in an opening in the top wall of the outer conductor that is deposited last, making the protective film on the final structure easier to remove.

As shown in fig. 12, a top wall 28 of the outer conductor is next formed by depositing a suitable material in the exposed area above and between the upper sidewall portions 24. It can be seen that deposition over the volume occupied by the protective layer pillars 31 and the protective layer pillars 31 is avoided. Suitable materials and techniques for forming the top wall are the same as those mentioned above for the base and sidewall portions. Top wall 28 is typically formed of the same materials and techniques used to form the base layer and other sidewalls, although other materials and/or techniques may also be used. Surface planarization may optionally be performed at this stage.

The basic structure of the waveguide is completed and then additional layers are added or the remaining protective layer in the structure is removed. The protective film may be removed by a known solvent or mold release agent depending on the type of protective film used. In order to remove the protective film from the structure, the solvent must be in contact with the protective film. The protective film is exposed at the end face of the waveguide structure. Additional openings as described above with respect to fig. 11-12 may also be provided in the waveguide to facilitate contact of the solvent with the protective film throughout the structure. Other configurations for contacting the protective film with the solvent are contemplated. For example, openings may be formed in the waveguide sidewalls during the patterning process. The size of these gaps can be selected to minimize interference, scattering, or leakage of the guided waves. These dimensions may be selected, for example, to be 1/8 or 1/10 less than the highest frequency wavelength used.

Fig. 13 shows the final waveguide structure 32 after the sacrificial protective layer is removed. The space previously occupied by the sacrificial protective layer, within the outer walls of the waveguide, forms the waveguide core 30. This volume is typically occupied by air. However, it is also contemplated that a gas having better insulating properties than air may be used in the core, or that a vacuum be created therein, for example when the structure forms part of a hermetic package. As a result, the absorption of water vapor that would otherwise adsorb to the waveguide surface can be reduced.

It should be noted that the coaxial waveguide microstructures described above are exemplary and other configurations are contemplated. For example, fig. 14-26 illustrate additional exemplary waveguide structures that employ different center conductor support structures. The description above with respect to fig. 2-13 can generally be applied to this embodiment, with the differences listed below.

As shown in fig. 15, the conductor support member is formed by depositing a passivation layer 9 on the base layer 4. The passivation layer is a material over which the conductor material forms the waveguide walls, but on which the conductor is not deposited. Suitable materials for the passivation layer include, for example, photodefinable insulators such as negatively acting photoresists or photocyclic oxygen compounds that are not attacked by the sacrificial resist removal process to be performed. The passivation layer may also be a thinner form of structural insulator used to fill the gap in subsequent steps. The passivation layer may be formed by known methods such as spin coating, roll coating, or vapor deposition.

The passivation layer 9 is then patterned using standard photolithography (for photodefinable compositions) or photolithography and etching techniques to form a passivation layer 9 ', on which passivation layer 9' a central conductor support is to be formed, as shown in fig. 16.

Referring to fig. 17, a photoresist layer 6 is deposited over the base layer 4 and passivation layer 9 'and exposed and developed to form parallel grooves 8 for subsequent deposition of waveguide lower sidewall portions as described above, and windows 11 over the passivation layer 9' over which the conductor supports are to be formed. The lower sidewall portion 10 of the waveguide is then formed as described above, as shown in fig. 18.

Next, an insulating material is deposited on the substrate surface. The insulating material may be those of the first exemplary waveguide microstructure support structure described above. This material may be blanket deposited over the entire surface of the substrate and then planarized, for example by CMP, as shown in fig. 19, filling the insulating material 12 'over the exposed passivation material 9' and confined to those areas. Alternatively, the insulating material may be selectively deposited in those areas by known techniques such as spin coating, screen printing, resist plating, or vapor deposition.

Referring to fig. 20, after the seed layer has been deposited as a plating base, a resist layer 6' is deposited on the substrate and exposed and developed to form patterns 14 and 16 for subsequent deposition of the intermediate sidewall portions and central conductor of the waveguide, respectively, as described above.

As shown in fig. 21, the intermediate sidewall portions 18 and central conductor 20 of the waveguide are next formed by depositing a suitable material into the recesses formed by the protective film. As shown, a center conductor 20 is formed on the conductor support 12'. As shown in fig. 22-26, the waveguide structure is completed as described above according to the previous exemplary embodiment.

For some applications it may be desirable to remove the final waveguide structure from the substrate to which it is bonded. This enables the separate interconnect network to be coupled on both sides to another substrate, such as a gallium arsenide die connection of a monolithic microwave integrated circuit or other device. The structure may be removed from the substrate by a variety of techniques, such as by using a sacrificial layer between the substrate and the base layer, which may be removed in a suitable solvent after the structure is fabricated. Suitable materials for the sacrificial layer include, for example, photoresists, high temperature waxes, and various salts.

Fig. 27 and 28 are cross-sectional views illustrating a plurality of first and second exemplary coaxial waveguide microstructures, respectively, in a stacked arrangement 34. The arrangement of the stack may be accomplished by: by a succession of sequential build processes for each stack, or by operating the waveguides on separate substrates, separating the waveguides from the respective substrates with a separating layer, and stacking the structures. In theory, there is no limit to the number of waveguides that can be stacked using the process steps discussed herein. However, in practice, the number of layers will be limited by the following factors: control of thickness and stress, and removal of protective films associated with each additional layer. Since adjacent waveguides may share sidewalls, the space utilization of the waveguides may be very high. Although the waveguides illustrated are parallel, other designs are also contemplated, such as any planar geometry, such as those that result in splitting devices, combining devices, circulating devices, branching networks, and the like. Thereby angling the waveguides to each other to create curvature in their plane to reduce losses.

Fig. 29-31 illustrate some exemplary structures for coupling waveguide cores of different heights together using vias. In these exemplary embodiments, a pattern is formed on a surface or portion of the outer conductor wall region of the various waveguides, exposing an opening between two adjacent waveguides. The waveguide cores may be connected by vias made from both the sidewalls and the top surface. In these examples, the vias shown in part AA may be fabricated in three or more plating steps, excluding the waveguide core layer. Other methods of coupling between layers may also be used, such as fabricating multiple steps or stages or fabricating a coupler as described with reference to FIG. 32.

Fig. 30 illustrates a stub (stub) that produces a transition to a hollow waveguide ending in an opening or hole to free space or other device outside the waveguide network. Such a stub may be designed to effectively convert between, for example, a square waveguide and a coaxial transmission mode. This structure forms the basis for the manufacture of an antenna or a radiator.

Fig. 31 shows a tapered structure that can be fabricated in one or more steps or by machining or machining using a grey scale protective film (grey scale resist). Such a tapered structure can be used to match the impedance in the hollow waveguide and also to concentrate incoming signals or waves from free space to the stub.

According to another exemplary aspect of the invention, the structure may include a structure formed from a photosensitive insulating polymer layer, such as a protective layer that is metallized on a surface thereof. In this case, the thickness of the plated metal may be determined by the skin depth requirement of the selected metal at the operating frequency, for example, in typical applications, from about 0.2 to about 3 microns. Additional thickness and other metal structures such as posts (posts) may be included for other reasons, such as heat transfer from any integral active device.

The cross-section of the waveguide of the present invention is generally square. However other shapes are also contemplated. Other rectangular waveguides can be obtained, for example, by the same method as forming square waveguides, except that the length and width of the waveguides are made different. Circular waveguides, e.g., circular or partially circular waveguides, may be formed by gray scale patterning. These circular waveguides can be fabricated, for example, by conventional lithography for vertical switching, and can also be used to more conveniently connect with external micro-coaxial conductors, to fabricate connector interfaces, and the like.

Fig. 32 illustrates two parallel waveguide cores 40, 42 brought into close proximity to each other so that the common outer conductor sidewall 44 between them gradually, but momentarily, disappears at a predetermined distance and then reappears. This structure forms a gap 46 on the sidewalls. Removal of the sidewall portions over a predetermined distance provides for controlled coupling between the waveguides. Within the gap 46, cross talk can occur between the RF signals of one core and the adjacent core. This geometry allows the fabrication of components such as RF splitting devices and attenuators, which can be used with waveguides with or without center conductors. With this structure, the amount of coupling required can be accurately controlled, and thus the desired splitting ratio can be more easily achieved. Well-defined beam splitting and coupling devices are highly desirable for the fabrication of tip RF and microwave networks. More than one controllable perforation in the wall between the waveguides can be selectively utilized for the same purpose. The desired effect can be optimized using, for example, offset (offsetting) center conductors, varying outer waveguide dimensions in the region of the coupling device, and other structural changes. In some applications it may be desirable to include one or more of coaxial and hollow type waveguides on the same substrate. Fig. 33A-B illustrate exemplary transition structures for connecting a coaxial waveguide 48 to a hollow transmission waveguide 50. This conversion can be accomplished by methods known in the art, such as fabricating a center conductor probe in which one or more coaxial-type waveguides terminate with a stub into the interior of the hollow-type waveguide structure. These transitions may occur between layers or within layers. The distance d between the wall and the stub can be adjusted to maximize the efficiency of these radiators.

Depending on the particular material used for the waveguide structure and the substrate to be coupled to the structure, it may be desirable to provide a compliant or compliant interface between the two to compensate for Coefficient of Thermal Expansion (CTE) mismatches. This may take the form of, for example, flexible fingers or posts perpendicular to the substrate or contact surface with narrow gaps between the fingers or posts to achieve the desired flexibility and pliability. Other techniques include, for example, flexible and conductive bumpers, springs, and rings connected by posts or flex circuits. Fig. 34 illustrates a flexible interface in the form of a spring structure 52 connecting the waveguide 32 to the substrate 2.

Using this technique, the first layer built on the substrate can be, for example, a series of center conductors surrounded by annular or rectangular springs whose rings are spaced less than 1/4 waves apart and connected to one or more spaced apart posts between the rings. Also the rings can be made to be connected by stubs with a spacing between them that is typically less than 1/4, for example less than 1/10, of the wavelength of the highest frequency required, so that the two in the connector are flexible with a spring-like vertical connection, helping to handle the Coefficient of Thermal Expansion (CTE) mismatch between these layers and other materials such as silicon and gallium arsenide.

The walls of the waveguide may optionally be made discontinuous. These walls may be made of, for example, interconnected passages, posts, spirals, or springs having elements that are separate from one another, thereby minimizing or preventing losses at desired frequencies. This distance is typically less than 1/4 for the wavelength at the desired operating frequency, such as less than 1/10 for the wavelength. The above may also optionally be used in combination with a continuous wall. For example, the top and bottom walls may be planar, with the vertical surfaces being comprised of interconnected passages. These wall structures may optionally be used throughout the interconnected substrates. Other advantages of the discontinuous wall structure include one or more of the following: the ability to fabricate flexible structures that better handle CTE mismatch of the integrated mold or substrate, better removal of the protective layer from the substrate, and the ability to obtain liquid flow in and out of the substrate, better tailoring of handling performance, and flexibility in interconnections and connectors.

Referring to fig. 35, a dielectric cap layer or film 54 may optionally be formed on the end faces of the waveguide microstructures to protect the waveguides from dirt and other contaminants, or on the top or bottom surfaces as a dielectric platform for hybrid mounting of the device. In the exemplary structure, the cap layer 54 covers the outer periphery of the center conductor end surface and the inner periphery of the outer conductor end surface to achieve electrical and thermal continuity while also protecting the waveguide from contamination. The cap layer may be formed by depositing a material, such as by spin coating, and patterning the remaining photoimageable insulating layer. The material may be, for example, a photopatternable (photopatternable) polymer that is relatively insoluble in the medium used to remove the protective film from the final structure, such as a photoresist. Vent holes (not shown) may also be provided in the cap layer to prevent stress therein and to help dissolve away the resist in the core volume.

It may be desirable to connect multiple waveguide structures together or to connect waveguide structures to other structures, for example, as temporary connections when testing waveguide structures or replacing components when mating wafers or devices (e.g., RF devices such as microwave integrated circuit devices, microwave components, or other surface mount components). Many interlocking geometries may be used to connect the waveguide to other waveguides or other components. For example, overlapping tubes, tubes and pins, slots and buttons for the outer and inner conductors, if any, may be used for this purpose. Fig. 36-38 illustrate three exemplary interlocking connection configurations. Fig. 36-37 illustrate two slot and peg attachment configurations. Fig. 38 shows an overlapping tube connection structure in which a waveguide 56 has a flared portion 58 at one end portion thereof so that the flared portion can slide over an end portion of a waveguide 60. The connection may be friction fit, welded, and/or secured with other adhesive materials. These structures may be formed during fabrication of the waveguide using standard photolithography techniques.

As shown in fig. 39, a thin layer of solder 62 may be deposited by known methods, such as by electroplating or evaporation to facilitate bonding of passive or active devices to the waveguide, or to bond the waveguide structure to a different substrate. The solder may be deposited on any vertical or horizontal exposed surface before or after the photoresist is removed from the waveguide core volume.

It may also be desirable to coat the inner walls of the waveguide outer conductor and/or the center conductor with a metal selected to have low losses at the frequencies used, such as gold, nickel, copper, nickel iron, palladium, platinum or gold or a combination of these metals, such as nickel and gold. This may be accomplished, for example, by a plating process after the sacrificial protective film is removed from the waveguide structure.

In some applications, it may be desirable to form electrical leads in the substrate, or to form holes or structures in the substrate that aid in the transmission and reception of propagating waves, similar to the structure shown in FIG. 31. The features may be formed on the substrate by, for example, machining or other known patterning techniques. For example, it is contemplated that a horn antenna may be mounted on a substrate, such as shown in FIG. 25, by anisotropically etching a recess and then metallizing. The metallizing step may be performed in a subsequent build process along with other steps.

While the invention has been described in detail with reference to specific embodiments thereof, it will be apparent to one skilled in the art that various changes and modifications can be made, and equivalents employed, without departing from the scope of the invention.

Claims

1. A coaxial waveguide microstructure, comprising:

a substrate; and

a plurality of coaxial waveguides disposed in a stack on a substrate, each waveguide comprising:

a center conductor;

an outer conductor comprising one or more walls, the outer conductor spaced from and disposed about the center conductor;

one or more insulating support members for supporting the center conductor, the support members being in contact with the center conductor and encapsulated within the outer conductor; and

a core volume between the center conductor and the outer conductor, the core volume being in a vacuum or gaseous state.

2. The coaxial waveguide microstructure of claim 1, wherein the plurality of coaxial waveguides are connected together by one or more vias.

3. A coaxial waveguide microstructure, comprising:

a substrate; and

a coaxial waveguide disposed on a substrate, the waveguide comprising:

a center conductor;

an outer conductor including one or more walls, the outer conductor spaced from and disposed about the center conductor, the one or more walls including a first sidewall and a second sidewall opposite the first sidewall;

a plurality of insulating support members for supporting the center conductor, the support members being in contact with the center conductor and being enclosed within the outer conductor, the plurality of insulating support members having first end portions embedded in the first side walls and extending below the center conductor, a plurality of second insulating support members having first end portions embedded in the second side walls and extending below the center conductor; and

4. A coaxial waveguide microstructure, comprising:

a substrate;

a coaxial waveguide disposed on the substrate, the coaxial waveguide comprising:

a center conductor;

a core volume between the center conductor and the outer conductor, the core volume being in a vacuum or gaseous state,

the center conductor and the outer conductor comprise copper or a copper alloy and include at least one of a gold and a nickel coating.

5. A coaxial waveguide microstructure, comprising:

a substrate;

a center conductor;

a sacrificial separation layer between the substrate and the waveguide.

6. A coaxial waveguide microstructure, comprising:

a substrate;

a center conductor;

a connector structure of the waveguide end section.

7. The coaxial waveguide microstructure of claim 6, wherein the connector structure comprises a slot structure, a button structure, or a horn structure.

8. A coaxial waveguide microstructure, comprising:

a substrate;

a center conductor;

a flexible interface means between the substrate and the waveguide for compensating for the CTE mismatch therebetween.

9. A coaxial waveguide microstructure, comprising:

a substrate;

a center conductor;

and the insulating film is positioned on the end face of the waveguide and extends from the central conductor to the outer conductor.

10. A method of forming a coaxial waveguide microstructure by a sequential build process, comprising:

(a) depositing a plurality of layers on a substrate having a planar region, wherein the layers comprise one or more of a metallic material, a sacrificial photoresist material, and an insulating material, thereby forming a structure on the substrate, the structure comprising:

a center conductor;

an outer conductor including one or more walls, the outer conductor spaced from the central conductor and disposed about the central conductor, each outer conductor wall disposed on the planar region;

one or more insulating support members for supporting the center conductor, the support members being in contact with the center conductor and enclosed within the outer conductor;

and a core volume between the center conductor and the outer conductor, wherein the core volume comprises a sacrificial photoresist; and

(b) the sacrificial photoresist is removed from the core volume.

11. The method of claim 10, further comprising (a) planarizing one or more layers by chemical mechanical planarization, buffing, or a combination thereof.

12. The method of claim 10, wherein the outer conductor includes a first sidewall, and wherein the plurality of second insulative support members have a first end portion embedded in the first sidewall and extend below the center conductor.

13. A method of forming a coaxial waveguide microstructure by a sequential build process, comprising:

(a) depositing a plurality of layers on a substrate, wherein the layers comprise one or more of a metallic material, a sacrificial photoresist material, and an insulating material, thereby forming a structure on the substrate, the structure comprising:

a center conductor;

an outer conductor comprising one or more walls, the outer conductor spaced from the center conductor and disposed about the center conductor;

and a core volume between the center conductor and the outer conductor, wherein the core volume comprises a sacrificial photoresist;

(b) removing the sacrificial photoresist from the core volume, and (b) thereafter,

(c) the core volume is evacuated to a vacuum.

14. A method of forming a coaxial waveguide microstructure by a sequential build process, comprising:

a center conductor;

(c) separating the substrate from the structure.

15. A method of forming a coaxial waveguide microstructure by a sequential build process, comprising:

a center conductor;

(b) removing the sacrificial photoresist from the core volume, an

(c) Planarizing one or more layers in (a) by chemical mechanical planarization.

16. A coaxial waveguide microstructure comprising:

a substrate having a planar region; and

a center conductor;

an outer conductor comprising one or more walls spaced from and disposed about the central conductor, each of the outer conductor walls being distributed over the planar region;

a core volume between the center conductor and the outer conductor, the core volume being in a vacuum or gaseous state;

an active device.

17. The coaxial waveguide microstructure of claim 16, wherein the active device is bonded to the waveguide.

18. The coaxial waveguide microstructure of claim 16, wherein the outer conductor comprises a first sidewall, and wherein the plurality of dielectric support members have a first end portion embedded in the first sidewall.

19. The coaxial waveguide microstructure of claim 16, wherein the one or more dielectric support members are in the form of support posts having a first end on an inner surface of the outer conductor and a second end in contact with the center conductor.

20. The coaxial waveguide microstructure of claim 16, wherein the coaxial waveguide has a generally rectangular coaxial structure.

21. The coaxial waveguide microstructure of claim 16, wherein the substrate is a semiconductor substrate.

22. The coaxial waveguide microstructure of claim 21, wherein the semiconductor substrate is a silicon substrate.

23. The coaxial waveguide microstructure of claim 21, wherein the semiconductor substrate is a gallium arsenide substrate.

24. A coaxial waveguide microstructure, comprising:

a substrate;

a plurality of coaxial waveguides disposed in a stack on the substrate, each waveguide comprising:

a center conductor;

one or more insulating support members for supporting the center conductor, the support members being in contact with the center conductor and encapsulated within the outer conductor;

an active device.

25. The coaxial waveguide microstructure of claim 24, wherein the active device is bonded to the waveguide.

26. The coaxial waveguide microstructure of claim 24, wherein the outer conductor comprises a first sidewall, and wherein the plurality of dielectric support members have a first end portion embedded in the first sidewall.

27. The coaxial waveguide microstructure of claim 24, wherein the one or more dielectric support members are in the form of support posts having a first end on an inner surface of the outer conductor and a second end in contact with the center conductor.

28. The coaxial waveguide microstructure of claim 24, wherein the via connects a plurality of coaxial waveguides together.

29. The coaxial waveguide microstructure of claim 24, wherein the substrate is a semiconductor substrate.

30. The coaxial waveguide microstructure of claim 29, wherein the semiconductor substrate is a silicon substrate.

31. The coaxial waveguide microstructure of claim 29, wherein the semiconductor substrate is a gallium arsenide substrate.

32. A hermetic package, comprising:

a coaxial waveguide microstructure, the coaxial waveguide microstructure comprising:

a substrate;

a center conductor;

an outer conductor including one or more walls, the outer conductor spaced from and disposed about the center conductor;

an active device.

33. The sealed package of claim 32, wherein said active device is bonded to a waveguide.

34. The hermetic package of claim 32 wherein the substrate is a semiconductor substrate.

35. The package of claim 34 wherein the semiconductor substrate is a gallium arsenide substrate.