HK1086669B - Structured silicon anode - Google Patents

Description

Structured silicon anode

Technical Field

The present invention relates to structured silicon anodes for lithium battery applications.

Background

In lithiumIn battery applications, it is believed that silicon may be the high energy per unit volume host material for lithium¹. Attempts to achieve this possibility have only been partially successful when using nanocomposites of silica powder and carbon black². The main technical problem related to the use of silicon/lithium is represented by the mechanical failure due to the repeated large volume expansion corresponding to alloying^1c，3. Unlike layer materials such as graphite, metallic and intermetallic anode host materials are disclosed to break down after several lithium intercalation/deintercalation cycles^3，4Unless it is in the form of a fine powder (submicron range). Since it is of interest to find ways to integrate lithium batteries onto silicon chips, there is a need to find solutions to this material problem. It is envisaged that the main application area of lithium batteries integrated on a chip will be in the medical field. Thus, developing better cochlear implant implementations would seem to benefit from a range of integrated battery power⁵。

Disclosure of Invention

The aim of the invention is to create the possibility of a silicon lithium system which makes it possible to integrate lithium batteries on a silicon chip. Accordingly, the present invention provides an integrated silicon electrode for a battery, the electrode comprising a regular or irregular array of sub-micron silicon structures formed on a silicon substrate, and a method of forming sub-micron silicon electrode structures on a silicon wafer. Preferably, these structures comprise pillars. More preferably, the sub-micron silicon structure comprises a silicon pillar formed on an n-type silicon substrate. Preferably, the substrate is a silicon-on-insulator substrate to which a wafer is bonded. Preferably, the silicon pillars have a diameter (d) of 0.1 to 1.0 micrometer and a height (H) of 1 to 10 micrometers.

For silicon lithium systems, the galvanic cell diagram can be represented as Li | Li⁺Electrolyte | Si, the cathodic process of the cell is that of lithium releasing charge onto silicon to form an alloy (charging) and the anodic process is that of lithium de-alloying or de-alloying (discharging). Bracketed below are Wen and Huggins⁶EM of the disclosed liquid system at 415 deg.CF data, unbracketed EMF data at room temperature for solid systems⁷. Their results are (mV, for Lj): Si/Li₁₂Si₇-582(332)；Li₁₂Si₇/Li₇Si₃-520(288)；Li₇Si₃/Li₁₃Si₄-428(158)；Li₁₃Si₄/Li₂₁Si₅-～300(44)。

It is understood that Li is substituted for Si₁₂Si₇Results in a large volume change (the alloy is 2.17 times larger). On a conventional silicon wafer suitable for use as an anode of a lithium battery, this volume change causes cracks to form and powdering due to its small size; while the structured submicron anode structures formed in accordance with the present invention can withstand conditions due to large volume changes due to alloying/dealloying of lithium.

In testing sub-micron diameter structured electrodes, the Si pillars maintained their structural integrity throughout the cycles, while the planar Si electrodes developed cracks (2 micron features) after 50 cycles. To obtain a suitable electrode, a suitable size constraint is that the silicon column cannot exceed a fractional surface coverage (F) of-0.5.

Drawings

An embodiment of the invention will now be described, by way of non-limiting example, with reference to the accompanying drawings, in which

FIG. 1 is a schematic view of a structured electrode;

FIG. 2 shows one of a set of CV scan sets;

FIG. 3 shows the results of a set of galvanostatic measurements;

FIG. 4 shows a structural pattern;

FIG. 5 shows an SEM image of a structure; and

fig. 6 shows a lithium battery according to the present invention.

Detailed Description

Electrochemical charge release of lithium on silicon and subsequent chemical reaction damages the silicon lattice, resulting in solid expansion and the creation of amorphous Si/Li phases¹³. The first new phase to appear in the system is Li₁₂Si₇. This compound, and all other Li compounds in the system, is the so-called Zintl Phase Compound (ZPC) which comprises a simple positively charged cation, and a complex covalent bonded, multiply charged, negatively charged anion. Of course, the charge belonging to an "ion" is only theoretical: the actual charge (depending on definition) is less than the formal value and may be much less, and thus, the bulk lithium is referred to as Li⁰Bulk silicon is referred to as Si_n ⁰。

The mechanism of lithiation and delithiation to form silicon is important. It has been proposed that:

(i) lithium losing charge reacts with silicon to form a ZPC film, which is in atomically continuous contact with silicon.

(ii) Excess lithium diffuses through the tight ZPC film (using the cavitation mechanism) and reacts with silicon at the Si/ZPC interface, thickening the ZPC film without forming voids.

These processes can be expressed as: li⁺(el)+e^-(solid state) → Li (ads.); li (ads.) + v (zpc) → Li⁰(ZPC)_s；Li⁰(ZPC)_s→ diffusion → Li⁰(ZPC)_ZPC/Si；xLi⁰+ySi⁰→ZPC(Li_x/ySi)。

(Li (ads) is Li absorbed on ZPC; V is Li in ZPC⁰Void) (iii) amorphous¹³The ZPC film is deformable so as not to cause significant stress-induced cracking upon volume change.

Li in crystalline Si¹⁴Has a diffusion coefficient D of-10^-14cm²s^-1Diffusion of Li in ZPC is expected to be faster; 10^-12cm²s^-1The D value of (a) will be sufficient to illustrate all the processes in this study. The model for forming ZPC films is similar in many respects to that of Deal and Grove for SiO formation on silicon₂Model of a layer¹⁵But the details are different and will be processed otherwise.

The model of ZPC decomposition is substantially the inverse of the above steps. Li⁰Charges are released at the electrolyte interface and surface holes are created in the ZPC. Native Li⁰Holes are moved in, and thus diffuse back to the ZPC/Si interface: at the interface, Si_nAgain to Si phase (among them, it is called polycrystal)¹³) And the holes combine to form a larger hole space. As these spaces further combine and grow, they lead to the crack-like features that appear in the SEM images in fig. 4c, d and fig. 5. Beaulieu et al¹⁶The above process is described in describing the removal of lithium from a silicon/tin alloy.

It has been shown that Li alloying/dealloying of planar Si can be performed repeatedly without powdering the substrate, see fig. 5. However, it is of concern that the alloying/dealloying process is limited by diffusion through the ZPC layer. To obtain a charge rate suitable for various applications, it is necessary to increase the surface area of the Si/electrolyte interface; also, this has been achieved with a pillar structure. Previous attempts to utilize silicon particles have failed because the contact between particles varies and separates from cycle to cycle². On the other hand, the pillar structure was still largely preserved after 50 cycles, which can be confirmed from the flatness of the pillar top, see fig. 4.

The less than 100% efficiency disclosed here is mainly due to the reaction with the electrolyte during alloying and to the small range isolation of the ZPC region. The data here show that reduced current density both in alloying and dealloying leads to improved efficiency. This increase is thought to be mainly due to a decrease in the surface concentration of absorbed Li during alloying; and, upon dealloying, obtaining all lithium in the ZPC.

The area to volume ratio of the pillar structure can be further increased over a wide range, for example, the pillar has a diameter (d) of 0.3 μm and a height (H) of 6. mu.m. The volume of the column (v) will be FH when F is 0.4 and v is 2.4 × 10^-4cc/cm²When converted to Li₁₂Si₇It is equivalent to 3.81X 10³v＝914microAhrcm^-2The capacity of (c). The surface area of the column structure is-4 FH/d, which is the basis of much improved characteristics.

In order to manufacture the structure according to the invention, the following method is used, namely "Island Lithography" (Island Lithography) as disclosed in international patent WO 01/13414. The method employs cesium chloride as a resist in the lithographic step of fabricating the pillar array. It works as follows. A CsCl film was vacuum deposited on the clean, hydrophilic surface of the Si substrate. The system is then exposed to an environment having a controlled relative humidity. Multiple layers of water adsorb onto the surface and CsCl can dissolve into the water layer (more at larger radii of curvature). Driven by excess surface energy (energy) related to the CsCl surface curvature, CsCl reforms the hemispherical island distribution. The array may be used to form structures in a variety of studies including nanoscale phenomena. In this case, reactive ion etching is preferably used, using the islands as an X mask, to remove the surrounding silicon to form the desired pillar structure.

On a GaAs surface⁹And more recently in Si/SiO₂On the surface¹⁰A study of the kinetics of forming an array of islands was conducted in which the techniques and results were described in detail. The process variables are: thickness (L), humidity (RH), exposure time (t) of CsCl film. Diameter, average diameter of island array formed: (<d>) Standard deviation (± s) and coverage (F) are gaussian. After the CsCl resist array is prepared, Reactive Ion Etching (RIE) is performed to form a corresponding pillar array¹¹. The RIE process variables are: composition, flow rate and chamber pressure of the influent gas; an RF power; dc biasPlacing; the etching time. The results are characterized by: the etch depth, which corresponds to the pillar height (H), and the wall angle, i.e., the angle of the pillar wall to the wafer plane, was selected to be approximately 90 ° in this study. The examples disclosed in this study were etched in an Oxford plasma 80 device. Etching gas (O)₂∶Ar∶CHF₃) In a ratio of 1: 10: 20, an inflow rate of 20sccm, a chamber pressure of 50 mPa, an RF power of 73W, and a dc bias of 200V.

The column structure disclosed in this study (group K) is characterized in that:<d>580nm ± 15 nm; f is 0.34; h810 nm, prepared using L80 nm; RH is 40%; t is 17.5 hours. After formation, the silicon sample is rinsed in clear water; NH at equal volume ratio₄OH(28w％NH₃)∶H₂O₂(100v/v)∶H₂Etching in O for 20 seconds; the etchant is washed out by deionized clean water and dried.

The structure may of course be formed by other known techniques, such as photolithography, which forms a regular array of features rather than a discrete distribution formed by island lithography.

Fig. 1 is a schematic view of a structured electrode according to the invention, which is used in the following tests, showing a partial cross-sectional view of the anode, wherein the pillars 2 are clearly shown on a silicon wafer 3.

Fig. 6 shows a lithium battery including an exemplary embodiment of the present invention, which includes: anode 1, cathode 4, polymer electrolyte 5, first strip 6, which represents a rectifying circuit connected to a coil surrounding the anode, for charging, second strip 7, which represents an output circuit (driven by a battery), and a pair of connections 8 for connecting the devices to be driven.

Electrochemical detection was performed in a three-electrode glass cell in which the Si sample was the working electrode and metallic Li was used for both the counter and reference electrodes. Using LiClO₄(Merck) Dissolved in ethylene carbonate diethyl carbonate (Merck)) And (1: 1) a solution of AlM in a w/w solvent as an electrolyte. The cells were assembled into a trough-shaped box under dry argon. Forming a resistive contact on the back side of a silicon sample electrode using a 1: 1In-Ga eutectic alloy¹². The electrode area was scribed with an O-ring structure in the PTFE support. No adhesive is used and a better electrolyte/atmosphere seal is obtained. In earlier studies it was found that the epoxy adhesive used to mount the Si electrode contaminated the surface of the active electrode, resulting in parasitic currents (> 2V) at high voltages.

Using an electrochemical workstation (VMP PerkinElmer^TMInstruments), the electrochemical behaviour of the cell was studied by Cyclic Voltammetry (CV) and galvanostatic measurements (voltage at constant current versus time). The capacity here refers to the total charge embedded on the surface area of the protruding electrode exposed to the electrolyte (any surface area for structuring is omitted here), which is provided as mAhcm^-2(microampere hour cm^-2)。

The results obtained were: measured Li | Li⁺Response of electrolyte | Si cell: the cathode process of the cell is that lithium releases charge to silicon to form an alloy (charge); and the anodic process is lithium extraction or dealloying (discharging). Figure 2 shows a set of CV scan sets (see callout for details). The first cycle, and the second cycle, differ to many degrees from the later cycles. It is assumed that this difference is due to a "formation" effect, which is related to the film formation of the electrode when Li first releases charge. After the first and second cycles, the scan assumes a repeating common shape. Since the voltage in the sweep varies slowly and the current density is thus small, there is no term for IR drop or diffusion overvoltage, so the electrode voltage is a measure of surface lithium activity assuming no activation overvoltage. The first cathode was characterized by a rapid increase in current at 330mV, which was based on room temperature data⁷Corresponds to Li₁₂Si₇Is present. The lowest voltage reached is 25mV and this value is used to correspond to higher Li compounds such as Li₂₁Si₅Is present. The cycling sequence shows a gradual "activation" of the sample, which correlates with an increased breakdown of the crystalline silicon structure (see discussion). The anode, part of the CV curve, is associated with a gradual delithiation of the electrode according to a plurality of ZPC equilibrium potentials. For 1mVs^-1Scanning speed, capacity of electrode (260 mAhcm)^-2) Roughly corresponding to being converted into Li₁₂Si₇And for slower scanning speeds, the capacity exceeds the capacity corresponding to the column volume. The latter results in the introduction of substrate participation during the alloying/dealloying process.

Fig. 3 shows the results of a set of galvanostatic measurements on structured Si at two different charge/discharge current densities (see the label in detail).

Figure 4 shows the structure of the silicon electrode used in this study for K sets, and the effect of performing a continuous galvanostatic cycle on this structure. The structure is apparently unaffected, but at higher current densities, micro-cracks were observed on the bulk Si surface under the pillars.

Fig. 5 shows SEM images of the structures obtained on a planar (not pillared) Si electrode, before and after cycling, respectively, by galvanostatic method. When cycled at lower current densities, the surface deforms, although no cracks are formed. Cycling at higher current densities produced wide cracks.

Reference to the literature

1.(a) r.a. sharma and r.n.seefurth, j.electrochem.soc.123, 1763 (1976); (b) b.a. boukamp, g.c. lash and r.a. huggins, j.electrochem. soc.128, 725 (1981); (c) huggins, Lithium alloxanodes in "Handbook of Battery Materials", J.O.Besenhard Ed, Wiley-VCH, Weinheim, 359 (1999); (d) s.bourderau, t.brousse and d.m.schleich, j.power Sources, 233, 81 (1999); (e) zhuo, Bo bao and s.sinha, us 6334939B 1 Jan1, 2002. There are many other patents relating to the use of host materials for various Li anodes.

2.Hong Li，Xuejie Huang，Liquan Chen，Zhengang Wu and YongLiang，Electrochem.Solid-State Lett.2，547(1999)。

3.J.O.Besenhard，J.Yang and M.Winter，J.Power Sources，68，87(1997)。

4.L.Y.Beaulieu，D.Larcher，R.A.Dunlap and J.R.Dahn，J.Electrochem.Soc.147，3206(2000)。

Niparko (eds), "Cochlea Implants", pub. Lippincott Williams and Wilkins, Philadelphia (2000).

6.C.J.Wen and R.A.Huggins，J.Solid State Chem.37，271(1981)。

7.W.J.Weydanz，M.Wohlfahrt-Mehrens and R.A.Huggins，J.Power Sources 81-82，237(1999)

8.J-P.Colinge，“Silicon-on-Insulator Technology：Materials to VLSI”，Kluwer Acad.Pub，Boston，Chapter 2(1991)。

9.Mino Green，M.Garcia-Parajo，F.Khaleque and R Murray，Appl.Phys.Lett.63，264(1993)。

10.Mino Green and Shin Tsuchiya，J.Vac.Sci. & Tech.B，17，2074(1999)。

11.Shin Tsuchiya，Mino Green and RRA Syms，Electrochem.Solid-State Lett，3，44(2000)。

12.L-C.Chen，M.T-H Tsaur，C Lien and C-C.Wan，Sensors andActurtors，A49，115(1995)。

13.H.Li，X.Huang，L.Chen，G.Zhou，Z.Zhang，D.Yu，Y.J.Mo andN.Pei，Solid State Ionics，135，181(2000)。

14.“Properties of Silicon”，Pub.INSPEC，The Institution of ElectricalEngineers，London，(1988)：p.461 for solubility；p.455 for diffusion data。

15.B.E.Deal and A.S.Grove，J.Appl.Phys.36，3770(1965)。

16.L.Y.Beaulieu，K.W.Eberman，R.L.Turner，L.J Krause and J.R.Dahn，Electrochem，Solid-State Lett.4，A137(2001)。

Claims (8)

1. An integrated silicon electrode for a battery, the electrode comprising an array of sub-micron silicon pillars formed on a silicon substrate.

2. The silicon electrode of claim 1, formed by:

(a) depositing a solid ultra-thin film with high solubility on a flat hydrophilic silicon substrate;

(b) exposing the film to solvent vapor under controlled conditions, whereby the film reconstitutes an array of discrete hemispherical islands on the surface; and

(c) the silicon substrate is subjected to reactive ion etching using the islands of the highly soluble solid state as a resist, thereby removing the exposed silicon corresponding to the island etching, leaving silicon pillars.

3. A silicon anode as the electrode of claim 1, wherein the sub-micron silicon pillars comprise silicon pillars formed on an n-type silicon substrate.

4. The silicon anode of claim 3, said substrate being a wafer bonded silicon-on-insulator substrate.

5. The silicon anode of claim 3 or 4, wherein the silicon pillars do not exceed a coverage of 0.5 of the substrate.

6. The silicon anode of claim 3, wherein the silicon pillars have a diameter of 0.1-1.0 microns and a height of 1-10 microns.

7. The silicon anode of claim 3, wherein the silicon pillars are 0.3 microns in diameter and 6 microns in height.

8. A lithium battery comprising a silicon anode as claimed in any one of claims 3 to 7.