HK1086665A - Selectable capacitance circuit - Google Patents

Abstract

A voltage-controlled capacitor and methods for forming the same are described. A mechanical conductor membrane of the voltage-controlled capacitor is movable to and from a first position and a second position. An amount of capacitance can vary with the movement of the mechanical conductor membrane. A microelectromechanical systems (MEMS) voltage-controlled capacitor can be used in a variety of applications, such as, but not limited to, RF switches and RF attenuators.

Description

Selectable capacitance circuit

Technical Field

The present invention relates generally to microelectromechanical systems (MEMS).

Background

Microelectromechanical Systems (MEMS) include micromechanical elements, actuators, and electronics. Micromechanical elements may be created using deposition, etching, or other micromachining processes that etch away parts of substrates and/or deposited material layers or that add layers to form electrical and electromechanical devices. These MEMS devices can be used in a wide variety of applications, such as in optical applications and in circuit applications.

One type of MEMS device is known as an interferometric modulator. The term interferometric modulator or interferometric light modulator, as used herein, refers to a device that selectively absorbs and/or reflects light using the principles of optical interference. In certain embodiments, an interferometric modulator may comprise a pair of conductive plates, one or both of which may be transparent and/or reflective in whole or part and capable of relative motion upon application of an appropriate electrical signal. One of the plates may comprise a stationary layer deposited on a substrate and the other plate may comprise a metal diaphragm separated from the stationary layer by an air gap. As described in more detail herein, the position of one plate relative to another can change the optical interference of light incident on the interferometric modulator. Such devices have a wide range of applications, and it would be beneficial in the art to utilize and/or modify the characteristics of these types of devices so that their performance can be exploited in improving existing products and creating new products that have not yet been developed.

Another type of MEMS device is used as a multi-state capacitor. For example, the capacitor may comprise a pair of conductive plates, at least one of which is capable of relative movement upon application of a suitable electrical control signal. The relative motion changes the capacitance of the capacitor, enabling the capacitor to be used in a wide variety of applications, such as in filter circuits, tuning circuits, phase shifting circuits, attenuation circuits, and the like.

Disclosure of Invention

The system, method and apparatus of the present invention have several aspects, no single one of which is solely responsible for its desirable attributes. Without limiting the scope of this invention, its more prominent features will now be discussed briefly.

One embodiment is an apparatus having a selectable capacitance, the apparatus comprising: at least two electrodes, at least one of which is controllably movable relative to the other to provide adjustability to a gap defined between the at least two electrodes, wherein at least one of the electrodes carries an RF signal; and a plurality of struts disposed between the at least two electrodes, wherein the plurality of struts are configured to tension at least one of the electrodes.

One embodiment is a capacitor having a selectable capacitance, the capacitor comprising: means for carrying an RF signal, said carrying means having a gap that is controllably adjustable; and a member for tensioning at least a portion of the carrier member.

One embodiment is a method of selecting a capacitance, the method comprising: adjusting a gap between at least two electrodes, wherein at least one of the electrodes carries an RF signal; and tensioning at least one of the electrodes.

One embodiment is a method of manufacturing a capacitor having a selectable capacitance, the method comprising: forming a first electrode; forming a second electrode so as to be movable relative to the first electrode to provide adjustability to a gap defined between the first electrode and the second electrode; and forming a plurality of struts configured to tension at least the second electrode, wherein the struts are arranged between the electrodes.

One embodiment is a capacitor made according to the above method.

One embodiment is an RF device comprising: a first conductor for carrying an RF signal; and a deformable membrane spaced from the first conductor, the deformable membrane configured to selectively filter the RF signal, the deformable membrane having at least three discrete energizable positions to selectively filter the RF signal.

One embodiment is an RF device, comprising: means for carrying an RF signal; and means for filtering the RF signal, the filtering means being deformable to at least one of three discrete energizable positions for selective filtering of the RF signal.

One embodiment is a method of filtering an RF signal, the method comprising: carrying the RF signal in a conductive wire; and selectively filtering the RF signal using a deformable membrane having at least three discrete energizable portions for selectively filtering the RF signal, wherein the deformable membrane is proximate to the conductive wires.

One embodiment is a method of manufacturing an RF device having a selectable capacitance, the method comprising: forming a first conductor for carrying an RF signal; and forming a deformable membrane spaced from the first conductor, the deformable membrane configured to selectively filter the RF signal, the deformable membrane having at least three discrete energizable positions to selectively filter the RF signal.

One embodiment is an RF device made according to the above-described method.

One embodiment is a voltage controlled capacitor, comprising: a substrate assembly having an input terminal, a control terminal, and a voltage reference terminal; voltage reference lines disposed on the substrate assembly, wherein at least one of the voltage reference lines is coupled to the voltage reference terminal; a mechanical conductor membrane interdigitally located on the substrate assembly and coupled to one or more of the voltage reference lines at opposite ends of the mechanical conductor membrane; one or more support posts disposed between the substrate assembly and the mechanical conductor membrane, wherein the one or more support posts support the mechanical conductor membrane; a signal conductor disposed on said substrate assembly, wherein a voltage on said control terminal at least partially controls the position of said mechanical conductor membrane; a dielectric material layer disposed between a top surface of the signal conductor and the mechanical conductor membrane; and a coupling capacitor having a first terminal and a second terminal, wherein the first terminal is coupled to the input terminal and wherein the second terminal is coupled to the signal conductor.

Drawings

The drawings and the associated descriptions herein are intended to illustrate various embodiments and are not intended to limit the invention.

FIG. 1 is an isometric view depicting a portion of one embodiment of an interferometric modulator display in which a movable reflective layer of a first interferometric modulator is in a relaxed position and a movable reflective layer of a second interferometric modulator is in an actuated position.

FIG. 2 is a system block diagram illustrating one embodiment of an electronic device including a 3 × 3 interferometric modulator display.

FIG. 3 is a diagram of movable mirror position versus applied voltage for one exemplary embodiment of an interferometric modulator of FIG. 1.

FIG. 4 is a schematic diagram of a set of row and column voltages that may be used to drive an interferometric modulator display.

FIG. 5A shows one exemplary frame of display data in the 3x3 interferometric modulator display shown in FIG. 2.

FIG. 5B shows one exemplary timing diagram for row and column signals that may be used to write the frame shown in FIG. 5A.

FIGS. 6A and 6B are system block diagrams illustrating one embodiment of a display device 40.

Fig. 7A is a cross-sectional view of the device of fig. 1.

FIG. 7B is a cross-sectional view of an alternative embodiment of an interferometric modulator.

FIG. 7C is a cross-sectional view of another alternative embodiment of an interferometric modulator.

FIG. 7D shows a cross-sectional side view of a MEMS capacitor with a mechanical conductor membrane in a low capacitance position.

FIG. 7E shows a cross-sectional side view of the MEMS capacitor of FIG. 7D with the mechanical conductor membrane in a high capacitance position.

FIG. 8 shows a cross-sectional side view of a MEMS capacitor according to an embodiment where the membrane is isolated from a reference voltage.

FIG. 9A shows a top view of an embodiment of a MEMS capacitor in which the post spacing is relatively uniform for the membrane.

FIG. 9B1 shows a top view of an embodiment of a MEMS capacitor with relatively wide post spacing for a first position of the membrane and relatively tight post spacing for a second position of the membrane.

FIG. 9B2 shows a top view of another embodiment of a MEMS capacitor with relatively wide post spacing for a first position of the membrane and relatively tight post spacing for a second position of the membrane.

FIG. 9C1 shows a top view of an embodiment of a MEMS capacitor with two separate membranes, each membrane having a different post spacing.

FIG. 9C2 shows a top view of another embodiment of a MEMS capacitor with two separate membranes and each membrane having a different post spacing.

FIG. 9D shows a top view of an embodiment of a MEMS capacitor with two separate membranes and the same post spacing for each of the membranes shown.

FIG. 10A shows an example of the expected return loss of an RF attenuator using MEMS capacitors.

FIG. 10B shows an example of the expected insertion loss of an RF attenuator using MEMS capacitors.

FIG. 11 shows an example of a MEMS capacitor in an RF attenuator.

FIGS. 12A, 12B and 12C show examples of simplified equivalent circuits of a MEMS capacitor.

Fig. 13A to 13I show a process of manufacturing a MEMS capacitor.

Detailed Description

Although specific embodiments are illustrated herein, other embodiments, including embodiments that do not provide all of the advantages and features described herein, will be apparent to those of ordinary skill in the art.

The selectable capacitance circuit may be used in a variety of applications. For example, the selectable capacitance circuit may be used in an RF attenuator or in an RF switch. The selectable capacitance may be used to select the degree of RF attenuation, to select the degree of impedance mismatch of the RF switch, and the like. Attenuators or switches made from MEMS devices advantageously exhibit relatively wide operating bandwidths, with relatively low losses and superior RF characteristics, as compared to diodes and FET switches. MEMS devices also typically require relatively low drive power and can exhibit relatively low series resistance.

Although generally described in terms of an interferometric modulator display with reference to fig. 1-6C, one skilled in the art will appreciate that the principles of relative motion of one or both of the conductive plates or membranes of a MEMS device for a display will also apply to a MEMS capacitor.

The following description is directed to certain specific embodiments of the invention. However, the invention can be embodied in a multitude of different ways. In the description, reference is made to the drawings wherein like parts are designated with like numerals throughout. As will be apparent from the following description, the invention may be implemented in any device that is configured to display an image, whether in motion (e.g., video) or stationary (e.g., still image), and whether textual or pictorial. More specifically, the invention may be implemented in or associated with a variety of electronic devices such as, but not limited to, the following: mobile telephones, wireless devices, Personal Data Assistants (PDAs), handheld or portable computers, GPS receivers/navigators, cameras, MP3 players, camcorders, game consoles, watches, clocks, calculators, television monitors, flat panel displays, computer monitors, auto displays (e.g., odometer display, etc.), cockpit controls and/or displays, camera view displays (e.g., rear view camera display for a vehicle), electronic photographs, electronic billboards or signs, projectors, architectural structures, packaging, and aesthetic structures (e.g., display of images on a piece of jewelry). MEMS devices of similar structure to those described herein can also be used in non-display applications such as in electronic switching devices.

One interferometric modulator display embodiment comprising an interferometric MEMS display element is shown in FIG. 1. In these devices, the pixels are in either a bright or dark state. In the bright (on) or open (open) state, the display element reflects a large portion of incident visible light to the user. When in the dark (off) or closed (closed) state, the display element reflects little incident visible light to the user. Depending on the embodiment, the light reflectance properties of the "on" and "off" states may be reversed. MEMS pixels can be configured to reflect predominantly at selected colors, allowing for a color display in addition to black and white.

FIG. 1 is an isometric view depicting two adjacent pixels in a series of pixels of a visual display, wherein each pixel comprises a MEMS interferometric modulator. In certain embodiments, an interferometric modulator display comprises a row/column array of these interferometric modulators. Each interferometric modulator includes a pair of reflective layers positioned at a variable and controllable distance from each other to form a resonant optical cavity with at least one variable dimension. In one embodiment, one of the reflective layers is movable between two positions. In the first position, referred to herein as the relaxed position, the movable layer is positioned relatively far from a fixed partially reflective layer. In the second position, the movable layer is positioned closer to the partially reflective layer. Incident light that reflects from the two layers interferes constructively or destructively depending on the position of the movable reflective layer, producing either an overall reflective or non-reflective state for each pixel.

The portion of the pixel array shown in FIG. 1 includes two adjacent interferometric modulators 12a and 12 b. In the interferometric modulator 12a on the left, a movable highly reflective layer 14a is illustrated in a relaxed position at a predetermined distance from a fixed partially reflective layer 16 a. In the interferometric modulator 12b on the right, a movable highly reflective layer 14b is illustrated in an actuated position adjacent to a fixed partially reflective layer 16 b.

The fixed layers 16a, 16b are electrically conductive, partially transparent and partially reflective, and may be fabricated, for example, by depositing one or more layers each of chromium and indium tin oxide on a transparent substrate 20. The layers are patterned into parallel strips and may form row electrodes in a display device, as will be described further below. The movable layers 14a, 14b may be formed as a series of parallel strips of a deposited metal layer or layers (orthogonal to the row electrodes 16a, 16 b) deposited on top of posts 18 and an intervening sacrificial material deposited between the posts 18. After the sacrificial material has been etched away, the deformable metal layers 14a, 14b are separated from the fixed metal layers by a defined air gap 19. The deformable layers may be formed from a highly conductive and reflective material, such as aluminum, and the strips may form column electrodes in a display device.

When no voltage is applied, the cavity 19 remains between the layers 14a, 16a and the deformable layer is in a mechanically relaxed state as shown by the pixel 12a in FIG. 1. However, after application of a potential difference to a selected row and column, the capacitor formed at the intersection of the row and column electrodes at the corresponding pixel is charged, and electrostatic forces pull the electrodes together. If the voltage is high enough, the movable layer deforms and is forced against the fixed layer (a dielectric material (not shown in this figure) may be deposited over the fixed layer to prevent shorting and control the separation distance), as shown in the right pixel 12b in FIG. 1. The behavior is the same regardless of the polarity of the applied potential difference. It can thus be seen that row/column actuation that can control the reflective vs. non-reflective pixel states is analogous in many ways to that used in conventional LCD and other display technologies.

FIGS. 2-5B illustrate one exemplary process and system for using an array of interferometric modulators in a display application.

FIG. 2 is a system block diagram illustrating one embodiment of an electronic device that may embody aspects of the invention. In the exemplary embodiment, the electronic device includes a processor 21, which may be any general purpose single-or multi-chip microprocessor, such as an ARM, Pentium, or other microprocessor^*、Pentium II^*、Pentium III^*、Pentium IV^*、Pentium^* Pro、8051、MIPS^*、Power PC^*、ALPHA^*Or any special purpose microprocessor such as a digital signal processor, microcontroller, or programmable gate array. As is conventional in the art, the processor 21 may be configured to execute one or more software modules. In addition to executing an operating system, the processor may be configured to execute one or more software applications, including a web browser, a telephone application, an email program, or any other software application.

In one embodiment, the processor 21 is further configured to communicate with an array controller 22. In one embodiment, the array controller 22 includes a row driver circuit 24 and a column driver circuit 26 that provide signals to a display array or panel 30. The cross-sectional view of the array shown in FIG. 1 is shown by line 1-1 in FIG. 2. For MEMS interferometric modulators, the row/column actuation protocol may take advantage of the hysteresis properties of these devices shown in FIG. 3. It may require, for example, a 10 volt potential difference to cause a movable layer to deform from the relaxed state to the actuated state. However, when the voltage is reduced from this value, the movable layer will retain its state as the voltage drops back below 10 volts. In the exemplary embodiment of FIG. 3, the movable layer does not relax completely until the voltage drops below 2 volts. Thus, in the example shown in FIG. 3, there is a range of voltage, approximately 3-7 volts, within which there exists a window of applied voltage within which the device is stable in either the relaxed or actuated state. This is referred to herein as the "hysteresis window" or "stability window". For a display array having the hysteresis characteristics of FIG. 3, the row/column actuation protocol can be designed to apply a voltage difference of about 10 volts to the pixels in the strobed row that are to be actuated and a voltage difference of approximately 0 volts to the pixels that are to be relaxed during row strobing. After the strobe, the pixels are exposed to a steady state voltage difference of about 5 volts such that they remain in the state they were exposed to by the row strobe. After writing, each pixel sees a potential difference within the "stability window" of 3-7 volts in this example. This characteristic makes the pixel design shown in fig. 1 stable in an existing actuated or relaxed state under the same applied voltage conditions. Since each pixel of the interferometric modulator, whether in the actuated or relaxed state, is essentially a capacitor formed by the fixed and moving reflective layers, this stable state can be held at a voltage within the hysteresis window with almost no power dissipation. Essentially no current flows into the pixel if the applied potential is fixed.

In typical applications, a display frame may be created by asserting the set of column electrodes in accordance with the desired set of actuated pixels in the first row. A row pulse is then applied to the row 1 electrode, actuating the pixels corresponding to the asserted column lines. The asserted set of column electrodes is then changed to correspond to the desired set of actuated pixels in the second row. A pulse is then applied to the row 2 electrode, actuating the appropriate pixels in row 2 in accordance with the asserted column electrodes. The row 1 pixels are unaffected by the row 2 pulse, and thus remain in the state they were set to during the row 1 pulse. The above steps may be repeated for the entire series of rows in a sequential manner to form the frame. Typically, the frames are refreshed and/or updated with new display data by continually repeating the process at some desired number of frames per second. A wide variety of protocols for driving row and column electrodes of pixel arrays to produce display frames are also well known and may be used in conjunction with the present invention.

FIGS. 4, 5A and 5B illustrate one possible actuation protocol for forming a display frame on the 3 × 3 array of FIG. 2. Figure 4 shows a possible set of row and column voltage levels that may be used for pixels having the hysteresis curves of figure 3. In the embodiment of FIG. 4, actuating a pixel includes setting the corresponding column to-V_biasAnd sets the corresponding row to + av, which may correspond to-5 volts and +5 volts, respectively. The relaxed pixels are then formed by setting the corresponding column to + V_biasAnd sets the corresponding row to the same + av, thereby creating a 0 volt potential difference across the pixel. In those rows where the row voltage is held at 0 volts, the pixels are stable in the state they were originally in, being at + V with the column_biasOr is-V_biasIs irrelevant. As also shown in FIG. 4, it will be appreciated that voltages of opposite polarity than those described above can be used, e.g., actuating a pixel can include setting the corresponding column to + V_biasAnd sets the corresponding row to Δ V. In this embodiment, releasing a pixel is by setting the corresponding column to-V_biasAnd sets the corresponding row to the same-av, thereby creating a 0 volt potential difference across the pixel.

FIG. 5B is a timing diagram showing a series of row and column signals applied to the 3 × 3 array of FIG. 2, which will result in the display arrangement of FIG. 5A, where actuated pixels are non-reflective. Prior to writing the frame shown in FIG. 5A, the pixels can be in any state, in this example, all the rows are at 0 volts, and all the columns are at +5 volts. Under these applied voltages, all pixels are stable in their existing actuated or relaxed states.

In the frame shown in FIG. 5A, pixels (1, 1), (1, 2), (2, 2), (3, 2) and (3, 3) are activated. To accomplish this, during a "line time" for row 1, columns 1 and 2 are set to-5 volts, and column 3 is set to +5 volts. This does not change the state of any pixels, since all pixels remain within the 3-7 volt stability window. Thereafter, row 1 is strobed with a pulse that rises from 0 volts to 5 volts and then falls back to 0 volts. Thereby actuating the pixels (1, 1) and (1, 2) and relaxing the pixels (1, 3). No other pixels in the array are affected. To set row 2 as desired, column 2 is set to-5 volts, and columns 1 and 3 are set to +5 volts. Thereafter, applying the same strobe to row 2 will actuate pixel (2, 2) and relax pixels (2, 1) and (2, 3). Again, no other pixels in the array are affected. Similarly, row 3 is set by setting columns 2 and 3 to-5 volts, and column 1 to +5 volts. The row 3 strobe sets the row 3 pixels to the state shown in FIG. 5A. After writing the frame, the row potentials are 0, while the column potentials can remain at either +5 or-5 volts, and the display will thereafter be stable in the arrangement shown in FIG. 5A. It will be appreciated that the same procedure can be used for arrays consisting of tens or hundreds of rows and columns. It will also be appreciated that the timing, sequence, and levels of voltages used to perform row and column actuation can be varied widely within the general principles outlined above, and the above example is exemplary only, and any actuation voltage method can be used with the systems and methods described herein.

FIGS. 6A and 6B are system block diagrams illustrating one embodiment of a display device 40. The display device 40 may be a cellular or mobile phone, for example. However, the same components of display device 40 or slightly different components thereof may also illustrate different types of display devices, such as televisions or portable media players.

The display device 40 includes a housing 41, a display 30, an antenna 43, a speaker 44, an input device 48, and a microphone 46. The housing 41 is typically made from any of a number of manufacturing processes well known to those skilled in the art, including injection molding and vacuum forming. Additionally, the housing 41 may be made from any of a variety of materials, including but not limited to plastic, metal, glass, rubber, and ceramic, or a combination thereof. In one embodiment, the housing 41 includes movable portions (not shown) that are interchangeable with other movable portions having different colors or containing different logos, pictures, or symbols.

The array 30 of exemplary display devices 40 may be any of a wide variety of displays, including the bi-stable displays described herein. In other embodiments, the display 30 comprises a flat-panel display, such as the plasma, EL, OLED, STN LCD, or TFT LCD described above, or a non-flat-panel display, such as a CRT or other tube device, as is well known to those of skill in the art. However, for purposes of describing the present embodiment, the array 30 includes an interferometric modulator display, as described herein.

FIG. 6B schematically shows components in an embodiment of exemplary display device 40. The exemplary display client 40 shown includes a housing 41 and may include other components at least partially enclosed within the housing 41. For example, in one embodiment, the exemplary display device 40 includes a network interface 27, the network interface 27 including an antenna 43 coupled to a transceiver 47. The transceiver 47 is connected to the processor 21, which processor 21 is in turn connected to conditioning hardware 52. The conditioning hardware 52 may be configured to condition a signal (e.g., filter a signal). The conditioning hardware 52 is connected to a speaker 44 and a microphone 46. The processor 21 is also connected to an input device 48 and a driver controller 29. The driver controller 29 is coupled to a frame buffer 28 and to the array driver 22, which in turn is coupled to an array 30. A power supply 50 provides power to all components as required by the design of this particular exemplary display device 40.

The network interface 27 includes the antenna 43 and the transceiver 47 so that the exemplary display device 40 can communicate with one or more devices over a network. In one embodiment, the network interface 27 may also have some processing functionality to reduce the requirements on the processor 21. The antenna 43 is any antenna known to those skilled in the art for transmitting and receiving signals. In one embodiment, the antenna transmits and receives RF signals according to the IEEE 802.11 standard, including IEEE 802.11(a), (b), or (g). In another embodiment, the antenna transmits and receives RF signals according to the Bluetooth (BLUETOOTH) standard. In the case of a cellular telephone, the antenna is designed to receive CDMA, GSM, AMPS or other known signals that are used to communicate within a wireless mobile telephone network. The transceiver 47 pre-processes the signals received from the antenna 43 so that they may be received by and further processed by the processor 21. The transceiver 47 also processes signals received from the processor 21 for transmission from the exemplary client 40 via the antenna 43.

In an alternative embodiment, the transceiver 47 can be replaced by a receiver. In yet another alternative embodiment, the network interface 27 may be replaced by a data source that may store or generate data to be sent to the processor 21. For example, the data source may be a Digital Video Disc (DVD) or hard drive that contains image data, or a software module that generates image data.

Processor 21 generally controls the overall operation of the exemplary display device 40. The processor 21 receives data, such as audio data, image data (e.g., compressed image data) from the network interface 27 or an image source, and processes the data into raw data or into a format that is readily processed into raw data. The processor 21 then sends the processed data to the driver controller 29 or to the frame buffer 28 for storage. Raw image data generally refers to information that can identify image characteristics at each location within an image. For example, the image characteristics may include color, saturation, and gray-scale level.

In one embodiment, the processor 21 includes a microcontroller, CPU, or logic unit for controlling the operation of the exemplary display device 40. Conditioning hardware 52 generally includes amplifiers and filters for sending signals to the speaker 44, and for receiving signals from the microphone 46. Conditioning hardware 52 may be discrete components within the exemplary display device 40, or may be incorporated within the processor 21 or other components.

The driver controller 29 takes the raw data generated by the processor 21 either directly from the processor 21 or from the frame buffer 28 and reformats the raw data appropriately for high speed transmission to the array driver 22. In particular, the driver controller 29 reformats the raw data into a data flow having a raster-like format, such that it has a time order suitable for scanning the array 30. The driver controller 29 then sends the formatted information to the array driver 22. Although a driver controller 29, such as an LCD controller, is typically associated with the system processor 21 as a stand-alone Integrated Circuit (IC), such controllers may be implemented in a number of ways. They may be embedded in the processor 21 as hardware, embedded in the processor 21 as software, or fully integrated in hardware with the array driver 22.

Typically, the array driver 22 receives the formatted information from the driver controller 29 and reformats the data into a parallel set of waveforms that are applied many times per second to the hundreds and sometimes thousands of leads coming from the display's x-y matrix of pixels.

In one embodiment, the driver controller 29, array driver 22, and array 30 are appropriate for any of the types of displays described herein. For example, in one embodiment, the driver controller 29 is a conventional display controller or a bi-stable display controller (e.g., an interferometric modulator controller). In another embodiment, the array driver 22 is a conventional driver or a bi-stable display driver (e.g., an interferometric modulator display). In one embodiment, a driver controller 29 is integrated with the array driver 22. Such embodiments are common in highly integrated systems such as cellular phones, watches, and other small area displays. In yet another embodiment, the array 30 is a typical display array or a bi-stable display array (e.g., a display including an array of interferometric modulators).

The input device 48 enables a user to control operation of the exemplary display device 40. In one embodiment, input device 48 includes a keypad (e.g., a QWERTY keyboard or a telephone keypad), a button, a switch, a touch-sensitive screen, a pressure-or heat-sensitive membrane. In one embodiment, the microphone 46 is an input device for the exemplary display device 40. When the microphone 46 is used to input data to the device, voice commands may be provided by a user to control operation of the exemplary display device 40.

The power supply 50 may include a variety of energy storage devices as are well known in the art. For example, in one embodiment, the power source 50 is a rechargeable battery, such as a nickel-cadmium battery or a lithium ion battery. In another embodiment, power source 50 is a renewable energy source, a capacitor, or a solar cell, including a plastic solar cell and solar-cell paint. In another embodiment, power supply 50 is configured to receive power from a wall outlet.

In some implementations control programmability resides, as described above, in a driver controller, which can be located in several places in the electronic display system. In some cases, control programmability exists in the array driver 22. Those skilled in the art will appreciate that the above-described optimization may be implemented in any number of hardware and/or software components and in various configurations.

The detailed structure of interferometric modulators that operate in accordance with the principles set forth above may vary widely. For example, FIGS. 7A-7C show three different embodiments of the moving mirror structure. FIG. 7A is a cross-sectional view of the embodiment of FIG. 1, wherein a strip of metal material 14 is deposited on orthogonally extending supports 18. In FIG. 7B, the moveable reflective material 14 is attached to supports at the corners only, on tethers 32. In FIG. 7C, the moveable reflective material 14 is suspended from a deformable layer 34. This embodiment has several advantages because the structural design and materials used for the reflective material 14 can be optimized with respect to the optical properties, and the structural design and materials used for the deformable layer 34 can be optimized with respect to the desired mechanical properties. The production of various types of interference devices is described in a number of published documents, including, for example, U.S. published application No. 2004/0051929. The above-described structures may be fabricated using a variety of well-known techniques, including a series of material deposition, patterning, and etching steps.

A micro-electromechanical system (MEMS) voltage controlled capacitor and a method of forming the same will be described. The mechanical conductor membrane of the voltage-controlled capacitor is movable to and from a first position and a second position. The capacitance can vary with the movement of the mechanical conductor membrane. MEMS voltage controlled capacitors can be used in a wide variety of applications, such as, but not limited to, RF switches and RF attenuators.

Attenuators or switches made from MEMS devices advantageously exhibit relatively wide operating bandwidths, with relatively low losses and superior RF characteristics, as compared to diodes and FET switches. In addition, these MEMS devices may also be characterized by relatively low drive power and relatively low series resistance when used in a coplanar waveguide.

One embodiment includes a MEMS capacitor with a post disposed between anchor points of the membrane. The spacing of the posts may determine the pull-in voltage used to change the position of the film. The capacitor may be formed with one or more films having different post spacings. This allows the pull-in voltage to be varied for corresponding portions of each membrane, allowing each membrane, or portions thereof, to be selectively actuated. Accordingly, the capacitance may vary at least partially with the control voltage.

One embodiment includes a capacitor having a plurality of membranes coupled to separate control biases. This allows the multiple membranes to be controlled individually, allowing a relatively large range of capacitances to be selected. For example, the plurality of films may be weighted by binary weights (powers of 2) to achieve an approximately linear selection of capacitance.

One embodiment is a voltage controlled capacitor comprising: a substrate assembly having an input terminal, a control terminal and a voltage reference terminal; voltage reference lines disposed on the substrate assembly, wherein at least one of the voltage reference lines is coupled to the voltage reference terminal; a mechanical conductor membrane spaced above the substrate assembly and coupled directly or indirectly to one or more of the voltage reference lines at opposite ends of the mechanical conductor membrane such that opposing mechanical conductor membranes are anchored at two or more ends and mechanical conductor membranes are AC coupled to the one or more voltage reference lines, wherein at least a portion of the mechanical conductor membrane is movable to or from a first position at a first distance from a surface of the substrate assembly and a second position at a second distance from the surface of the substrate assembly; one or more support posts disposed between the substrate assembly and the mechanical conductor membrane and between the two or more ends for anchoring the mechanical conductor membrane, wherein the one or more support posts support the mechanical conductor membrane; a signal conductor disposed on the substrate assembly, wherein the signal conductor DC couples to the control terminal, wherein a voltage on the control terminal at least partially controls a position of the mechanical conductor membrane; a layer of dielectric material disposed between a top surface of the signal conductor and the mechanical conductor membrane, wherein a gap exists between at least one of: (a) between the mechanical conductor membrane and the dielectric material layer or (b) between the dielectric material layer and the signal conductor, and there is substantially no gap when the mechanical conductor membrane is in the second position; and a coupling capacitor having a first terminal and a second terminal, wherein the first terminal is coupled to the input terminal and wherein the second terminal is coupled to the signal conductor.

One embodiment is a capacitor having a selectable capacitance, the capacitor comprising: a substrate assembly; a signal conductor on said substrate assembly, wherein said signal conductor forms a first electrode of said capacitor; a dielectric material layer covering at least an upper surface of the signal conductor; and one or more mechanical conductor membranes spaced apart on the substrate assembly such that the signal conductor is disposed between the substrate assembly and the one or more mechanical conductor membranes, wherein the one or more mechanical conductor membranes form a second electrode of the capacitor, wherein at least two or more portions of the one or more mechanical conductor membranes are independently movable, at least in part, from a low capacitance position and a high capacitance position, the accessible positions including: a discrete first capacitive location of at least a selected two portions of the mechanical conductor membrane; a discrete second capacitive location of said selected two portions of said mechanical conductor membrane, said discrete second capacitive location having a capacitance greater than said discrete first capacitive location; and a discrete third capacitive construction having a capacitance greater than the discrete first capacitive location but less than the discrete second capacitive location, in which discrete third capacitive construction one of the selected two portions is in the discrete second capacitive location and the other is in the discrete first capacitive location, wherein the selected location is determined at least in part by the voltage on the signal conductor.

FIG. 7D shows a cross-sectional side view of a MEMS capacitor 700 with a mechanical conductor membrane 702 in a low capacitance position. Fig. 7E shows the same MEMS capacitor 700 in the high capacitance position. A process for fabricating the MEMS capacitor 700 will be described below in conjunction with fig. 13A through 13I. The MEMS capacitor 700 also includes a substrate assembly 704, voltage reference lines 706, 708, support posts 710, a signal conductor 712, and a layer of dielectric material 714 disposed on the signal conductor 712.

In the illustrated embodiment, the voltage reference lines 706, 708 and the signal conductor 712 are formed on the substrate assembly 704 in a coplanar waveguide configuration. It should be understood that other structures, such as barrier layers, may also be present. Of course, the material of the barrier layer will depend on the material used for the voltage reference lines 706, 708. For example, tantalum may be used as a diffusion barrier layer when the voltage reference lines 706, 708 are formed of copper. The substrate assembly 704 may be formed from a wide variety of materials, such as glass, silicon, gallium arsenide, lithium niobate, indium phosphide, and the like. It should be noted that the materials used for the substrate assembly 704, the voltage reference lines 706, 708, and the signal conductor 712 need not be selected to have relatively good transparency in the human visible spectrum, unlike the materials that should be used in interferometric modulators used for display applications. Rather, it can be based on electrical performanceThe materials are selected for characteristics, cost, and the like. Examples of materials that may be used for the voltage reference lines 706, 708 and for the signal conductor 712 include silver, copper, gold, aluminum, or combinations thereof. In one embodiment, the material used for the voltage reference lines 706, 708 is the same as the material used for the signal conductor 712. The material selected is preferably a relatively good conductor, e.g. with a resistivity of less than 1 x 10^-6Ohm-meters (omega-m) or even better, less than 0.1 x 10^-6Mu-meter (omega-m) material.

The voltage reference lines 706, 708 provide a signal ground reference for signals carried by the signal conductor 712. The signal ground should provide a relatively low impedance to ground for the RF signal. It should be appreciated that such a signal ground may be, but need not be, at DC ground potential. In the embodiment shown in fig. 7D and 7E, the voltage reference lines 706, 708 are at the same DC potential as the mechanical conductor membrane 702. In an embodiment, which will be described below in connection with fig. 8, different DC potentials may be used.

The signal conductor 712 carries a signal provided with a selectable capacitance. For example, the selectable capacitance may be used in an RF attenuator to select the degree of attenuation applied to a signal, in an RF switch to select a path for a signal, and so forth. A coupling capacitor may be used to isolate the RF signal from a control voltage also carried by signal conductor 712. The control voltage may at least partially control the position of the mechanical conductor membrane 702, as described above in connection with fig. 3.

In the illustrated embodiment, a layer of dielectric material 714 is formed on the signal conductor 712. In another embodiment, the layer of dielectric material 714 may be disposed on the bottom side of the mechanical conductor membrane 702 (the side facing the signal conductors 712). A wide variety of materials may be used for the layer of dielectric material 714, such as, for example, silicon oxide, silicon nitride, and the like. The layer of dielectric material 714 may prevent the mechanical conductor membrane 702 from electrically shorting to the signal conductor 712 when in the low capacitance position shown in fig. 7E.

The mechanical conductor membrane 702 should also be formed of a conductive material. A wide variety of materials may be used. For example, the same materials used for the voltage reference lines 706, 708 and the signal conductor 712 may be used. Further, the mechanical conductor membrane 702 may also be formed from multiple layers of various materials selected to provide relatively good electrical and mechanical properties (e.g., stress).

The post 710 may be formed from a wide variety of materials (conductive or dielectric), such as polymers, metals, glass, ceramics, and the like. In one embodiment, the posts 710 are formed of a photopolymer for ease of fabrication. The posts 710 support the mechanical conductor membrane 702 such that the mechanical conductor membrane 702 is at a height h above the substrate surface when in the low capacitance position. The height of the pillars 710 (also h), the spacing between the pillars 710, and the tensile stress on the mechanical conductor membrane 702 may be used to select an appropriate pull-in voltage for the mechanical conductor membrane 702.

The skilled practitioner will appreciate that the appropriate materials and dimensions to be used for a particular MEMS capacitor 700 will depend on various considerations such as: cost, electrical performance requirements (e.g., frequency range), available size, required pull-in voltage, and similar considerations. In one embodiment, the thickness of the conductors for the voltage reference lines 706, 708 and the signal conductor 712 is in a range of about 0.5 to 5 microns. A width w suitable for the signal conductor 712 is in the range of about 25 microns to about 75 microns. Suitable bandwidths L for the voltage reference lines 706, 708 range from about 50 microns to about 250 microns. The distance g between one of the voltage reference lines 706, 708 and the signal conductor 712 is suitably in the range of about 10 microns to about 50 microns. In one embodiment, the thickness of the layer 714 of dielectric material is in the range of about 0.1 to 0.5 microns. Other suitable dimensions will be readily determined by one of ordinary skill in the art.

The mechanical conductor membrane 702 is movable to and from a first position and a second position. As shown in fig. 7D, a gap exists between the bottom of the mechanical conductor membrane 702 and the layer of dielectric material 714. The presence of this gap may cause the MEMS capacitor 700 to have a relatively low capacitance in the position shown in fig. 7D. When activated by a suitable pull-in voltage between the mechanical conductor membrane 702 and the signal conductor 712, the mechanical conductor membrane 702 moves to a higher capacitance position, as shown in FIG. 7E.

FIG. 8 shows a cross-sectional side view of a MEMS capacitor 800 according to an embodiment in which a layer of dielectric material 802 insulates a mechanical conductor membrane 804 from a voltage reference. A layer of dielectric material 802 is disposed between the mechanical conductor film 804 and the voltage reference lines 706, 708. This enables the voltage reference lines 706, 708 to be at a different DC potential than the mechanical conductor membrane 804. The mechanical conductor membrane 802 may be extended to contact a DC bias source, as shown on the right side of fig. 8. It should be noted that one or both of the voltage reference lines 706, 708 should still be coupled to a relatively good signal ground.

A wide variety of materials may be used for the dielectric material layer 802. For example, the dielectric material layer 802 may be formed of aluminum oxide, silicon nitride, and the like. In one embodiment, the voltage reference line 708 is coupled to a DC ground, and the mechanical conductor membrane 804 is coupled to a DC bias with respect to the bias on the signal conductor 712 to excite the position of the mechanical conductor membrane 804. This may allow, for example, the DC-isolated portion of a mechanical conductor membrane to be selectively activated or moved, providing a relatively wide range of selectable capacitances. This may be suitable for use in RF attenuation applications. In one example, the signal conductors and mechanical conductor membranes are arranged in rows and columns and activated as described above in connection with fig. 5A and 5B.

FIG. 9A shows a top view of an embodiment of a MEMS capacitor 900 with a relatively uniform post spacing. For example, the top view of the MEMS capacitor 900 may correspond to the MEMS capacitor 800 described above in connection with fig. 8. The illustrated portion of the MEMS capacitor 900 includes voltage reference lines 902, 904, a signal conductor 906, and a post 908. Dashed box 910 shows a top view of the mechanical conductor membrane. In the illustrated embodiment, the dashed box 910 is shown extending beyond the voltage reference line 904 for coupling to a DC potential to bias the mechanical conductor membrane.

In an embodiment in which the capacitor is included in an RF attenuator or RF switch in a coplanar waveguide configuration, RF signals may flow through the capacitor such that an RF input signal and an RF output signal may be coupled to terminals at opposite ends of the signal conductor 906. Such coupling may be through a coupling capacitor or other coupling that does not pass DC from a control voltage source, for example.

With a relatively uniform or even pitch, it is contemplated that the entire movable portion of the mechanically conductive film may move from one location to another substantially simultaneously with itself.

FIG. 9B1 shows a top view of an embodiment of a MEMS capacitor in which a first portion 912 of the mechanical conductor membrane 916 has a relatively wide post spacing and a second portion 914 of the mechanical conductor membrane 916 has a relatively tight post spacing. FIG. 9B2 shows a top view of another embodiment of a MEMS capacitor in which the first portion 912 of the mechanical conductor membrane 916 has a relatively wide post spacing and the second portion 914 of the mechanical conductor membrane 916 has a relatively tight post spacing. A dashed line 918 is drawn approximately between the two portions.

It should be noted that although the mechanical conductor membrane 916 is integral such that the first portion 912 and the second portion 914 are portions of the same mechanical conductor membrane 916, the first portion 912 and the second portion 914 may move separately. By varying the height of the posts (not shown) and/or the spacing between the posts, the required pull-in voltage can vary from portion to portion. For example, if the first portion 912 and the second portion 914 are both the same height, the first portion 912 will pull in at a lower actuation voltage than the second portion 914. In the embodiment shown in fig. 9B1, the spacing varies in a direction parallel to the signal conductors. In the embodiment of fig. 9B2, each column of struts 952 in the second portion 914 is closer to a respective signal conductor 956 than each column of struts 954 in the first portion 912.

Although two portions are shown in fig. 9B1 and 9B2, it should be understood that more portions, e.g., 3 portions, 4 portions, may also be used. In one embodiment, the posts underlying portions of a mechanical conductor membrane 916 are selectively arranged according to a desired capacitance.

FIG. 9C1 shows a top view of an embodiment of a MEMS capacitor with two separate membranes 922, 924 and a different post spacing for each membrane. FIG. 9C1 shows a top view of another embodiment of a MEMS capacitor with two separate membranes 922, 924 and a different post spacing for each membrane. For example, although the individual membranes 922, 924 may be connected to the same DC bias provided by a common voltage reference line, the membranes 922, 924 may be energized at different pull-in voltages, thereby providing a variety of capacitance value selectivity. It should be appreciated that additional separate films may also be provided to provide additional capacitance selectivity. In the embodiment shown in fig. 9C2, each column leg 962 of the second membrane 924 is closer to a corresponding signal conductor 966 than each column leg 964 of the first membrane 922.

FIG. 9D shows a top view of an embodiment of a MEMS capacitor with two separate mechanical conductor membranes 932, 934 and the mechanical conductor membranes shown having the same post spacing. This configuration may provide additional control over the configurations described above in connection with fig. 9B1, 9B2, 9C1, and 9C 2.

Each membrane 932, 934 can be pulled in separately by using a separate control bias on each of the illustrated mechanical conductor membranes 932, 934. These separate control biases are in addition to the control bias on the signal conductor. It should be appreciated that one of the separate control biases may correspond to ground. This increases the selectivity provided by the capacitor. For example, the different mechanical conductor membranes 932, 934 may be binary weighted, i.e., approximately in the form of powers of 2x area. This may allow the capacitance to be controlled in an approximately linear manner. It should be noted that in some cases it may be desirable to move the membranes 932, 934 back to a low capacitance position between selected capacitance values. Although shown with two separate membranes 932, 934, the skilled practitioner will appreciate that additional numbers of membranes may be used.

The control voltages of the individual membranes 932, 934 can be isolated from each other. For example, the configuration shown above in connection with FIG. 8 illustrates one such isolation technique using a layer of dielectric material 802. Referring to fig. 9D, a dielectric layer 936 can insulate one or more membranes 932, 934 from a dc path with an underlying voltage reference line, while still providing a relatively good signal ground for the membranes 932, 934. In the embodiment shown, a dielectric layer 936 is shown disposed between each underlying voltage reference line.

The membranes 932, 934 are coupled to a respective voltage source, which may include, for example, a DC bias, a ground reference, or a controlled or switched signal. For example, a voltage source may be coupled to a corresponding membrane using various interconnection techniques, such as routing through pads, air bridges, and the like. For example, selected portions 938, 940 of the membranes 932, 934 can be formed at the same time that the membranes 932, 934 are formed. In one embodiment, a MEMS capacitor that combines DC control with varying post spacing of the mechanical conductor membrane may also be used.

FIG. 10A shows an example of the expected return loss of an RF attenuator using MEMS capacitors. For example, as described above in connection with fig. 9A, an RF signal may be configured to flow across a MEMS capacitor. The horizontal axis represents frequency, with frequency increasing to the right. The vertical axis represents return loss. The return loss corresponds to the ratio of the amplitude of the reflected wave to the amplitude of the incident wave, and in fig. 10A, the ratio is further expressed in decibels. As shown in fig. 10A, trace 1002 corresponds to the expected return loss of the RF attenuator when the RF attenuator is in the "off position — i.e., when the mechanical conductor membrane 702 is in the low capacitance position, such as shown in fig. 7D. As shown by trace 1002, when the attenuator is "off, the expected return loss is relatively low, and thus the RF signal passes through the RF attenuator with the MEMS capacitor with a relatively low amount of attenuation.

The other traces 1004, 1006, 1008 correspond to the return loss of the RF attenuator with MEMS capacitors, where the mechanical conductor membrane 702 is "pulled" to a relatively high capacitance position, such as shown in FIG. 7E. The other traces 1004, 1006, 1008 vary in terms of the amount of capacitance used in the assessment. It should be appreciated that for selected capacitances, each capacitance may vary depending on the geometry of the capacitor and/or because a capacitor has portions or individual films that may be independently actuated, at least in part. For example, the capacitance corresponding to the trace 1004 is greater than the capacitance for the trace 1006, which is in turn greater than the capacitance for the trace 1008. As shown in this example, the return loss of the attenuator at relatively low frequencies may vary with the amount of capacitance exhibited by the attenuator.

FIG. 10B shows an example of the expected insertion loss of an RF attenuator using MEMS capacitors. The insertion loss is equal to the inverse of the ratio of the signal power provided at the output terminal of the RF attenuator to the signal power provided as input to the input terminal of the RF attenuator. For example, as described above in connection with fig. 9A, the input and output terminals may be located on opposite ends of the signal conductor. The horizontal axis represents frequency, with frequency increasing to the right. The vertical axis represents insertion loss in decibels.

The trace 1012 corresponds to the expected insertion loss of an RF attenuator with a MEMS capacitor, where the mechanical conductor membrane 702 is in a relatively low capacitance position such as shown in fig. 7D. The other traces 1014, 1016, 1018 correspond to the expected insertion loss of the RF attenuator when the mechanical conductor membrane 702 is in a relatively high capacitance position such as shown in FIG. 7E. Each trace 1014, 1016, 1018 corresponds to an expected insertion loss for a different capacitance. The corresponding capacitance of trace 1014 is greater than the corresponding capacitance of trace 1016, which in turn is greater than the corresponding capacitance of trace 1018. Also, as shown in the example of FIG. 3B, when the capacitance of the RF attenuator changes, the resonant frequency f of the RF attenuator₀Also should change and the insertion loss will generally be affected. This enables the insertion loss of the RF attenuator with MEMS capacitor to be selected according to the amount of capacitance that is activated.

For example, the resonant frequency f of the RF attenuator₀Based at least in part on the capacitance of the MEMS capacitor. The RF attenuator can be modeled by the RLC circuit 1102 shown in FIG. 11. For example, a first terminal 1104 may correspond to the input terminal of the RF attenuator. A second terminal1106 may correspond to output terminals. The first terminal 1104 and the second terminal 1106 may be located at opposite ends of the signal conductor. The resistance R models the resistance of the signal conductor. The RLC circuitry 1102 models the selectable capacitance to signal ground provided by the MEMS capacitor.

A change in the capacitance of the RF attenuator correspondingly changes the resonant frequency f of the RF attenuator₀. Accordingly, the resonant frequency of the variable attenuator may be controlled in accordance with the control voltage applied to the MEMS capacitor of the RF attenuator. This enables, for example, an RF attenuator with a MEMS capacitor to be constructed as a tunable filter, wherein the resonant frequency of the filter can be modified or selected by a control circuit that controls the voltage level applied to actuate one or more portions or membranes of the MEMS capacitor. Furthermore, one or more of the RF attenuators exhibiting different resonant frequencies may be implemented as a band pass filter or a notch filter.

FIGS. 12A, 12B and 12C show examples of simplified equivalent circuits of a MEMS capacitor. MEMS capacitor C_MEMS1202 the membrane may be coupled to ground as shown in fig. 12A. A control bias selectively controls the MEMS capacitor C by selectively pulling in the membrane_MEMS1202. Can pass through a coupling capacitor C_C1204 capacitively couples one or more signals to the MEMS capacitor C_MEMS1202. It should be appreciated that the input signal and the output signal may be coupled to the MEMS capacitor C, respectively_MEMS1202。

FIG. 12B shows at least one membrane in a MEMS capacitor not directly coupled to DC ground. This enables individual control of the individual membranes of a MEMS capacitor having a plurality of membranes. For example, the control bias on the membrane may be set using the configuration described above in connection with FIG. 8A. A first film having a selectable capacitance C_MEMS11212, the optional capacitor C_MEMS11212 are controlled at least in part by a control bias on the signal conductor (control a) and a control bias on the membrane (control B). Can use a capacitor C_S1216 provide a signal ground for the first film. Thereby making the capacitance C_S1216 should not significantly affect the series combination of capacitance to signal ground, it should be understood that and may be selected from optional capacitance C_MEMS11212 selected capacitance of the capacitor C_SThe capacitance of 1216 should be relatively high.

A second film having a selectable capacitance C_MEMS21214. In the circuit shown, the second membrane is coupled to ground and the excitation is controlled by a control bias on the signal conductor (control a). One or more coupling capacitors C may be used again_C1218 to isolate the control bias from the signal. In one embodiment, the signal flows through a selectable capacitor C_MEMS11212 and optional capacitance C_MEMS21214, the different films modeled. The second film may also be independently biased (control C) and passed through a coupling capacitor C_S1218 and AC to signal ground as shown in fig. 12C. In addition, there may be other films with independently controlled bias voltages.

Fig. 13A-13I illustrate a process of fabricating a MEMS capacitor, such as the MEMS capacitor shown in fig. 7D and 7E. The skilled person will appreciate that the illustrated process can be modified in various ways. Advantageously, the MEMS capacitor may be fabricated using semiconductor fabrication techniques. For example, in another embodiment, various portions of the illustrated process can be combined, can be rearranged in an alternative order, can be deleted, and the like.

FIGS. 13A-13I illustrate cross-sectional views of a MEMS capacitor at various stages of fabrication. FIG. 13A shows a substrate assembly 1300 with conductive lines formed on the substrate assembly 1300 for signal conductors 1302 and for voltage reference lines 1304, 1306. For example, the conductive lines may be formed by blanket deposition of a conductive material such as aluminum, and by photoresist patterning and etching. In addition, at least one of the voltage reference lines 1304, 1306 can be further patterned into separate conductive lines when it is desired to independently energize each thin film by separate control bias voltages.

Fig. 13B shows an insulating layer 1308 over the substrate assembly 1300. The insulating layer 1308 can be formed of a wide variety of materials, such as silicon oxide, silicon nitride, aluminum oxide, and the like. The insulating layer 1308 can be patterned using photolithographic techniques to leave insulating layer portions 1310 behind where desired, as shown in fig. 13C. In fig. 13C, the insulating layer is shown leaving signal conductor 1302. An insulating layer may also be left on at least some of the voltage reference lines when it is desired to separately energize the films.

In fig. 13D, a sacrificial material 1312 is blanket deposited. The sacrificial material 1312 is eventually removed. Examples of sacrificial materials suitable for use include silicon and molybdenum. Other materials will be readily ascertainable by one of ordinary skill in the art. To obtain the posts 1314 and anchor points 1316 for the membrane, the sacrificial material 1312 is patterned as shown in FIG. 13E.

Fig. 13F shows blanket depositing a material 1318 to obtain the pillars. For example, the posts may be formed from a photosensitive polymeric material, i.e., photoresist. For example, the photosensitive polymer material may be patterned by exposure through a mask and chemical development to form the posts. Accordingly, the post material 1318 in selected areas is removed and/or reduced in thickness. For example, FIG. 13G shows the removal of post material from the anchor points 1316 of the membrane. If desired, chemical mechanical polishing can be performed to planarize the upper surface of the posts 1320 and the sacrificial material (not shown).

FIG. 13H shows the blanket deposition of a material 1322 to form the mechanically conductive film. For example, aluminum may be deposited on the substrate assembly. The material 1322 may be patterned to form individual films and the like. In addition, relatively small holes may be patterned in the material 1322. These holes allow the gaseous etchant to access and remove the remaining portion of the sacrificial material 1312 from under the film, resulting in the structure shown in FIG. 13I.

Various embodiments have been described above. While described with reference to these specific embodiments, the description is intended to be illustrative and not restrictive. Various modifications and applications may occur to those skilled in the art without departing from the true spirit and scope of the invention as defined in the appended claims.

Claims (60)

1. An apparatus having a selectable capacitance, said apparatus comprising:

at least two electrodes, wherein at least one electrode is controllably movable relative to the other electrode to provide adjustability to a gap defined between the at least two electrodes, wherein at least one of the electrodes carries an RF signal; and

a plurality of struts arranged between the at least two electrodes, wherein the plurality of struts are configured to tension at least one of the electrodes.

2. The apparatus of claim 1, further comprising a circuit configured to selectively apply a DC bias between two electrodes, at least one of the two electrodes being the movable electrode, such that the circuit adjusts the size of the gap between the two electrodes.

3. The apparatus of claim 1, further comprising:

a processor in electrical communication with the at least two electrodes, the processor configured to process data; and

a storage device in electrical communication with the processor.

4. The apparatus of claim 3, further comprising a drive circuit configured to send at least one signal to the at least two electrodes.

5. The apparatus of claim 4, further comprising a controller configured to send at least a portion of the data to the drive circuit.

6. The apparatus of claim 3, further comprising a data source module configured to send the data to the processor.

7. The apparatus of claim 6, wherein the data source module comprises at least one of a receiver, transceiver, and transmitter.

8. The apparatus of claim 3, further comprising an input device configured to receive input data and to communicate the input data to the processor.

9. A capacitor having a selectable capacitance, said capacitor comprising:

means for carrying an RF signal, said carrying means having a gap that is controllably adjustable; and

a member for tensioning at least a portion of the carrier member.

10. The capacitor of claim 9, wherein the carrier member comprises at least two electrodes, wherein at least one electrode is movable relative to the other electrode.

11. The capacitor of claim 9 wherein said tension member comprises one or more posts disposed proximate a movable portion of said carrier member.

12. The capacitor of claim 9 wherein said carrier member comprises a deformable membrane.

13. The capacitor of claim 12 wherein said carrier member further comprises a circuit configured to selectively apply a DC bias.

14. The capacitor of claim 13, wherein said carrier member comprises a plurality of gaps between a conductive line configured to carry an RF signal and a conductive film.

15. The capacitor of claim 13, wherein the carrier member further comprises:

means for selecting a DC bias; and

means for applying the DC bias to the at least two electrodes.

16. The capacitor of claim 15 wherein said selection means comprises a processor or a logic circuit.

17. The capacitor of claim 16 wherein said means for applying comprises a switch.

18. A method of selecting a capacitance, the method comprising:

adjusting a gap between at least two electrodes, wherein at least one of the electrodes carries an RF signal; and

tensioning at least one of the electrodes.

19. The method of claim 18, wherein adjusting the gap further comprises:

selecting a DC bias voltage; and

applying the DC bias to the at least two electrodes.

20. The method of claim 18, wherein adjusting the gap comprises adjusting a plurality of gaps between a conductive line configured to carry the RF signal and a plurality of electrodes.

21. A method of manufacturing a capacitor having a selectable capacitance, the method comprising:

forming a first electrode;

forming a second electrode so as to be movable relative to the first electrode to provide adjustability to a gap defined between the first electrode and the second electrode; and

forming a plurality of struts configured to tension at least the second electrode, wherein the struts are arranged between the electrodes.

22. The method of claim 21, further comprising forming the first electrode from an opaque material.

23. A capacitor made according to the method of claim 21.

24. An RF device, comprising:

a first conductor for carrying an RF signal; and

a deformable membrane spaced from the first conductor, the deformable membrane configured to selectively filter the RF signal, the deformable membrane having at least three discrete energizable positions for selectively filtering the RF signal.

25. The RF device of claim 24, wherein the deformable membrane comprises a single membrane.

26. The RF device of claim 24 wherein the deformable membrane includes two or more separate membranes.

27. The RF device of claim 24 further comprising a capacitor having a selectable capacitance, the capacitor comprising:

a substrate assembly;

a signal conductor on said substrate assembly, wherein said signal conductor forms a first electrode of said capacitor;

a dielectric material layer covering at least an upper surface of the signal conductor; and

one or more mechanical conductor membranes alternately located on the substrate assembly such that the signal conductor is arranged between the substrate assembly and the one or more mechanical conductor membranes, wherein the one or more mechanical conductor membranes form a second electrode of the capacitor, wherein at least two or more portions of the one or more mechanical conductor membranes are at least partially independently movable from a low capacitance position and a high capacitance position, the accessible positions comprising: a discrete first capacitive location of at least a selected two portions of the mechanical conductor membrane; a discrete second capacitive location of said selected two portions of said mechanical conductor membrane, said discrete second capacitive location having a capacitance greater than said discrete first capacitive location; and a discrete third capacitive construction having a capacitance greater than the discrete first capacitive location but less than the discrete second capacitive location, in which a selected one of the two portions is in the discrete second capacitive location and the other portion is in the discrete first capacitive location, wherein the selected location is determined at least in part by the voltage on the signal conductor.

28. The RF device of claim 27, wherein at least two or more portions correspond to a single continuous section of the mechanical conductor membrane, and wherein the two or more portions differ by at least one of: (a) the presence or absence of pillars disposed between the substrate assembly and the segment of the mechanical conductor membrane, (b) differences in pillar heights, (c) differences in spacing between pillars, or (d) combinations thereof.

29. The RF device of claim 27 wherein at least two or more portions of the one or more mechanical conductor membranes correspond to separate segments of the mechanical conductor membranes forming a common electrode coupled to a signal ground, wherein the separate segments are DC isolated from each other and coupled to separate bias voltages for independent control of the separate segments.

30. The RF device of claim 27 wherein a plurality of signal conductors and a plurality of multiple segments of the mechanical conductor membrane are arranged in rows and columns.

31. The RF device of claim 24, further comprising:

a processor in electrical communication with at least one of the first conductor and the deformable membrane, the processor configured to process data; and

a storage device in electrical communication with the processor.

32. The RF device of claim 31, further comprising a drive circuit configured to send at least one signal to at least one of the first conductor and the deformable membrane.

33. The RF device of claim 32 further comprising a controller configured to send at least a portion of the data to the drive circuit.

34. The RF device of claim 31 further comprising a data source module configured to send the data to the processor.

35. The RF device of claim 34 wherein the data source module includes at least one of a receiver, transceiver, and transmitter.

36. The RF device of claim 31 further comprising an input device configured to receive input data and to communicate the input data to the processor.

37. An RF device, comprising:

means for carrying an RF signal; and

means for filtering the RF signal, the filtering means being deformable to at least one of three discrete energizable positions for selective filtering of the RF signal.

38. The RF device of claim 37 wherein the carrier member includes a conductive wire.

39. The RF device of claim 38 wherein the filtering means includes two or more independently energizable portions of one or more deformable membranes, at least in part.

40. The RF device of claim 39 wherein the filtering means is configured to render the at least two energizable portions independently energizable.

41. A method of filtering an RF signal, the method comprising:

carrying the RF signal in a conductive wire; and

selectively filtering the RF signal using a deformable membrane having at least three discrete energizable positions for selectively filtering the RF signal, wherein the deformable membrane is proximate to the conductive wires.

42. The method of claim 41, wherein selectively filtering comprises actuating two or more portions of one or more deformable membranes that are independently actuatable, at least in part.

43. A method of manufacturing an RF device having a selectable capacitance, the method comprising:

forming a first conductor for carrying an RF signal; and

forming a deformable membrane spaced from the first conductor, the deformable membrane configured to selectively filter the RF signal, the deformable membrane having at least three discrete energizable positions to selectively filter the RF signal.

44. The method of claim 43, further comprising:

forming a substrate assembly;

forming the first conductor on the substrate assembly;

forming a dielectric material layer covering at least an upper surface of the first conductor; and

the deformable membrane is formed in spaced relation over the substrate assembly such that the first conductor is disposed between the substrate assembly and the deformable membrane.

45. The method of claim 44, wherein the deformable membrane corresponds to a single continuous segment of a mechanical conductor membrane.

46. The method of claim 44, further comprising forming at least two or more segments of the deformable membrane, wherein the individual segments are DC isolated from each other and coupled to individual bias voltages for independently controlling the individual segments.

47. An RF device made according to the method of claim 43.

48. A voltage controlled capacitor, comprising:

a substrate assembly having an input terminal, a control terminal, and a voltage reference terminal;

voltage reference lines disposed on the substrate assembly, wherein at least one of the voltage reference lines is coupled to the voltage reference terminal;

a mechanical conductor membrane positioned on the substrate assembly at intervals and coupled to one or more of the voltage reference lines at opposite ends of the mechanical conductor membrane;

one or more support posts disposed between the substrate assembly and the mechanical conductor membrane, wherein the one or more support posts support the mechanical conductor membrane;

a signal conductor disposed on said substrate assembly, wherein a voltage on said control terminal at least partially controls a position of said mechanical conductor membrane;

a dielectric material layer disposed between a top surface of the signal conductor and the mechanical conductor membrane; and

a coupling capacitor having a first terminal and a second terminal, wherein the first terminal is coupled to the input terminal, and wherein the second terminal is coupled to the signal conductor.

49. The capacitor as defined in claim 48, wherein the signal conductor comprises an opaque material.

50. The capacitor of claim 48, wherein the material of the signal conductor comprises at least one of silver, copper, gold, aluminum, or combinations thereof.

51. The capacitor of claim 48, wherein the signal conductor is of a material having a thickness of less than 1 x 10^-6Ohm-meter (omega-m) resistivity.

52. The capacitor of claim 48, wherein the signal conductor is of a material having a thickness of less than 0.1 x 10^-6Ohm-meter (omega-m) resistivity.

53. The capacitor as defined in claim 48, wherein the layer of dielectric material is disposed directly on the top surface of the signal layer.

54. The capacitor of claim 48 further comprising an insulator disposed between at least one end of the mechanical conductor membrane and a corresponding voltage reference line.

55. The capacitor of claim 54 wherein the voltage reference line corresponds to a signal ground but is configured with a DC bias.

56. The capacitor of claim 48, wherein the voltage reference terminal is configured to be coupled to a signal-ground reference.

57. The capacitor of claim 48, further comprising an output terminal coupled to an end of the signal conductor opposite the input terminal.

58. The capacitor as defined in claim 48, wherein the capacitor is included in an RF attenuator.

59. The capacitor of claim 48 wherein the layer of dielectric material disposed between the top surface of the signal conductor and the mechanical conductor membrane has a thickness in the range of 0.1 to 0.5 microns.

60. The capacitor as defined in claim 48, wherein the signal conductor has a thickness in the range of 0.5 to 5 microns.