GB2565861B

GB2565861B - Apparatus for use in a resonant converter

Info

Publication number: GB2565861B
Application number: GB1800642.9A
Authority: GB
Inventors: Toyos Bada Carlos; John Skinner Andrew
Original assignee: TDK Lambda UK Ltd
Current assignee: TDK Lambda UK Ltd
Priority date: 2018-01-15
Filing date: 2018-01-15
Publication date: 2019-10-23
Anticipated expiration: 2038-01-15
Also published as: GB201800642D0; GB2565861A

Description

Apparatus for use in a Resonant Converter

Field

The application relates, amongst other things, to apparatus for use in a resonant converter and, in particular, apparatus for facilitating emulated current-mode control of a resonant converter.

Background

Resonant dc-dc converters such as those based on LLC series circuits are of interest due, in particular, to their high efficiencies. However, such converters can be difficult to control, especially over a wide operating range. This is at least partly due to the converter having a transfer function that changes with operating point.

Known techniques for controlling resonant dc-dc converters include average currentmode control, peak current-mode control, and charge control. See, for example, Park et al, 'Average Current-mode Control for LLC Series Resonant dc-dc Converters', Journal of Power Electronics, vol. 14, no. 1, p.40-47, 2014; Jang et al 'Current-mode Control for LLC Series Resonant dc-dc Converters', Energies vol. 8, no. 6, p. 6098-6113, 2015; and 'AN-6104. LLC Resonant Converter Design using FAN7688 (rev 1.0)', Fairchild Semiconductor Corporation, 16 Sep. 2015.

However, these techniques can have certain disadvantages. For example, average currentmode control generally has a relatively limited bandwidth due to the averaging process, while peak current-mode control and charge control involves signals that generally become undetectable at low loads.

Summary

According to an aspect of the present invention, there is provided apparatus for facilitating emulated current-mode control of a resonant converter, the apparatus comprising: an input for a first signal suitable for use in determining a phase of a resonant current, wherein the resonant current corresponds to a current in a resonant network of the converter; an input for a second signal suitable for use in determining a target phase difference between the resonant current and a driving voltage, wherein the driving voltage corresponds to a voltage provided by a switch network of the converter to the resonant network; one or more outputs for one or more control signals for controlling operation of the switch network; and circuitry configured to: use the first signal in determining a first value, wherein the first value is related to a phase difference between the resonant current and the driving voltage; use the second signal in determining a second value, wherein the second value is related to the target phase difference; and set the one or more control signals based at least in part on a comparison of the first and second values, wherein the one or more control signals are for causing the phase difference to track the target phase difference.

Thus, the apparatus can provide an alternative way of controlling a resonant converter and which also has several advantages over known techniques - for example, a higher bandwidth.

The apparatus is typically used in an 'inner loop' of a converter, wherein an 'outer loop' senses an output level of the converter and produces a signal corresponding to the second signal. Together, the outer and inner loops can cause the output level of the converter to track a target output level.

The second signal may be indicative of a target output current of the converter. The circuitry may be configured to determine the second value in accordance with a known relationship between the output current and the phase difference between the resonant current and the driving voltage. Thus, the apparatus can be used with an outer loop that produces a current demand signal.

Alternatively, the second signal may be indicative of the target phase difference.

The first value may correspond to the phase difference, and the second value may correspond to the target phase difference. The phase differences may be numerically represented by the values in any suitable way.

References herein to phase (rather than phase difference) refer to phase relative to an arbitrary common reference.

The first signal may be indicative of the timing of zero-crossings of the resonant current. Such a signal is particularly convenient for determining the phase of the resonant current.

The apparatus may comprise means for obtaining a second signal suitable for use in determining the phase of the driving voltage.

The circuitry may be configured to determine the first value using the first signal and at least one of the one or more control signals. The apparatus may make use of control signals in determining the phase of the driving voltage.

Alternatively, the apparatus may comprise an input for a third signal suitable for use in determining a phase of the driving voltage, and the circuitry may be configured to determine the first value using the first signal and the third signal.

The circuitry may be configured to determine the first value based on: a value indicative of a time difference between a zero-crossing of the resonant current and a zero-crossing of the driving voltage; and a value indicative of the period of the resonant current and the driving voltage. The circuitry may be configured to determine the value indicative of the period in accordance with a frequency of operation of the switch network set by the circuitry. These operations can be performed particularly quickly and/or efficiently.

The circuitry may be configured to adjust the value indicative of the time difference so as to overestimate a time lag of the resonant current with respect to the driving voltage. The circuitry may be configured to determine the first value based on the adjusted value indicative of the time difference. This can introduce negative feedback to counteract the effect of timing errors.

The circuitry may configured to constrain the second value to a particular range. The range may correspond to a phase lag of the resonant current with respect to the driving voltage being greater than zero. Thus, hard switching can be automatically avoided.

The one or more control signals may be suitable for changing an operating frequency and/or a duty cycle of the switch network. Thus, the phase difference can be changed in several different ways.

The apparatus may comprise: means for obtaining a third signal suitable for use in determining a phase of the driving voltage; and the circuitry may be further configured to: use the first signal and the third signal in determining a value related to a phase difference between the resonant current and the driving voltage; and take one or more actions in response to the value meeting one or more criteria.

Thus, the apparatus can provide a particularly fast-acting way of monitoring a resonant converter and responding accordingly.

The one or more actions may correspond to providing a signal for stopping or limiting an output of the converter. The one or more criteria may correspond to the value being indicative that the phase difference is outside a range corresponding to an output current above a maximum output current Thus, the apparatus can provide over-current protection with low delay compared, for example, to conventional techniques that measure current

The circuitry may comprise a microcontroller. The circuitry may comprise at least one processor and non-transitory memory storing computer programme code. The computer programme code, when executed by the at least one processor, may cause the circuitry to set the one or more control signals. Thus, the apparatus can be provided in an efficient way.

There may be provided a resonant converter with control circuitry comprising: an inner loop comprising the apparatus; and an outer loop configured to sense an output level of the converter and to produce a signal corresponding to the second signal, wherein the inner and outer loops cause an output level of the converter to tend towards a target output level.

According to another aspect of the present invention, there is provided a method for use by apparatus for facilitating emulated current-mode control of a resonant converter, the apparatus comprising an input for a first signal suitable for use in determining a phase of a resonant current, wherein the resonant current corresponds to a current in a resonant network of the converter, an input for a second signal suitable for use in determining a target phase difference between the resonant current and a driving voltage, wherein the driving voltage corresponds to a voltage provided by a switch network of the converter to the resonant network, and one or more outputs for one or more control signals for controlling operation of the switch network, the method comprising: using the first signal in determining a first value, wherein the first value is related to a phase difference between the resonant current and the driving voltage; using the second signal in determining a second value, wherein the second value is related to the target phase difference; and setting the one or more control signals based at least in part on a comparison of the first and second values, wherein the one or more control signals are for causing the phase difference to track the target phase difference.

There may be provided a non-transitory computer-readable storage medium storing a computer programme comprising instructions that, when executed by one or more processors, cause the one or more processors to perform the method.

Brief Description of the Drawings

Certain embodiments of the present invention will now be described, by way of example, with reference to the accompanying drawings, in which:

Figure 1 schematically illustrates an example of a resonant converter;

Figure 2 schematically illustrates operations performed by a controller in the converter of Figure 1;

Figure 3 shows measured phase difference as a function of output current for a converter of the type shown in Figure 1;

Figure 4 shows several traces for a converter of the type shown in Figure 1;

Figure 5 shows measured output current versus output voltage for a converter of the type shown in Figure 1 operated with a fixed phase demand signal;

Figures 6 show Bode plots at different load currents (A: 12 A, B: 2.0 A, C: 1.0 A) for a resonant network in a converter of the type shown in Figure 1;

Figure 7 shows a response of an output voltage to a step change in load current (A: from 0 to 12 A, B from 12 to 0 A) for a converter of the type shown in Figure 1; and Figure 8 schematically illustrates operations performed by a controller in another example of a resonant converter.

Detailed Description of the Certain Embodiments A dc-dc resonant converter

Referring to Figures 1 and 2, an example of a resonant dc-dc converter 1 (hereinafter referred to as simply a 'converter') will now be described.

Referring in particular to Figure 1, the converter 1 includes an input la (hereinafter referred to as the 'main input'), a switch network 2 connected to the main input la, a resonant network 3 connected to the switch network 2, a rectifier and filter section 4 connected to the resonant network 3, and an output lb (hereinafter referred to as the 'main output') connected to the rectifier and filter section 4.

The converter 1 further includes two sets of circuitry 10, 20 (hereinafter referred to as the 'outer loop' and the 'inner loop circuitry') for emulating current-mode control of the converter 1. A dc input (with a voltage hereinafter referred to as the 'input voltage') may be provided to the main input la. A load 100 (with an impedance hereinafter referred to as the 'load impedance') may be connected to the main output lb. The main output lb provides a dc output (with a voltage hereinafter referred to as the 'output voltage' and a current hereinafter referred to as the 'output current'). As will be appreciated, the input voltage and/or the load impedance may vary. In this example, the converter 1 seeks to provide a dc output with a particular output voltage (hereinafter referred to as the 'voltage setpoint').

The switch network 2 will now be described in more detail.

In this example, the switch network 2 has a half-bridge configuration. However, the switch network 2 may be different and, for example, may have a full-bridge configuration.

The switch network 2 has two switches 2a, 2b (hereinafter referred to as 'first' and 'second' switches). The first and second switches 2a, 2b may be metal-oxide-semiconductor field-effect transistors (MOSFETs). The first switch 2a has its drain terminal connected to the main input la and its source terminal connected to a node 2c (hereinafter referred to as the 'midpoint'). The second switch 2b has its drain terminal connected to the midpoint 2c and its source terminal connected to ground.

As will be explained in more detail below, the first and second switches 2a, 2b are switched alternately on and off. Hence the voltage at the midpoint 2c corresponds to a square wave (this voltage is hereinafter referred to as the 'driving voltage' and its frequency is hereinafter referred to as the 'operating frequency').

The resonant network 3 will now be described in more detail.

In this example, the resonant network 3 corresponds to an LLC series circuit. However, the resonant network 3 may be different and, for example, may have different and/or differently-arranged elements.

The resonant network 3 includes a capacitor 3a, an inductor 3b and a transformer 3c. The transformer 3c has primary and secondary windings. The capacitor 3a, the inductor 3b and the primary winding of the transformer 3c are connected in series (in any order) between the midpoint 2c of the switch network 2 and ground. The inductor 3b and the transformer 3c may be provided as two separate components or they may be integrated into a single component. In addition, a resistor 22 (which is part of the inner loop circuitry 20) is connected between the primary winding of the transformer 3c and ground.

The capacitance of the capacitor 3a and the inductances of the inductor 3b and the primary winding of the transformer 3c at least partly determine the response of the resonant network 3 to the driving voltage. In particular, these values at least partly determine the current (hereinafter referred to the 'resonant current') through the resonant network 3 in response to the driving voltage. The resonant current through the primary winding of the transformer 3c induces a voltage in the secondary winding.

The rectifier and filter section 4 will now be described in more detail.

In this example, the rectifier and filter section 4 has two inputs. One of these inputs is connected to one end of the secondary winding of the transformer 3c, and the other one of the inputs is connected to the other end of the secondary winding. However, the rectifier and filter section 4 may be connected to the secondary winding of transformer 3c in any suitable way. Hence the rectifier and filter section 4 receives an ac input from the transformer 3c.

The rectifier and filter section 4 may include any suitable rectifier and filter circuitry. The filter circuitry may include, amongst other things, a capacitor (hereinafter referred to as the 'output capacitor').

The rectifier and filter section 4 has an output connected to the main output lb. Hence the rectifier and filter section 4 provides a dc output corresponding to that of the main output lb.

The outer loop circuitry 10 will now be described in more detail.

The outer loop circuitry 10 produces a signal (hereinafter referred to as the 'current demand signal') which depends on the output voltage and the voltage setpoint. In this example, the current demand signal is an analogue signal.

Accordingly, the outer loop circuitry 10 has an input connected to the main output lb of the converter 1 for sensing the output voltage.

The outer loop circuitry 10 also includes suitable circuitry to define the voltage setpoint. In other examples, the voltage setpoint may be defined differently and, for example, may be defined by a signal provided to the outer loop circuitry 10.

The outer loop circuitry 10 also has an output connected, via an isolator 5, to the inner loop circuitry 20. The isolator 5 transfers the current demand signal from the outer loop circuitry 10 to the inner loop circuitry 20. In doing so, the isolator 5 may change the amplitude of the current demand signal. The isolator 5 may be of any suitable type - for example, an opto-isolator.

The outer loop circuitry 10 (with the isolator 5) is configured to produce a suitable current demand signal - in particular, a signal with an amplitude indicative of a target output current for causing the output voltage to tend to the voltage setpoint. Determining a target output current typically involves determining an error based on the difference between the output voltage and the voltage setpoint and then determining a target output current based on this error. The current demand signal may be determined in any suitable way using any suitable circuitry. See, for example, Park et al, 'Average Current-mode Control for LLC Series Resonant dc-dc Converters', Journal of Power Electronics, vol. 14, no. 1, p.40-47, 2014.

The inner loop circuitry 20 will now be described in more detail.

In brief, the inner loop circuitry 20 uses the current demand signal to produce a 'phase demand signal' and uses the phase demand signal to adjust the phase difference between the resonant current and the driving voltage (hereinafter sometimes referred to as the 'relevant phase difference').

The inner loop circuitry 20 includes a controller 21. In this example, the controller 21 corresponds to a microcontroller. However, the controller 21 may be different. The controller 21 may include any suitable analogue and/or digital circuitry. The controller 21 may include one or more suitably-programmed general-purpose elements.

The controller 21 includes two inputs 21a, 21b (hereinafter referred to as 'first' and 'second' inputs) and two outputs 21c, 2Id (hereinafter referred to as 'first' and 'second' outputs). The controller 21 also includes at least one processor 21e and memory 21f. The memory 2If includes non-volatile memory storing computer programme code which, when executed by the processor 21e, causes the processor 21e to operate as described herein. The controller 21 also includes several peripherals, i.e. a timing section 21g, an analogue-to-digital (A/D) converter 21h and a control signal section 21i.

The first input 21a is connected to the resonant network 3 for detecting the phase of the resonant current. In this example, this involves detecting the timing of zero-crossings of the resonant current. Accordingly, the inner loop circuitry 20 includes a resistor 22 (described above) and a comparator 23. The comparator 23 has one of its inputs connected to ground and the other of its inputs connected to a node 24 between the primary winding of the transistor 3c and the resistor 22. Hence the comparator 23 produces a signal (hereinafter referred to as the 'resonant current timing signal') with edges that are coincident with the zero-crossings of the resonant current. The first input 21a is connected to the comparator 23 to receive the resonant current timing signal therefrom.

The second input 21b is connected to the isolator 5 to receive the current demand signal therefrom.

The first output 21c is connected, via a gate drive section 6, to a gate terminal of the first switch 2a. The second output 21d is similarly connected to the second switch 2b. The gate drive section 6 may include any suitable gate drive circuitry. The first and second outputs 21c, 2 Id are for providing signals (hereinafter referred to as the 'first' and 'second' control signals) for controlling switching of the first and second switches 2a, 2b, respectively.

The timing section 21g determines the time difference between each zero-crossing of the driving voltage and each zero-crossing of the resonant current.

Accordingly, the timing section 21g is connected to the first input 21a to receive the resonant current timing signal.

In this example, the timing section 21g determines the timing of the zero-crossings of the driving voltage based on the first and/or second control signals. In other words, the first and/or second control signals are taken as representative of the driving voltage. Hence, in this example, the timing section 21g is connected to the first output 21c to sense the first control signal. In other examples, the timing section 21g may use different signals/data relating to the first and/or second control signals.

The timing section 21g detects edges of the resonant current timing signal (corresponding to zero-crossings of the resonant current) and edges of the first control signal (corresponding to zero-crossings of the driving voltage). The timing section 21g determines, for example, a time lag of each zero-crossing of the resonant current with respect to each zero-crossing of the driving voltage. The timing section 21g outputs a digital signal (hereinafter referred to as the 'time difference signal'). The time difference signal is made up of values (hereinafter referred to as 'time difference values') each of which is indicative of a time lag as defined above. The time lags may be numerically represented by the time difference values in any suitable way. If, for example, both directions of zero-crossings are used, then time difference values may be determined each half period of the driving voltage/resonant current.

The A/D converter 21h is connected to the second input 21b to receive the current demand signal. The A/D converter 21h converts the current demand signal from an analogue to a digital version. The amplitude of the analogue version of the current demand signal may be numerically represented in the digital version in any suitable way.

Referring in particular to Figure 2, the processor 21e performs several operations based on the time difference signal and the digital version of the current demand signal. These operations are illustrated schematically by the blocks 201-205 in the figure.

At a first block 201, the processor 21e uses the time difference signal to determine a further signal (hereinafter referred to as the 'phase signal'). The phase signal is made up of values each of which is indicative of the phase difference between the resonant current and the driving voltage (these values are hereinafter referred to as 'phase values').

In determining the phase signal, the processor 21e also uses values indicative of the period of the driving voltage/resonant current. As will be explained in more detail below, the processor 21e sets the operating frequency of the switch network 2 and this corresponds to the frequency of the driving voltage/resonant current. Hence, the processor 21e may use a recently-set value of operating frequency when determining a phase value.

The processor 21e may determine phase values using an equation of the form: Φ = fa + Tcomp)x 360/T, (Equation 1) where Φ is the relevant phase difference (in degrees), Td is a time lag as defined above, i.e. a time lag of a zero-crossing of the resonant current with respect to a zero-crossing of the driving voltage, TCOmp is a compensation term, and T is the period of the driving voltage/resonant current.

The processor 21e may use a compensation term (e.g. TComP in Equation 1) when determining phase values so as to overestimate rather than underestimate the relevant phase difference. This is because, if a measured time lag is too low, then the calculated phase difference is also too low and the error in the phase difference increases with increasing operating frequency, thus disadvantageously introducing positive feedback. The compensation term artificially increases the calculated phase difference such that the error in the phase difference increases with increasing frequency, thus introducing negative feedback to counteract the effect of timing errors.

The relevant phase difference may be numerically represented by the values in any suitable way and with any suitable scaling. For example, a phase difference of 90° may be represented by a (16-bit integer) value of 16,384. Such an approach can provide relatively high resolution.

The relevant phase difference is preferably defined to be positive when the resonant current lags the driving voltage. This definition is generally used herein.

At a second block 202, the processor 21e uses (the digital version of) the current demand signal to produce a further signal (hereinafter referred to as the 'phase demand signal'). The phase demand signal is made up of values each of which is indicative of a target phase difference between the resonant current and the driving voltage.

Figure 3 shows the results of measurements of phase difference as defined above (i.e. phase lag of the resonant current with respect to the driving voltage) as a function of output current for a converter of the type described herein. The measurements were performed at constant input voltage, i.e. 300 V or 390 V. It can be seen that the phase difference is an approximately linear function of output current. Hence this shows that the phase difference can be effective in emulating current-mode control of such a converter.

The processor 21e determines the phase demand signal from the current demand signal using a suitable function (hereinafter referred to as the 'phase demand function'). For example, the phase demand function may be a linear function with coefficients determined based on measurements (such as those described above in relation to Figure 3), simulations or calculations.

The same numerical representation is preferably used for the target phase difference as for the phase difference. The numerical representation preferably allows the target phase difference to be greater than +90° (for example 110°), due at least in part to the compensation term used when determining the phase values.

The processor 21e also preferably includes a mechanism to force the operating frequency to a particular value, e.g. the maximum operating frequency, under particular conditions, e.g. when a target phase difference cannot be achieved. This can have the effect of limiting the output current and/or stopping an output voltage overshoot In relation to an overshoot, an increasing output voltage should be stopped as quickly as possible. Using phase control as described herein to limit the overshoot may take too long and so may lead to an out-of-specification overshoot. In contrast, by forcing the operating frequency to a maximum as described above, an overshoot voltage can be stopped almost immediately. An overshoot can be detected by detecting that the phase demand signal has remained below a particular value for a predetermined period of time.

The processor 21e may further modify the phase demand signal. For example, the processor 21e may constrain the phase demand signal to a particular range. This range may correspond to phase difference as defined above (i.e. phase lag of the resonant current with respect to the driving voltage) being greater than zero and, in particular, greater than a minimum phase difference. The minimum phase difference may be, for example, 20°. Such a value also accounts for the compensation term used when determining the phase values. Constraining the phase demand signal in this way can ensure that the switch network 2 generally remains in a soft switching state, and that the power stage (i.e. the resonant network 3, etc.) of the converter 1 remain inductively loaded. Hence the controller 21 can be used to avoid hard switching, even without knowledge of the resonant frequencies of the resonant network 3.

Referring to Figure 2 again, at a third block 203, the processor 21e compares the phase signal with the phase demand signal to produce a further signal (hereinafter referred to as the 'phase error signal'). The phase error signal may correspond to the difference between the phase signal and the phase demand signal.

At a fourth block 204, the processor 21e filters the phase error signal to produce a further signal (hereinafter referred to as the 'filtered phase error signal'). In this example, the filter corresponds to a low-pass filter. However, the filter may have any suitable transfer function.

At a fifth block 205, the processor 21e determines a further signal (hereinafter referred to as the 'frequency signal') based on the filtered phase error signal. The frequency signal is made up of values each of which is indicative of an operating frequency that minimises the filtered phase error signal and hence causes the phase difference to track the target phase difference.

Accordingly, the processor 21e functions like a controller such as a proportional-integral controller with an input signal corresponding to the filtered phase error signal and an output signal corresponding to the frequency signal. The associated coefficients (e.g. the coefficients for the proportional and integral terms) may be determined in any suitable way.

The processor 21e may further modify the frequency signal. For example, the processor 21e may constrain the frequency signal to a range between upper and lower limits corresponding to maximum and minimum operating frequencies, respectively. This can improve reliability of the converter 1.

Referring to Figure 1 again, the processor 21e provides the frequency signal to the control signal section 21i.

The control signal section 2li generates the first and second control signals, i.e. the signals for controlling switching of the first and second switches 2a, 2b, respectively. In this example, the first and second control signals each correspond to a square wave with a ~50% duty cycle. The first and second control signals both have the same frequency, i.e. the operating frequency. The first and second control signals are in antiphase. The control signal section 21i functions like a controllable oscillator and sets the operating frequency based on the frequency signal.

Hence the inner loop circuitry 20, by varying the operating frequency, causes the relevant phase difference to follow the target phase difference and, because the relevant phase difference is related (approximately proportionally) to the output current, the inner loop circuitry 20 causes the output current to follow (suitably well) the target output current determined by the outer loop circuitry 20. Thus, the outer and inner loop circuitry 10, 20 together maintain the output voltage at the voltage setpoint.

Results

Referring to Figures 4 to 7, the results of several tests on converters of the type described herein will now be described.

Figure 4 shows various traces for a converter operated with a fixed phase demand signal and a fixed output current. A first trace 41 corresponds to the output voltage. A second trace 42 corresponds to a further feedback signal. A third trace 43 corresponds to the resonant current. A fourth trace 44 corresponds to a ('gate drive') signal provided to the gate of the second switch 2b.

Each horizontal division represents a time period of 640 ps.

It can be seen that, between times ti and t2, the output voltage 41 rises linearly, corresponding to a constant current charging the output capacitor. Hence this shows that a constant phase demand signal can produce an approximately constant output current.

In this instance, the converter has a protection mechanism that stops the converter when the further feedback signal 42 falls below ~0.1 V. This occurs at time t2.

Following re-start of the converter, i.e. at times to and t3, the resonant current exhibits only a relatively small overshoot. This shows a system with a well-damped characteristic.

Figure 5 shows output current versus output voltage for a converter operated with a fixed phase demand signal. It can be seen that the output current is approximately constant regardless of the output voltage. This shows that a constant phase demand can emulate a constant current with sufficient accuracy for the purposes of implementing a control loop.

Figure 6 shows Bode plots of the transfer function of the outer loop 10 (i.e. phase shift and gain versus frequency for output voltage versus current/phase demand signal). Results are shown for a converter operated with a fixed input voltage of 350 V, a fixed output voltage of 24 V, and three different load impedances and hence output currents, i.e. (a) 12 A, (b) 2.0 A and (c) 1.0 A.

It can be seen that the response is similar for a relatively wide range of output powers, i.e. 24 W to 288 W.

It can also be seen that there is consistently a -20dB/decade roll-off of the gain, a gain crossover frequency of ~700 Hz (and hence a suitably bandwidth, i.e. frequency range in which the system can reject disturbances), and values of gain margin of ~60° and phase margin of ~10 dB (indicative of a stable and slightly-underdamped system).

Figure 7 shows the transient response of output voltage to a step change in load impedance and hence load current, i.e. (a) from 0 to 12 A and (b) from 12 to 0 A. Each horizontal division represents a time period of 20 ms.

It can be seen that, in both instances, the recovery of the output voltage is characteristic of a slightly underdamped system (Q<1). It can also be seen that both recoveries are particularly smooth, clean and monotonic. This is in contrast to, for example, voltage-mode control, wherein different compensation laws interfere and produce temporary deviations during the recovery.

Advantages

In brief, it has been shown that the phase difference between the resonant current and the driving voltage can be used as an inner loop control variable in emulated current-mode control of a resonant dc-dc converter. This approach (hereinafter referred to as 'phase control') can provide several advantages.

In particular, the inventors have shown (e.g. through circuit simulation) that the relevant phase difference is a fast-changing signal compared, for example, to the signals used in average current-mode control or peak current-mode control. Thus, phase control can allow the bandwidth of the inner loop and hence the outer loop to be increased and hence the performance of the converter to be improved.

Furthermore, it has been shown that phase control (like conventional current-mode control) can result in a first-order system, for example akin to a current source driving a capacitor. Such a system is relatively easy to stabilise.

Furthermore, because phase control involves detecting the phase of the resonant current rather than, for example, its peak, it can avoid a disadvantage of some conventional current-mode control techniques, namely that the signals may become undetectable at low load.

Some further advantages of phase control (e.g. automatically avoiding hard switching) have been described above.

Moreover, these various advantages can be achieved without significant increases in manufacturing cost. This is due, in particular, to the control functionality being relatively easy to manage (e.g. to programme). Such control functionality can also minimise the introduction of delays and hence phase shifts and so can also allow for higher bandwidths. A further converter

Because the phase difference between the resonant current and the driving voltage is a relatively fast-changing signal, it responds relatively quickly to changes in relation to the converter - in particular, to changes in load impedance and hence output current. This can be exploited to provide a converter with an over-current protection mechanism that operates with reduced delay compared, for example, to conventional mechanisms that involve measuring current.

Referring in particular to Figure 8, an example of such a converter (hereinafter referred to as the 'further converter') will now be described.

The further converter includes the same elements as the converter 1 described above. However, the operations performed by the processor 21e are different. These operations are illustrated schematically by the blocks 301-304 in Figure 8.

At a first block 301, the processor 21e uses the time difference signal from the timing section 21g to determine a phase signal made up of phase values each of which is indicative of the relevant phase difference. This may be performed as described above in relation to the first block 201 of Figure 2.

At a second block 302, the processor 21e determines whether the phase signal is outside a range, which may correspond to an output current exceeding a maximum output current. The processor 21e may convert between phase differences and output currents, for example using the phase demand function described above in relation to the third block of Figure 2.

At a third block 303, the processor 21e performs inner loop control operations based, amongst other things, on the digital version of the current demand signal from the A/D converter 21h. These operations may correspond to the operations described above in relation to the blocks 201-205 of Figure 2. Hence, the processor 21e produces a frequency signal made up of values each of which is indicative of an operating frequency.

At a fourth block 304, the processor 21e selectively sets the frequency signal to a particular value if it was determined at the second block 302 that the phase signal was outside the range. The particular value preferably corresponds to the maximum operating frequency of the switch network 2, although it may correspond to any suitable frequency between the minimum and maximum operating frequencies, or to zero frequency (i.e. no switching). In any case, this will have the effect of stopping or limiting the output current.

The processor 21e then provides the frequency signal to the control signal section 21i, which generates the first and second control signals. Hence the further converter operates in the same way as the converter 1 described above, apart from when the phase signal is outside the range, in that case it operates at fixed frequency limiting the output current.

In this way, the controller 21 can implement low-delay over-current protection by detecting the phase difference between the resonant current and the driving voltage

Variations

It will be appreciated that there may be many other variations of the abovedescribed examples.

For instance, the converter 1 may seek to provide a dc output with a particular output current.

The outer loop circuitry 20 rather than the inner loop circuitry 10 may determine the phase demand signal.

The zero-crossings of the resonant current may be detected in a different way. Moreover, the phase of the resonant current may be detected in a way that does not involve detecting zero-crossings.

The phase of the driving voltage may be detected in a different way. For example, the controller 21 may have a further input for directly sensing the driving voltage (e.g. at the midpoint 2c of the switch network 2).

The relevant phase difference may be changed by changing the duty cycle of the first and second control signals. This may be instead of or in addition to changing the operating frequency.

One or more of the abovedescribed elements may be replaced by one or more elements with equivalent functionality and/or may be moved.

For example, the resistor 11 and the comparator 12 may form part of the controller 21.

Analogue signals may be replaced by digital signals and vice versa.

Operations performed by the processor 21e may be performed by other elements and vice versa.

The controller 21 may perform additional functions which are not described herein.

The operations performed at the third block 303 of Figure 8 may correspond to a different type of current-mode control, for example conventional current-mode control. In this case, the inner loop circuitry 10 may include different elements, for example to sense the resonant current.

Instead of, or in addition to, the operations performed at the fourth block 304 of Figure 8, other action(s) may be taken if the phase signal is outside the range. The output current may be limited in a different way, for example directly by the control signal section 21i.

The operations performed at the first and second blocks 301, 302 of Figure 8 may have applications in relation to devices other than dc-dc converters.

Claims

1. Apparatus for facilitating emulated current-mode control of a resonant converter, the apparatus comprising: an input for a first signal suitable for use in determining a phase of a resonant current, wherein the resonant current corresponds to a current in a resonant network of the converter; an input for a second signal suitable for use in determining a target phase difference between the resonant current and a driving voltage, wherein the driving voltage corresponds to a voltage provided by a switch network of the converter to the resonant network; one or more outputs for one or more control signals for controlling operation of the switch network; and circuitry configured to: use the first signal in determining a first value, wherein the first value is related to a phase difference between the resonant current and the driving voltage; use the second signal in determining a second value, wherein the second value is related to the target phase difference; and set the one or more control signals based at least in part on a comparison of the first and second values, wherein the one or more control signals are for causing the phase difference to track the target phase difference.

2. Apparatus according to claim 1 wherein the first signal is indicative of the timing of zero-crossings of the resonant current.

3. Apparatus according to claim 1 or 2 wherein the circuitry is configured to determine the first value using the first signal and at least one of the one or more control signals.

4. Apparatus according to claim 1 or 2 comprising: an input for a third signal suitable for use in determining a phase of the driving voltage; wherein the circuitry is configured to determine the first value using the first signal and the third signal.

5. Apparatus according to any preceding claim wherein the circuitry is configured to determine the first value based on: a value indicative of a time difference between a zero-crossing of the resonant current and a zero-crossing of the driving voltage; and a value indicative of the period of the resonant current and the driving voltage.

6. Apparatus according to claim 5 wherein the circuitry is configured to determine the value indicative of the period in accordance with a frequency of operation of the switch network set by the circuitry.

7. Apparatus according to claim 5 or 6 wherein the circuitry is configured to adjust the value indicative of the time difference so as to overestimate a time lag of the resonant current with respect to the driving voltage, and further configured to determine the first value based on the adjusted value indicative of the time difference.

8. Apparatus according to any preceding claim wherein the circuitry is configured to constrain the second value to a particular range, the range corresponding to a phase lag of the resonant current with respect to the driving voltage being greater than zero.

9. Apparatus according to any preceding claim wherein the second signal is indicative of a target output current of the converter and wherein the circuitry is configured to determine the second value in accordance with a known relationship between the output current and the phase difference between the resonant current and the driving voltage.

10. Apparatus according to any preceding claim wherein the one or more control signals are suitable for changing an operating frequency and/or a duty cycle of the switch network.

11. Apparatus according to claim 1 comprising: means for obtaining a third signal suitable for use in determining a phase of the driving voltage; and wherein the circuitry is further configured to: use the first signal and the third signal in determining a value related to a phase difference between the resonant current and the driving voltage; and take one or more actions in response to the value meeting one or more criteria.

12. Apparatus according to claim 11 wherein the one or more actions correspond to providing a signal for stopping or limiting an output of the converter, and the one or more criteria corresponds to the value being indicative that the phase difference is outside a range corresponding to an output current above a maximum output current.

13. Apparatus according to any preceding claim wherein the circuitry comprises a microcontroller.

14. Apparatus according to any preceding claim wherein the circuitry comprises at least one processor and non-transitory memory storing computer programme code, wherein the computer programme code, when executed by the at least one processor, causes the circuitry to set the one or more control signals.

15. A resonant converter with control circuitry comprising: an inner loop comprising apparatus according to any preceding claim; and an outer loop configured to sense an output level of the converter and to produce a signal corresponding to the second signal, wherein the inner and outer loops cause an output level of the converter to tend towards a target output level.

16. A method for use by apparatus for facilitating emulated current-mode control of a resonant converter, the apparatus comprising an input for a first signal suitable for use in determining a phase of a resonant current, wherein the resonant current corresponds to a current in a resonant network of the converter, an input for a second signal suitable for use in determining a target phase difference between the resonant current and a driving voltage, wherein the driving voltage corresponds to a voltage provided by a switch network of the converter to the resonant network, and one or more outputs for one or more control signals for controlling operation of the switch network, the method comprising: using the first signal in determining a first value, wherein the first value is related to a phase difference between the resonant current and the driving voltage; using the second signal in determining a second value, wherein the second value is related to the target phase difference; and setting the one or more control signals based at least in part on a comparison of the first and second values, wherein the one or more control signals are for causing the phase difference to track the target phase difference.

17. A non-transitory computer-readable storage medium storing a computer programme comprising instructions that, when executed by one or more processors, cause the one or more processors to perform a method according to claim 16.