[go: up one dir, main page]

GB2465611B - Interleaving or de-interleaving of data of variable rate - Google Patents

Interleaving or de-interleaving of data of variable rate

Info

Publication number
GB2465611B
GB2465611B GB0821570A GB0821570A GB2465611B GB 2465611 B GB2465611 B GB 2465611B GB 0821570 A GB0821570 A GB 0821570A GB 0821570 A GB0821570 A GB 0821570A GB 2465611 B GB2465611 B GB 2465611B
Authority
GB
United Kingdom
Prior art keywords
interleaving
data
increment value
previous block
memory locations
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
GB0821570A
Other versions
GB0821570D0 (en
GB2465611A (en
Inventor
Christopher Ryan Nokes
Oliver Paul Haffenden
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
British Broadcasting Corp
Original Assignee
British Broadcasting Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by British Broadcasting Corp filed Critical British Broadcasting Corp
Priority to GB0821570A priority Critical patent/GB2465611B/en
Publication of GB0821570D0 publication Critical patent/GB0821570D0/en
Priority to EP09802193A priority patent/EP2377248A1/en
Priority to PCT/GB2009/002750 priority patent/WO2010061184A1/en
Publication of GB2465611A publication Critical patent/GB2465611A/en
Application granted granted Critical
Publication of GB2465611B publication Critical patent/GB2465611B/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2789—Interleaver providing variable interleaving, e.g. variable block sizes
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0607—Interleaved addressing
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
    • H03M13/2707—Simple row-column interleaver, i.e. pure block interleaving
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/276—Interleaving address generation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/276—Interleaving address generation
    • H03M13/2764—Circuits therefore
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2782—Interleaver implementations, which reduce the amount of required interleaving memory
    • H03M13/2785—Interleaver using in-place interleaving, i.e. writing to and reading from the memory is performed at the same memory location
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6522—Intended application, e.g. transmission or communication standard
    • H03M13/6552—DVB-T2
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0071—Use of interleaving

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Error Detection And Correction (AREA)

Abstract

An apparatus for interleaving or de-interleaving a stream of data has a memory with M serially-numbered logical memory locations. The read-address generator and write-address generator are each configured to address memory locations as a function of an increment value which itself is a function of an increment value used for a previous block of data multiplied by a dimension used for interleaving or de-interleaving the previous block. The dimension is the number of columns of data to be interleaved or de-interleaved where the number of columns is an integer factor of the number of memory locations. The use of such an increment value ensures that data elements can be read in turn from a de-interleaver for a previous block while elements from the present block are written to locations that have been used. The apparatus may be used to improve the effectiveness of forward error correction in dealing with burst errors in systems such as DVB-T2.
GB0821570A 2008-11-25 2008-11-25 Interleaving or de-interleaving of data of variable rate Expired - Fee Related GB2465611B (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
GB0821570A GB2465611B (en) 2008-11-25 2008-11-25 Interleaving or de-interleaving of data of variable rate
EP09802193A EP2377248A1 (en) 2008-11-25 2009-11-25 Interleaving or de-interleaving for variable data block sizes and continuous data reception
PCT/GB2009/002750 WO2010061184A1 (en) 2008-11-25 2009-11-25 Interleaving or de-interleaving for variable data block sizes and continuous data reception

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB0821570A GB2465611B (en) 2008-11-25 2008-11-25 Interleaving or de-interleaving of data of variable rate

Publications (3)

Publication Number Publication Date
GB0821570D0 GB0821570D0 (en) 2008-12-31
GB2465611A GB2465611A (en) 2010-05-26
GB2465611B true GB2465611B (en) 2011-04-27

Family

ID=40230828

Family Applications (1)

Application Number Title Priority Date Filing Date
GB0821570A Expired - Fee Related GB2465611B (en) 2008-11-25 2008-11-25 Interleaving or de-interleaving of data of variable rate

Country Status (3)

Country Link
EP (1) EP2377248A1 (en)
GB (1) GB2465611B (en)
WO (1) WO2010061184A1 (en)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2595320A4 (en) * 2010-07-12 2014-01-22 Panasonic Corp DEVICE AND METHOD FOR DETRAYING AND SYSTEM AND METHOD FOR TRANSMITTING DATA
GB2491377A (en) * 2011-05-31 2012-12-05 British Broadcasting Corp Method and apparatus for memory access in an interleaver
KR101779026B1 (en) * 2011-07-14 2017-09-18 삼성전자주식회사 Method for de-interleaving and Broadcast Recieving Apparatus
WO2012109851A1 (en) 2011-07-29 2012-08-23 华为技术有限公司 Interleaving and de-interleaving method, interleaver and de-interleaver
EP3001572A1 (en) * 2014-09-29 2016-03-30 Panasonic Corporation Interleaving by concatenation of convolutional and block interleaving
KR102470228B1 (en) 2014-09-29 2022-11-23 파나소닉 홀딩스 코퍼레이션 Convolutional interleaver, convolutional deinterleaver, convolutional interleaving method, and convolutional deinterleaving method
US10534540B2 (en) 2016-06-06 2020-01-14 Micron Technology, Inc. Memory protocol
CN107870865A (en) * 2016-09-27 2018-04-03 晨星半导体股份有限公司 Time de-interlacing circuit and method for running time de-interlacing
US11646804B2 (en) 2019-08-06 2023-05-09 John C. S. Koo Light-based data encoding and/or decoding device

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6748033B1 (en) * 1998-07-17 2004-06-08 Kabushiki Kaisha Kenwood De-interleave circuit
US20050050284A1 (en) * 2003-08-26 2005-03-03 Broadcom Corporation System and method for interleaving data in a communications device
US20050262415A1 (en) * 2004-05-19 2005-11-24 Wei-Hung Huang Method and apparatus for convolutional interleaving/de-interleaving technique

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2713845B1 (en) * 1993-12-07 1996-01-19 Thomson Consumer Electronics Block interleaving and deinterleaving method and implementation device.
US6964005B2 (en) * 2001-06-08 2005-11-08 Broadcom Corporation System and method for interleaving data in a communication device
GB2456292B (en) * 2007-11-07 2010-03-17 British Broadcasting Corp Interleaving or de-interleaving a stream of data received in successive frames

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6748033B1 (en) * 1998-07-17 2004-06-08 Kabushiki Kaisha Kenwood De-interleave circuit
US20050050284A1 (en) * 2003-08-26 2005-03-03 Broadcom Corporation System and method for interleaving data in a communications device
US20050262415A1 (en) * 2004-05-19 2005-11-24 Wei-Hung Huang Method and apparatus for convolutional interleaving/de-interleaving technique

Also Published As

Publication number Publication date
WO2010061184A1 (en) 2010-06-03
GB0821570D0 (en) 2008-12-31
EP2377248A1 (en) 2011-10-19
GB2465611A (en) 2010-05-26

Similar Documents

Publication Publication Date Title
GB2465611B (en) Interleaving or de-interleaving of data of variable rate
CA2590964C (en) Pruned bit-reversal interleaver
EA201070631A1 (en) DEVICE AND DATA PROCESSING METHOD
EP2129066A3 (en) Dat processing apparatus and method
EA201070627A1 (en) DEVICE DATA PROCESSING AND METHOD OF DATA PROCESSING
WO2009020969A3 (en) Ecc functional block placement in a multi-channel mass storage device
JP5564566B2 (en) Deinterleaving apparatus and method, and data transmission system and method
DK2056469T3 (en) Data processing device and method
CA2940197A1 (en) Interleaving and mapping method and deinterleaving and demapping method for ldpc codeword
GB2488057A (en) Solid-state storage system with parallel access of multiple flash/PCM devices
JP2014050103A5 (en)
CN106105041B (en) Time interleaver and time deinterleaver, and time interleaving method and time deinterleaving method
WO2011041047A3 (en) Home agent data and memory management
WO2009085871A3 (en) Efficient address generation for pruned interleavers and de-interleavers
WO2009060185A3 (en) Interleaving or de-interleaving a stream of data received in successive frames
EP2239855A3 (en) Receiving apparatus, receiving method, program, and receiving system
TW200705828A (en) Block interleaving with memory table of reduced size
TW200719646A (en) De-interleaver and multi-carrier communications system
TW200743311A (en) Reconfigurable convolutional interleaver/de-interleaver using minimum amount of memory and an address generator
WO2008032261A3 (en) Deinterleaver for a multi-stage interleaving scheme with processing of bit pairs
WO2008054987A3 (en) Using no-refresh dram in error correcting code encoder and decoder implementations
GB2523363A (en) Bit interleaver and bit de-interleaver
CN105376008A (en) Interleaving and mapping method and deinterleaving and demapping method of LDPC codeword
WO2010008618A3 (en) Pruned bit-reversal interleaver that simultaneously generates multiple addresses
CN105577196B (en) Turbo code data interleaving method and interleaver based on broadband OFDM power line communication system

Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee

Effective date: 20141125