GB2454817B - Method and device for interrupt handling in a logically partitioned data processing system - Google Patents
Method and device for interrupt handling in a logically partitioned data processing systemInfo
- Publication number
- GB2454817B GB2454817B GB0822116.0A GB0822116A GB2454817B GB 2454817 B GB2454817 B GB 2454817B GB 0822116 A GB0822116 A GB 0822116A GB 2454817 B GB2454817 B GB 2454817B
- Authority
- GB
- United Kingdom
- Prior art keywords
- data processing
- processing system
- interrupt handling
- partitioned data
- logically partitioned
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Program initiating; Program switching, e.g. by interrupt
- G06F9/4806—Task transfer initiation or dispatching
- G06F9/4812—Task transfer initiation or dispatching by interrupt, e.g. masked
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
- G06F9/5061—Partitioning or combining of resources
- G06F9/5077—Logical partitioning of resources; Management or configuration of virtualized resources
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Bus Control (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| EP08100302 | 2008-01-10 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| GB0822116D0 GB0822116D0 (en) | 2009-01-07 |
| GB2454817A GB2454817A (en) | 2009-05-20 |
| GB2454817B true GB2454817B (en) | 2012-07-04 |
Family
ID=40262632
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB0822116.0A Expired - Fee Related GB2454817B (en) | 2008-01-10 | 2008-12-04 | Method and device for interrupt handling in a logically partitioned data processing system |
Country Status (1)
| Country | Link |
|---|---|
| GB (1) | GB2454817B (en) |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0529384A1 (en) * | 1991-08-29 | 1993-03-03 | International Business Machines Corporation | CPU expansive gradation of I/O interruption subclass recognition |
| US20040215860A1 (en) * | 2003-04-24 | 2004-10-28 | International Business Machines Corporation | Virtualization of a global interrupt queue |
| US20060195644A1 (en) * | 2005-02-25 | 2006-08-31 | International Business Machines Corporation | Interrupt mechanism on an IO adapter that supports virtualization |
| US20080046621A1 (en) * | 2004-09-29 | 2008-02-21 | Naoto Okino | Information Processing Apparatus, Interrupt Process Control Method, and Computer Program |
-
2008
- 2008-12-04 GB GB0822116.0A patent/GB2454817B/en not_active Expired - Fee Related
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0529384A1 (en) * | 1991-08-29 | 1993-03-03 | International Business Machines Corporation | CPU expansive gradation of I/O interruption subclass recognition |
| US20040215860A1 (en) * | 2003-04-24 | 2004-10-28 | International Business Machines Corporation | Virtualization of a global interrupt queue |
| US20080046621A1 (en) * | 2004-09-29 | 2008-02-21 | Naoto Okino | Information Processing Apparatus, Interrupt Process Control Method, and Computer Program |
| US20060195644A1 (en) * | 2005-02-25 | 2006-08-31 | International Business Machines Corporation | Interrupt mechanism on an IO adapter that supports virtualization |
Also Published As
| Publication number | Publication date |
|---|---|
| GB0822116D0 (en) | 2009-01-07 |
| GB2454817A (en) | 2009-05-20 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 746 | Register noted 'licences of right' (sect. 46/1977) |
Effective date: 20130107 |
|
| PCNP | Patent ceased through non-payment of renewal fee |
Effective date: 20191204 |