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GB2327810B - Manufacturing integrated circuit devices with different gate oxide thicknesses - Google Patents

Manufacturing integrated circuit devices with different gate oxide thicknesses

Info

Publication number
GB2327810B
GB2327810B GB9715880A GB9715880A GB2327810B GB 2327810 B GB2327810 B GB 2327810B GB 9715880 A GB9715880 A GB 9715880A GB 9715880 A GB9715880 A GB 9715880A GB 2327810 B GB2327810 B GB 2327810B
Authority
GB
United Kingdom
Prior art keywords
integrated circuit
gate oxide
circuit devices
different gate
manufacturing integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
GB9715880A
Other versions
GB2327810A (en
GB9715880D0 (en
Inventor
Shih-Wei Sun
Meng-Jin Tsai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
United Microelectronics Corp
Original Assignee
United Microelectronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP2521897A external-priority patent/JPH10222885A/en
Application filed by United Microelectronics Corp filed Critical United Microelectronics Corp
Priority to GB9715880A priority Critical patent/GB2327810B/en
Priority to JP9215218A priority patent/JPH1168052A/en
Priority to DE19735826A priority patent/DE19735826A1/en
Priority to FR9710703A priority patent/FR2767965B1/en
Publication of GB9715880D0 publication Critical patent/GB9715880D0/en
Publication of GB2327810A publication Critical patent/GB2327810A/en
Application granted granted Critical
Publication of GB2327810B publication Critical patent/GB2327810B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H01L21/02233—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
    • H01L21/02236—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
    • H01L21/02238—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor silicon in uncombined form, i.e. pure silicon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02255—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by thermal treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02299—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158—Making the insulator
    • H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/09—Manufacture or treatment with simultaneous manufacture of the peripheral circuit region and memory cells

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
GB9715880A 1997-02-07 1997-07-28 Manufacturing integrated circuit devices with different gate oxide thicknesses Expired - Fee Related GB2327810B (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
GB9715880A GB2327810B (en) 1997-02-07 1997-07-28 Manufacturing integrated circuit devices with different gate oxide thicknesses
JP9215218A JPH1168052A (en) 1997-07-28 1997-08-08 Manufacturing method of integrated circuit
DE19735826A DE19735826A1 (en) 1997-02-07 1997-08-18 Implanting nitride to produce gate oxide with different-thickness in hybrid and insertion ULSI
FR9710703A FR2767965B1 (en) 1997-02-07 1997-08-27 METHOD FOR MANUFACTURING AN INTEGRATED CIRCUIT DEVICE HAVING DIFFERENT THICKNESSES OF GRID OXIDE

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2521897A JPH10222885A (en) 1997-02-07 1997-02-07 Information recording and reproducing device
GB9715880A GB2327810B (en) 1997-02-07 1997-07-28 Manufacturing integrated circuit devices with different gate oxide thicknesses
DE19735826A DE19735826A1 (en) 1997-02-07 1997-08-18 Implanting nitride to produce gate oxide with different-thickness in hybrid and insertion ULSI
FR9710703A FR2767965B1 (en) 1997-02-07 1997-08-27 METHOD FOR MANUFACTURING AN INTEGRATED CIRCUIT DEVICE HAVING DIFFERENT THICKNESSES OF GRID OXIDE

Publications (3)

Publication Number Publication Date
GB9715880D0 GB9715880D0 (en) 1997-10-01
GB2327810A GB2327810A (en) 1999-02-03
GB2327810B true GB2327810B (en) 1999-06-09

Family

ID=27438665

Family Applications (1)

Application Number Title Priority Date Filing Date
GB9715880A Expired - Fee Related GB2327810B (en) 1997-02-07 1997-07-28 Manufacturing integrated circuit devices with different gate oxide thicknesses

Country Status (3)

Country Link
DE (1) DE19735826A1 (en)
FR (1) FR2767965B1 (en)
GB (1) GB2327810B (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6150670A (en) * 1999-11-30 2000-11-21 International Business Machines Corporation Process for fabricating a uniform gate oxide of a vertical transistor
US6362040B1 (en) * 2000-02-09 2002-03-26 Infineon Technologies Ag Reduction of orientation dependent oxidation for vertical sidewalls of semiconductor substrates
DE10052680C2 (en) * 2000-10-24 2002-10-24 Advanced Micro Devices Inc Method for adjusting a shape of an oxide layer formed on a substrate
DE10123594B4 (en) * 2001-05-15 2006-04-20 Infineon Technologies Ag Integrated semiconductor circuit with differently frequently connected transistors
DE10222764B4 (en) * 2002-05-15 2011-06-01 Ihp Gmbh - Innovations For High Performance Microelectronics / Leibniz-Institut Für Innovative Mikroelektronik Semiconductor varactor and thus constructed oscillator
DE102004049246A1 (en) * 2004-10-01 2006-04-06 Atmel Germany Gmbh Lateral DMOS transistor and method for its manufacture

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63205944A (en) * 1987-02-23 1988-08-25 Matsushita Electronics Corp Manufacture of mos integrated circuit
EP0412263A2 (en) * 1989-08-10 1991-02-13 Kabushiki Kaisha Toshiba Method of forming a contact hole in semiconductor integrated circuit

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5330920A (en) * 1993-06-15 1994-07-19 Digital Equipment Corporation Method of controlling gate oxide thickness in the fabrication of semiconductor devices
KR0136935B1 (en) * 1994-04-21 1998-04-24 문정환 Method of manufacturing memory device
US5480828A (en) * 1994-09-30 1996-01-02 Taiwan Semiconductor Manufacturing Corp. Ltd. Differential gate oxide process by depressing or enhancing oxidation rate for mixed 3/5 V CMOS process

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63205944A (en) * 1987-02-23 1988-08-25 Matsushita Electronics Corp Manufacture of mos integrated circuit
EP0412263A2 (en) * 1989-08-10 1991-02-13 Kabushiki Kaisha Toshiba Method of forming a contact hole in semiconductor integrated circuit

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
Patent Abstracts of Japan, Vol 12, No 493, [E-697] & JP 63 205 944 A *

Also Published As

Publication number Publication date
DE19735826A1 (en) 1999-03-04
GB2327810A (en) 1999-02-03
GB9715880D0 (en) 1997-10-01
FR2767965B1 (en) 2000-01-07
FR2767965A1 (en) 1999-03-05

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Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee

Effective date: 20040728