GB2123207A

GB2123207A - Glass passivated high power semiconductor devices

Info

Publication number: GB2123207A
Application number: GB08218849A
Authority: GB
Inventors: John Anthony Ostop; Robert William Marks
Original assignee: Westinghouse Electric Corp
Current assignee: Westinghouse Electric Corp
Priority date: 1982-06-30
Filing date: 1982-06-30
Publication date: 1984-01-25

Abstract

A process for producing a glass passivated semiconductor device, such as a thyristor, comprises forming a first groove 56 in a large area body of semiconductor material, forming regions 62,64,66, of alternating type conductivity within the area enclosed by the groove and then forming a second shallower groove within the area enclosed by the first groove, the second groove then being coated with glass 84 to passivate the surfaces exposed by the second groove. Electrodes 90,96 are then affixed to preselected regions to form a semiconductor device. A plurality of such devices may be made in a single semiconductor body and separated by cutting through the body outside the first groove. <IMAGE>

Description

SPECIFICATION Glass passivated high power semiconductor devices The present invention relates generally to -semiconductor devices and more specifically to semiconductor devices, and the process for preparing such devices, which utilizes a fused glass for passivation of p-n junctions; and to a method for preparing a plurality of devices from a single large area body of semiconductor material.

Prior art glass sealed thyristors, transistors and diodes have utilized a glass layer fused to an edge of a body of semiconductor material to form a seal protecting the p-n junctions formed at the interface of regions of opposite conductivity type. A typical example of a prior art glass seal is disclosed in patent application entitled, "Glass Encapsulated Diode", by Bulent E. Yoldas, U.S. Serial No. 897,323, filed April 18, 1978, Belgian Patent No. 875,606, issued October 1979, and patent application entitled, "Glass Sealed Diode" by J.E. Johnson, U.S. Serial No. 891,090, filed March 1978, Belgian Patent No. 875,082, issued September 24,1979.

These prior art devices utilized a body of semiconductor material having tapered edges. This results in a non-symmetrical device. Non-symmetry may increase stress which is induced by changes in temperature during duty cycles.

Another example of a prior art glass encapsulated device is set forth in a patent application entitled "Glass-Sealed Multichip Process" by J.E. Johnson, U.S. Serial No. 970,045, filed December 15,1978 and EPC Serial No. 79302905.9, filed December 14, 1979. This prior art device employs preformed glass rings in its preparation. The use of such glass preforms requires extensive jigging apparatus to ensure the proper initial positioning of the glass preform and the maintaining of the positioning during melting and re-solidification of the glass.

Still another example of a glass encapsulated device is set forth in a patent application, not published as of the priority date of this application, entitled "Glass Passivated High Power Semiconductor Devices" by John A. Ostop and Joseph E. Johnson, U.S. Serial No. 168,818, filed July 10, 1980 and EPC Serial No.81105364.4, filed July 8,1981.

This prior patent application teaches a process for forming a plurality of devices from a large body of semiconductor material and is also directed to the device formed by the process.

In this application vertically aligned circular grooves are formed in the large body of semiconductor material from the top and bottom surfaces. The grooves are separated by a portion of the body. A glass paste is deposited in the grooves and solidified in place. The area isolated within the circular grooves is then cut from the large body by cutting through the body outside of the circular grooves.

With reference to Figure 1, there is shown a large area high power thyristor 10 made in accordance with the teachings of EPC Serial No. 81105364.4.

The thyristor 10 is comprised of cathode emitter region 12, cathode base region 14, anode base region 16 and anode emitter region 18.

There is a p-n junction 20 between regions 12 and 14, a p-n junction 22 between regions 14 and 16 and a p-n junction 24 between regions 16 and 18.

Grooves 26 extend from top surface 28 into the thyristor to a depth greater than the depth of p-n junction 22 and grooves 30 extend into the thyristor beyond p-n junction 24.

Grooves 26 and 30 contain a quantity of hardened glass 32 and 34 respectively which passivates p-n junctions 22 and 24 where the junctions terminate at the grooves.

The glass in the grooves has a thickness of about 0.5 mils if the lead-aluminum borosilicate glass is used and a thickness of about 2.0 mils if the zinc borosilicate glass is used. The difference in the thickness is due to the fact that the zinc borosilicate glass more closely matches the expansion coefficient of silicon. Obviously, if the coefficient of expansion of the lead-aluminum borosilicate glass or any other suitable glass is modified to approach the coefficient of expansion of silicon, as by the presence of silica flakes, the glass coating can be made thicker, i.e. approaching or equal to 2.0 mils.

There is a cathode emitter electrode 36, making ohmic electrical contact to the cathode emitter region 12 and cathode base region 14. There is a floating gate electrode 38 in electrical contact with the cathode emitter region 12 and the cathode base region 14 and a gate electrode 40 in ohmic electrical contact with the cathode base region 14. The cathode emitter electrode 36, the floating gate electrode 38 and the gate electrode 40 are disposed on top surface 28.

An anode emitter electrode 42 is in ohmic electrical contact with the anode emitter region 18 along bottom surface 44.

Portion 46 of silicon disposed along the outer periphery of grooves 26 and 30 and the glass 32 and 34 passivates the thyristor.

The EPC application just described has some shortcomings. First, etching grooves from both the top and bottom surface and the subsequent application and hardening of the glass in the grooves increases the number of manufacturing operations. Increasing the number of steps in any manufacturing operation always has the potential for lowering the yield. Secondly, the glass passivated groove on the bottom surface or back of the body of semiconductor material reduces the area of contact with an electrode and increases the thermal impedance of the device.

It is an object of the invention to provide a method with decreased process steps.

It is a further object of the invention to provide a semiconductor device with decreased thermal impedance.

One aspect of the invention resides broadly in a semiconductor device comprising: a body having opposed top and bottom surfaces and having a central portion isolated from a peripheral portion by a first circular groove extending from the top surface into said body a first distance less than the thickness of the body, at least a portion of said body containing at least two regions of opposite type conductivity with at least one p-n junction, a second circular groove extending from said top surface of said body into said body a second distance being less than said first distance, and being disposed within said first groove; a solidified glass disposed within said second groove and bonded to walls thereof, at least said portion enclosed by said second groove and said second distance being greater than the distance between the top surface and the p-n junction.

Another aspect of the invention resides broadly in a process for preparing a plurality of glass passivated semiconductor devices from a large area body of semiconductor material having opposed top and bottom surfaces comprising; forming a first groove having a first depth in a circular configuration through said top surface of said body, forming a second groove in a circular configuration through said top surface within the inside diameter of said first groove and extending into said body a second depth less than the first depth; depositing a glass paste, comprising a glass powder and a vehicle, in said second groove; driving off said vehicle and solidifying said glass in said second groove; and cutting entirely through said body around the outside of the first circular groove.

For a better understanding of the present invention, reference should be had to the following exemplary detailed discussion and drawings, in which: Figure 1 is a side view in section of a prior glass passivated thyristor; Figure 2 is a side view of a body of silicon being processed in accordance with the teachings of this invention; Figure 3 is a top view of a large body of silicon being processed in accordance with the teachings of this invention; Figures 4, 5 and 6 are side views of the body of Figure 2, being processed in accordance with the teachings of this invention; Figure 7 is a side view of a thyristor made in accordance with the teachings of this invention; Figure 8 is a side view of a body of silicon being processed in accordance with the teachings of this invention; Figure 9 is a side view of a thyristor made in accordance with the teachings of this invention; and Figure 10 is a side view of a body of silicon being processed in accordance with a modification of the process of this invention.

With reference to Figure 2, there is shown a large area body 50 of semiconductor material, preferably silicon suitable for use in accordance with the teachings of this invention for making a glass passivated, large area, high power semiconductor device and in particular a glass passivated, large area, high power thyristor.

Large area as used herein means a thyristor in which the body of semiconductor material has a diameter of at least 0.5 inch. Devices have been made on silicon chips having a diameter of from at least 0.625 to at least 0.91 inch. Devices are planned having a diameter of 1.3 inches.

High power as used herein means a thyristor capable of handling typical vdltages of from at least 1000 volts and ranging to 1200 volts or more.

Typically the large area body 50, which comprises a suitable starting material, will have a diameter of 3.0 inches or more, a thickness of about 12 mils, will be of n-type conductivity and will have a resistivity of 40 ohm-cm.

The body 50 has a top surface 52 and a bottom surface 54. The top and bottom surfaces 12 and 14 respectively, are substantially flat and parallel. There is an edge portion 56 extending between surfaces 52 and 54.

With reference to Figure 3 in addition to Figure 2, top surface 52 of the body 50 is covered with a chemical etchant resist, as for example that sold commercially under the trade name Waycoat SC and a plurality of grooves 56 are etched through top surface 52 in a circular configuration into the body 50 to a predetermined depth. The predetermined depth in devices of this type normally at least 75 microns and usually deeper. In any case, the distance "x" from bottom surface 58 of groove 56 to bottom surface 54 of body 50 should be such that xl2 is equal to or less than the depth of a subsequent P-type diffusion.

The width of the groove is normally about 25 mils at the top surface 56 of the body 50. The distance Y between the grooves is about 0.500 inch.

A suitable etchantforforming the groove 56 is one consisting of, all parts by volume, 2 parts nitric acid, 1 part hydrofluoric acid and 1 part acetic acid.

After the etching of the grooves 56, the body 10 is cleaned alternately using solutions of hydrogen peroxide (H2O2), hydrochloric acid-water solution (HCI-H2O), and hydrogen peroxide-ammonium hydroxidewater solution (H202-NH4OH-H2O) with water rinses between each successive cleaning step.

The hydrochloric acid water solution is comprised of, cell parts by volume, 2 parts hydrochloric acid, 5 parts water and 1 part hydrogen peroxide.

The hydrogen peroxide-ammonium hydroxide-water solution is comprised of, cell parts by volume, 1 part hydrogen peroxide, 1 part ammonium hydroxide and 5 parts water.

The water used in the water rinse is 18 meg-ohm water.

With reference to Figure 4, following the etching of the grooves 56 and the post-etching clean-up, conventional diffusion or epitaxial-diffusion and photo masking techniques are used to produce the structure shown in Figure 4 in the body 10. Again only a section of body 10 enclosed within and immediately adjacent groove 56 is shown in Figure 4.

The section shown in Figure 4 is a high power thyristor 60 suitable for further processing in accordance with the teachings of this invention.

It should be understood that in practice the diffusion profile, which includes junction depth and doping concentration are tailored according to the desired device characteristics. The diffusion profile discussed below for Figure 4 are such to produce a thyristor capable of handling 1000 to 1200 volts.

The thyristor 60 is comprised of a cathode emitter region 62, a cathode base region 64, and anode base region 66 and an anode emitter region 68.

There are p-n junctions between adjacent regions. A p-n junction 70 between regions 62 and 64, a p-n junction 72 between regions 64 and 66 and a p-n junction 74 between regions 66 and 68.

The cathode emitter region 62 has a thickness of from 15 to 20 microns, is of n-type conductivity, and is doped to a concentration of approximately 1020 atoms per cc.

The cathode base region 64 has a thickness of from 65 to 75 microns, is of p-type conductivity and is doped to a surface concentration of approximately 5 x 1017 atoms per cc.

The anode base region 66 has a thickness of from 6.5 to 7.5 mils, is of n-type conductivity and has a resistivity of from 40 to 50 ohm-cm. Region 66 is the unconverted portion of the original body 50 of silicon.

The anode emitter region 68 has a thickness of from 65 to 75 microns, is of p-type conductivity and is doped to a surface concentration of at least 5 xl 019 atoms per cc. If the anode emitter region 68 is doped to a surface concentration of less than 5x 1019 atoms per cc, the thyristor will have an unacceptable high forward voltage drop.

With reference to Figure 5, the area enclosed by the groove 56 may also be used to form a dynamic gate thyristor 80. All components which are the same or similar to the corresponding component in Figure 4 are identified by the same reference numeral used in Figure 5.

The differences between the two structures of Figures 4 and 5 is that (1) the dynamic gate thryistor 80 has a main cathode emitter region 162 and an auxiliary cathode emitter region 262, both regions have a circular configuration; (2) there is a p-n junction 170 between region 162 and region 64 and a p-n junction 270 between region 262 and region 64 and (3) portions 82 of cathode base region 64 extend to top surface 52 of the thyristor 80.

The anode base region 66 and the anode emitter region 68 are identical in both devices.

In the preferred method of preparing the large area, high power thyristor of either Figures 4 and 5, the regions 64 and 68 are formed in the body 50 of Figure 2 by diffusion. Region 66 consists of the undiffused n-type portion of the body 50.

Surface 52 is then masked by known techniques and in the case of thyristor 60 of Figure 4, region 62 is formed by diffusionin the desired portion of surface 52.

In the case of the thyristor 80 of Figure 5, surface 52 is masked by known techniques and emitter segments 162 and 262 are formed in the desired portions of surface 52.

In the alternative, in the case of thyristor 80 of Figure 5, the entire surface 52 is diffused forming a continuous n-type cathode emitter region extending across the surface of the body 10 and then using photomasking techniques; the portions 82 of region 64 are formed by diffusing through the cathode emitter region at predetermined locations.

With reference to Figure 6, following the diffusion of the thyristor 60 of Figure 4, a second groove 82 is etched in the thyristor 60.

The second groove 82 is etched within the inside diameter of the first groove 56, that is the first groove 56 surrounds and encloses the second groove 82. The groove 82 is formed by the same etching and cleaning procedure set forth above for groove 56.

The second groove 82 extends into the body of silicon to depth such that it extends through p-n junction 72 into region 66, thereby isolating both the forward biased p-n junction 70 and the reverse biased p-n junction 72.

The groove 82 has a width at surface 82 approximately equal to the width of groove 56, that is about 25 mils and has a width of about 15 mils at its bottom 83.

The spacing between groove 56 and 82 is not critical. However, to ensure that any undercutting which may accrue during etching to form groove 82 does not penetrate into groove 56 and to ensure that groove 82 extends through the horizontal portion 85 of p-n junction 72 rather than vertical portion 87, a spacing, "Z" in Figure 6, of approximately 30 mils has been found satisfactory.

A suitable glass powder, preferably having a nominal particle size of about 1helm, is then mixed with a suitable vehicle to form a paste and with the use of a screen printer is printed into the groove 82.

The glass employed in accordance with the teachings of this invention should first of all have an expansion coefficient near that of silicon, for example in the range of 4.0 to 6.0 x 10-6 centimeters per centimeter per degree C and should be substantially free of alkaline ions.

In addition: (1) The glass must have structural stability, e.g., must not devitrify or go through phase separation during the fusion process.

(2) The glass must have good chemical resistance to the environment and humidity.

(3) The glass must wet and bond or adhere to the semiconductor material, normally as in this case silicon.

(4) The glass must not chemically attack the surfaces of the semiconductor material, normally silicon, in a detrimental way.

(5) The thermal characteristics of the glass must be such that stresses can be relieved at temperatures within the limitations of the device or the semiconductor material again normally silicon.

(6) The glass must have a fusion temperature below the degradation temperature of the device.

(7) The finished device must be resilientto thermal shock and thermal cycling and must have good mechanical strength.

In general, lead-aluminum borosilicate glasses have been found satisfactory. In particular glasses having a general chemical composition, by weight, Constituent Percentage % SiO2 30-40 B203 12-23 PbO 40-48 At203 2-6 have been found suitable.

Particularly suitable is a glass sold commercially by Innotech under the type number 1P745 which has the secific composition, by weight, Constituent Percentage % SiO2 B203 15%#3% Pbo Awl203 3+1% Another particularly satisfactory glass # sold by Innotech under the type number lP740 which has nominal composition, by weight, Constituent Percentage % SiO2 40% B203 8.2% PbO2 49.3% Awl203 2.5% Lead borosilicate glasses are also satisfactory, such glasses will have a nominal composition, by weight, Constituent Percentage % SiO2 30-40 B203 12-23 PbO 40-48 Zinc aluminum silicate glasses are also satisfactory, such glasses will have a nominal composition, by weight, Constituent Percentage % ZnO 40-50 A1203 2-6 SiO2 50-60 Another particularly satisfactory glass is a zinc-borosilicate glass and in particular is one sold by JENAEA GLASWERK SCHOTT & GEN., under the type number G027-002 which has a nominal composition, by weight, Constituent Percentage % ZnO 40-50 B203 1-5 SiO2 50-60 and which can contain approximately, by weight 15% of the SiO2 as particles of silica.

The vehicle in which the glass is mixed to form a paste may be a liquid or combination of liquids capable of supporting the particles of glass powder suspended therein to form a paste, while not having any deleterious effect upon the glass particles. In addition, the vehicle must be readily driven off from the paste by heating.

An example of a suitable vehicle is a mixture of ethyl cellulose and butyl carbitol. Another satisfactory vehicle is one sold commercially by Electro-Science Laboratory under the designation Vehicle No. 400.

The preferred vehicle for use with zinc-borosilicate glass is one comprising, 5 grams ethyl cellulose and 150 cc butyl carbitol.

The paste preferred for practicing the teachings of this invention consists of 40 grams of G027-002 glass powder having a nominal particle size of 10 Fm and 35 cc of the ethyl cellulose-butyl carbitol vehicle.

The paste is printed into the groove 82 using a screen printer with a 165 mesh screen. The printing is continued until the paste fills the groove 82.

The paste is allowed to set for approximately five to fifteen minutes, preferably about ten minutes, to allow it to settle or flow into all portions of the groove.

The structure is then heated for a period of from about eight to twelve minutes at a temperature in the range of from 1 000C to 1 500C to remove the excess vehicle from the paste. Normally this can be accomplished by heating with a heat lamp.

The structure is then placed in a quartz boat and heated in a furnace to a temperature in the range of 450 C to 5500C for a time period of from 20 minutes to 45 minutes; preferably, 5000C for 30 minutes. The purpose of this step is to remove or burn-off all of the vehicle from the glass in the groove. Accordingly, time and temperature may be varied to accomplish this objective depending on the vehicle employed.

Following the drive-off step and without cooling down the structure is heated to a temperature in the range of from 6500C to 750 C, preferably 720 C, for from 45 minutes to 5 minutes, preferably about 10 minutes, to fully solidify or harden and bind the glass to the silicon.

If, as preferred, the drive-off and hardening and binding is carried out in one furnace, the temperature is increased from the preferred 500 C to the preferred 720 C over a period of time of about 10 to 20 minutes.

Following the heating, at preferably 720 C, for preferably 10 minutes, the furnace is cooled from the preferred 7200C to a temperature in the range of 525"C to 5000C in about 15 minutes. The furnace is maintained in this range for approximately 10 minutes followed by a reduction to a temperature of about 4800C in about 15 minutes. The temperature of about 4800C is maintained for about 20 minutes followed by a reduction to about 410 C in about 15 minutes. This temperature is maintained for approximately 30 minutes followed by a reduction of the furnace temperature to room temperature at a rate of approximately 10 C per minute.

This cooling or annealing cycle relieves any harmful stresses in the glass.

The cured and hardened glass is shown in Figure 6 and is denoted as 84.

Glass 84 is then coated with a layer 86 of a suitable photoresist using standard photolithographic techniques.

The photoresist used may be either a negative type resist or a positive resist. A negative resist is preferred.

Examples of suitable negative resists are those sold commercially as Hunts Waycoat SC and Eastman Kodak's resists designated as KTFR and KMER.

Examples of suitable positive resists are those sold commercially by Shipley under the designation 1350 and 1350H.

Following the application of the photoresist layer 86 to the glass 84, the plurality of thyristors, represented by thyristor 60, are cut from the body 50 of silicon with a laser scribe.

The purpose of the resist is to protect the glass from particles of molten silicon generated by the laser cutting.

The laser scribe employs a Nd :Yag laser and such scribes are available commercially. A satisfactory laser scribe is one sold commercially by Quantronix Corp. with the designation Model 604.

The thyristors 60 are cut from the body 50 along a line 88 spaced about 20 to 40 mils from outside edge 90 of the first circular groove 56. In practice, the cutting has normally been carried out at a distance of about 62.5 mils from the inside edge 92 of the groove 56. The distance from the inside edge 92 or the outside edge 90 of the groove 56 to the scribe line 88 is not critical.

With reference to Figure 7, electrical contacts or electrodes 90, 94 and 96 comprising anode electrode, gate electrode and cathode electrode are affixed, as described hereinbelow to complete the thyristor.

With reference to Figure 8, there is shown the dynamic gate thyristor 80 of Figure 5, in which, according to the teachings of this invention the second groove 82 has been formed, filled with a cured and hardened glass 84 and the glass 84 coated with a layer of photoresist 86.

All of the above steps i.e., forming the groove 82, filling the groove with glass 84, curing and hardening the glass, and coating the glass with a layer of photoresist 86 are performed in accordance with the teachings set forth hereinabove.

The thyristor is then cut from the large body of silicon along line 88 employing a laser as also set forth above.

Following the laser scribing, electrodes, cathode, anode and gate are affixed to the various regions.

Preferably, the Electrodes are bimetallic consisting of a first layer about 1,500An thick of titanium (Ti) and a second layer about 20,000An thick of silver (Ag).

The metal electrode deposition may be accomplished by vapor deposition or sputtering.

Preferably, the metalization or affixing of the electrode is carried out using a shadow mask which defines the cathode emitter, gate and amplifying gate on one surface and the anode emitter on the opposed surface.

Following the affixing of the electrodes, the #photoresist 52 is burned off the glass in an air ambient at 400 C.

With reference to Figure 9, there is sho#wn the completed large area, high power dynamic gate thyristor 80 made in accordance with the teachings of this invention.

The dynamic gate thyristor 80 is comprised of cathode emitter region 162, auxiliary emitter region 262, cathode base region 64, anode base region 66 and anode emitter region 68.

There is a p-n junction 170 between regions 162 and 64; a p-n junction 270 between regions 262 and 64; a p-n junction 72 between regions 64 and 66 and p-n junction 74 between regions 66 and 68.

The first groove 56 extends from top surface 52 into the thyristor a first predetermined distance "x" and second groove 82, enclosed within the first groove 56 extends from top surface into the thyristor a second predetermined distance. The second predetermined distance being greater than the distance between top surface 52 and p-n junction 72.

The second groove 82 contains a quantity of hardened glass 84.

The cured and hardened glass in the grooves can have a thickness of about 0.5 mils if the lead-aluminum borosilicate glass is used and a thickness of about 2.0 mils if the zinc borosilicate glass is used. The difference in the thickness is due to the fact that the zinc borosilicate glass more closely matches the expansion coefficient of silicon. Obviously, if the coefficient of expansion of the lead-aluminum borosilicate glass or any other suitable glass is modified to approach the coefficient of expansion of silicon, as by the presence of silica flakes, the glass coating can be made thicker, i.e. approaching or equal to 2.0 mils.

There is a cathode emitter electrode 90, auxiliary emitter electrode 92, a gate contact 94 and an anode emitter contact 96 affixed as described above.

The cathode emitter electrode 90 makes an ohmic electrical contact to regions 162 and 64. The auxiliary emitter electrode 92 makes ohmic electrical contact to regions 262 and 64. The gate electrode 94 makes ohmic electrical contact to region 64 and anode emitter electrode 96 makes ohmic electrical contact to region 68.

Thyristors made in accordance with the teachings of this invention may be encapsulated in resin or encased in any known manner.

Thyristors made by the process of this invention and encapsulated in silicone resins such as that sold commercially as GE SR112 Silicone Resin have been found to be stable over 500 hours.

For certain voltage designs, it may be impractical to etch a deep groove from only the top surface as described above.

In such cases the first groove is etched into the body of silicon from both the top and bottom surfaces.

With reference to Figure 10 again starting with a large area body 50 of semiconductor material, as for example a three inch diameter body of n-type silicon groove 56 is etched into top surface 52 of body 50 and groove 156 is etched into bottom surface 54 of body 50.

The grooves 56 and 156 are etched as described above.

Spacing "x" between grooves 56 and 156 is such thatx/2 is equal to or less than the following p-type diffusion.

Again following the teaching set forth above p and n-type regions are formed in the body by diffusion or diffusion epitaxial techniques.

Following the diffusion or epitaxial diffusion steps, groove 82 is formed as set forth above and the glass passivation, affixing of contacts and laser cutting from the large body are all performed as set forth above to provide a thyristor.

While the present invention has been described with particular reference to thyristors, it is readily apparent that the invention is equally applicable to diodes and transistors.

Claims

1. A semiconductor device comprising: a body having opposed top and bottom surfaces and having a central portion isolated from a peripheral portion by a first circular groove extending from the top surface into said body a first distance less than the thickness of the body, at least a portion of said body containing at least two regions of opposite type conductivity with at least one p-n junction, a second circular groove extending from said top surface of said body into said body a second distance being less than said first distance, and being disposed within said first groove; a solidified glass disposed within said second groove and bonded to walls thereof; at least said portion enclosed by said second groove; and said second distance being greater than the distance between the top surface and the p-n junction.

2. A device according to claim 1 wherein the glass in the grooves is a lead aluminum borosilicate glass.

3. The device according to claim 2 wherein the glass in the grooves is a zinc borosilicate glass.

4. The device according to claim 1, 2 or 3 wherein the central portion of the body contains four regions, adjacent regions being of opposite type conductivity with p-n junctions therebetween.

5. A process for preparing a plurality of glass passivated semiconductor devices from a large area body of semiconductor material having opposed top and bottom surfaces comprising; forming a first groove having a first depth in a circular configuration through said top surface of said body, forming a second groove in a circular configuration through said top surface within the inside diameter of said first groove and extending into said body a second depth less than the first depth; depositing a glass paste, comprising a glass powder and a vehicle, in said second groove; driving off said vehicle and solidifying said glass in said second groove; and cutting entirely through said body around the outside of the first circular groove.

6. A process according to claim 5 including; forming by diffusion, subsequent to forming said first groove, at least a second region within said body, said at least second region having a conductivity type opposite to the type of conductivity of said body.

7. A process according to claim 5 or 6 wherein said glass paste is comprised in part of a glass selected from the group consisting of lead aluminum borosilicate glass and zinc borosilicate glass.

8. A process according to claim 5 or 6 wherein said glass paste is comprised in part of a zinc borosilicate glass.

9. A process according to any of the preceding process claims from claim 5 on wherein the glass paste is comprised in part of a vehicle consisting of ethyl cellulose and butyl carbitol.

10. A process according to any of the preceding process claims from claim 5 on wherein the glass paste is comprised of 40 grams of a zinc borosilicate glass and 35 cc of a vehicle comprised of ethyl cellulose and butyl carbitol.

11. A process according to any of the preceding process claims from claim Son wherein the glass is deposited in the grooves by screen printing.

12. A process according to any of the preceding process claims from claim Son wherein the glass is allowed to settle into the grooves for from 5 to 15 minutes before driving off the vehicle.

13. A process according to claim 11 in which the glass is allowed to settle into the grooves for 10 minutes before driving off the vehicle.

14. A process according to claim 9 and claims 10, 11, 12 and 13 when dependent from claim 9 wherein the vehicle is driven off by heating for a period of from 8 to 12 minutes at a temperature of from 100 Cto 150 C.

15. A process according to claim 14 in which the glass is hardened by heating for a period of from 20 minutes to 45 minutes at a temperature of from 4500C to 550 C, and then heated for a period of from 45 minutes to 5 minutes at a temperature of from 650 C to 7500C.

16. A process according to claim 14 in which the glass is hardened by heating for 30 minutes at 500 C and then for 10 minutes at 720 C.

17. A process according to any of the preceding process claims from claim Son wherein a laser scribe is employed to cut through said body of semiconductor material.

New claims or amendments to claims filed on 24.5.83.

Superseded claims 1.

New or amended claims:

1. A power semiconductor device, such as a power thyristor, comprising: a body having opposed top and bottom surfaces and having a central portion isolated from a peripheral portion by a first circular groove extending from the top surface into said body a first distance less than the thickness of the body, at least a portion of said body containing at least two regions of opposite type conductivity with at least one p-n junction, characterized by a second circular groove (82), extending from said top surface of said body into said body a second distance being less than said first distance, and being disposed within said first groove; a solidified glass (84) disposed within said second groove and bonded to walls thereof; at least one portion enclosed by said second groove; and said second distance being greater than the distance between the top surface and the p-n junction.