GB2065380A - Electronic thin-film circuit and method of its fabrication - Google Patents
Electronic thin-film circuit and method of its fabrication Download PDFInfo
- Publication number
- GB2065380A GB2065380A GB8038205A GB8038205A GB2065380A GB 2065380 A GB2065380 A GB 2065380A GB 8038205 A GB8038205 A GB 8038205A GB 8038205 A GB8038205 A GB 8038205A GB 2065380 A GB2065380 A GB 2065380A
- Authority
- GB
- United Kingdom
- Prior art keywords
- layer
- metallic
- pattern
- oxide
- film circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing the conductive pattern
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1345—Conductors connecting electrodes to cell terminals
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/80—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple passive components, e.g. resistors, capacitors or inductors
- H10D86/85—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple passive components, e.g. resistors, capacitors or inductors characterised by only passive components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/032—Materials
- H05K2201/0326—Inorganic, non-metallic conductor, e.g. indium-tin oxide [ITO]
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Engineering & Computer Science (AREA)
- Optics & Photonics (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Chemical & Material Sciences (AREA)
- Mathematical Physics (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Parts Printed On Printed Circuit Boards (AREA)
- Electroluminescent Light Sources (AREA)
Abstract
An electronic thin-film circuit comprises an insulating substrate plate (5) and an electrically conductive metallic-oxide layer (4) partially covering the substrate plate (5) and forming a first pattern (M1) and a second pattern (M2), which two patterns (M1, M2) are connected to each other at at least one point. The first pattern (M1) defines circuit elements and the second pattern (M2) defines conductor paths and/or terminal contacts. In the region of the second pattern (M2), the metallic- oxide layer (4) carries a grown layer (8) of the metal from which the metallic oxide of the metallic-oxide layer (4) is formed. To the grown layer (8) there can be applied a metallic reinforcement layer (9). The grown layer (8) may be formed by reduction of the metallic oxide of the metallic-oxide layer (4), whereby, in this region, the thickness of the metallic-oxide layer (4), is reduced relative to the thickness of the metallic-oxide layer (4) in the region of the first pattern (M1). Alternatively, the grown layer (8) may be grown by electrolytic deposition.
Description
SPECIFICATION
Electronic thin-film circuit
The invention relates to electronic thin-film circuits and is particularly concerned with such thin-film circuits of the type comprising a substrate plate of an electrically insulating material and an electrically conductive metallic-oxide layer which partially covers the substrate plate and forms a first pattern and a second pattern, which two patterns are connected to each other at at least one point, the first pattern defining circuit elements of the electronic thin-film circuit and the second pattern defining conductor paths and/or terminal contacts.
Electronic thin-film circuits of this type are already known in which the metallic-oxide layer consists of tin dioxide or indium oxide.
Such thin-film circuits are used for the construction of particular operating components, such as liquid-crystal, gas-discharge and electroluminescent indicating elements. In these thin-film circuits, the metallic-oxide layer has certain properties which are disadvantageous in the construction and operation of such indicating elements, namely:
1. High contact resistances occur in the plug contacts for application of the operating voltages which may be provided for in the second pattern.
2. Particularly in cases where a complicated structure necessitates close circuitry, excessively high resistances occur in the connecting leads between contact and picture element, that is, in the second pattern.
3. Since the surface of the metallic-oxide layer in both patterns is neither bondable nor solderable, semiconductor elements, such as control elements, cannot be integrated into the indicating element.
An electronic thin-film circuit in accordance with the present invention comprises a substrate plate of an electrically insulating material and an electrically conductive metallicoxide layer which partially covers the substrate plate and forms a first pattern and a second pattern, which two patterns are connected to each other at at least one point, the first pattern defining circuit elements of the electronic thin-film circuit, and the second pattern defining conductor paths and/or terminal contacts, wherein, in the region of the second pattern, the metallic-oxide layer carries a grown layer of the metal from which the metallic oxide of the metallic-oxide layer is formed.
In contrast to the known art, a thin-film circuit according to the present invention achieves a reduction of contact resistance at contacts, improved conductivity in connecting leads, and the creation of a bondable and solderable surface in the region of the terminal contacts.
The invention is described further hereinafter, by way of example, with reference to the accompanying drawings, in which:
Figure 1 shows the potentiodynamically plotted V-l curve of an In2O3 layer having a sheet resistance of approximately 20 in 2n
H2SO4;
Figures 2a to 2d are cross-sectional views of an electronic thin-film circuit according to the invention in course of fabrication;
Figure 3 shows a first example of an application of an electronic thin-film circuit according to the invention;
Figure 4 shows a second example of an application of an electronic thin-film layer according to the invention; and
Figure 5 shows a third example of an application of an electronic thin-film circuit according to the invention.
It has been found that good bonding strength between metallic layers (for example, of Au, Ni and In) formed by electrolytic deposition is achieved if an In2O3 or SnO2 layer is previously partially reduced by electrochemical means. Dilute sulphuric acid or buffer solutions, for example, are very suitable for use as the electrolyte. Fig. 1 shows the potentiodynamically plotted V-l curve of the In203 layer having a sheet resistance of approximately 20 in 2n H2SO4. It is evident from this that the reduction of the In203 commences at a potential of approximately - 600 mV, measured against a 3.5 n calomel electrode (see part 1 of the curve). On the reverse reaction, the indium formed is reoxidised (see part 2 of the curve). The current reduces to very small values when the In is fully reoxidised (see part 3 of the curve).
In the exploitation of this effect in accordance with the invention, the reduction reaction which constitutes part 1 of the curve is used in order to convert part of the indiumoxide layer to indium. Owing to the partial reduction of the In203 layer, on the one hand the surface is roughened, and, on the other hand, the thin indium layer produced forms a tenacious foundation for subsequent electrolytic metal deposition. High bond strength for gold, nickel and indium layers can be achieved if approximately 150 nm thick In203 layers are electrochemically reduced by approximately half their thickness.
The use of the described electrolytic deposition process for the fabrication of an electronic thin-film circuit with layers of gold and In203 on glass is shown diagrammatically in Fig. 2.
To the glass substrate 5, the whole of whose surface is coated with an In203 layer 4, there is first of all applied a layer 6 comprising a positive-type photographic emulsion. By exposure to a UV light source and subsequent development, the areas M2 which are to be reinforced with gold are removed. In these regions M2 the In203 layer 4 is then electrochemically partially reduced, namely, by
means of a cathode-current density of 0.5 to
5 mA/cm2. The grown layer 8 is thereby formed (Fig. 2b). The duration of treatment in an electrolyte containing 50 g/1(NH4)2S04 and 50 9/1 di-ammoniumhydrogencitrate is
30 to 240 seconds.The next stage of the
process is the electrolytic deposition of the
gold metallic reinforcement layer 9 (Fig. 2c), whereby pure gold (approximately 1 iim to 3 ,am) is deposited from a citrate-buffered bath.
By means of a second exposure and develop
ment process the photographic emulsion 6 is then removed from all the regions where there
is to be no transparent In203 layer 4, that is, from all the regions which do not pertain to the first pattern M,. The In203 layer 4 is then etched with HC1 at approximately 60 C (Fig.
2d) at the exposed points 10. The layer system 8, 9 thereby built up on the In203
layer 4 in the region of the second pattern M2 is very suitable for use of ultrasonic bonding techniques.
Further suitable electrolytes for the reduction of the In203 layer 4 are, for example, 2n sulphuric acid and 0.5% citric acid solution.
The method of fabrication and several possible applications of thin-film circuits according to the present invention will be described with reference to the following embodiments of the invention:
Embodiment 1
In this embodiment (Fig. 3) the gold coating 11 serves only to reduce the contact resistance in the connecting leads 1 2a to 129 to a seven-segment indicating device. A glass plate coated with In203 is covered with photographic emulsion, which again is removed according to the above-mentioned exposure and development processes from the regions which are to be gold-coated. The 140 nm thick In203 layer is first of.all reduced by half its thickness in these regions by immersion of the plate in 2n sulphuric acid and subjecting i. to a cathodic-current density of 2 mA/cm2 for 30 seconds.Next, gold-coating takes places after intermediate washing in a separate bath containing 50 9/1 (NH4)2SO4, 50 9/1 di-ammoniumhydrogencitrate and 20 9/1 K Au (CN)2. The structures of the connecting leads and code elements are then etched by means of a photoetching process.
Embodiment 2
In contrast to embodiment 1, in this case not only the contact surfaces, but also the connecting leads 1 2a to 129 (Fig. 4) are to be gold-coated. A further difference lies in the reduction bath, which in this case comprises 50 9/1 (NH4)2S04 and 50 9/1 di-ammoniumhydrogencitrate. Since this bath contains similar constituents to the gold-coating bath, the intermediate wash may be omitted. Goldcoating and further processing of the electronic thin-film circuit are performed in the same manner as in embodiment 1.
Embodiment 3
The electronic thin-film circuit is prepared in a manner similar to that described with reference to Fig. 2. It includes a gold-coated connecting lead 9 and a lead 13 which is not gold-coated (Fig. 5). To the end of the noncoated lead 13 there is attached, by means of a conductive adhesive material, a light-emitting diode chip 14. A gold bonding wire 15 forms a conductive connection between the
LED chip 14 and the gold-coated lead 9. In order to protect the LED chip 14 and the bonding wire 1 5, both are covered with a droplet 16 of silicone resin. The method of mounting the light-emitting diode 14 also affords the possibility of viewing it through the glass plate 5, that is, contrary to the conventional mode of viewing.For this purpose, the light must be reflected by a reflecting coating 17 applied to the protective covering 16 (by silver-spraying, white painting, vapour-coating with aluminium).
Alternatively, instead of light-emitting diodes, semiconductor devices such as integrated circuits may be mounted on the glass substrate and contacted.
Lastly, a combination of all these embodiments results in an indicating element comprising a liquid-crystal indicating device, one or more light-emitting diodes and the respective control circuits, on a common glass plate.
Since the gold layer is also solderable, other components, such as filament lamps, may be mounted by soldering in the assembly.
An electronic thin-film circuit according to the invention provides a simple means for the integration of semiconductor components into assemblies otherwise consisting of structures comprising transparent resistance tracks, such as liquid-crystal indicating devices or sensor fields. The thin-film circuit according to the invention also possesses the following advantages:
a. No high temperatures are used for its fabrication.
b. The quality of adhesion is such that sound bonded or soldered connections can be formed.
Claims (17)
1. An electronic thin-film circuit comprising a substrate plate of an electrically insulating material and an electrically conductive metallic-oxide layer which partially covers the substrate plate and forms a first pattern and a second pattern, which two patterns are connected to each other at at least one point, the first pattern defining circuit elements of the electronic thin-film circuit, and the second pattern defining conductor paths and/or terminal contacts, wherein, in the region of the second pattern, the metallic-oxide layer carries a grown layer of the metal from which the metallic oxide of the metallic-oxide layer is formed.
2. An electronic thin-film circuit as claimed in claim 1, in which there is applied to the grown layer a metallic reinforcement layer.
3. An electronic thin-film circuit as claimed in claim 1 or 2, in which the grown layer is formed on the surface of the metallicoxide layer in the region of the second pattern by reduction of the metallic oxide of the metallic-oxide layer, so that, in this region, the thickness of the metallic-oxide layer is reduced relative to the thickness of the metallic-oxide layer in the region of the first pattern.
4. An electronic thin-film circuit as claimed in claim 1 or 2, in which the grown layer is a layer which is grown on the metallicoxide layer in the region of the second pattern.
5. An electronic thin-film circuit as claimed in claim 4, in which the grown layer is formed by electrolytic deposition.
6. An electronic thin-film circuit as claimed in any of claims 1 to 5, in which the metallic-oxide layer consists of tin dioxide and the grown layer consists of tin.
7. An electronic thin-film circuit as claimed in any of claims 1 to 5, in which the metallic-oxide layer consists of indium oxide, and the grown layer consists of indium.
8. An electronic thin-film circuit as claimed in any of claims 2 to 7, in which the metallic reinforcement layer consists of gold.
9. An electronic thin-film circuit as claimed in any of claims 2 to 7, in which the metallic reinforcement layer consists of nickel.
10. An electronic thin-film circuit as claimed in any of claims 2 to 7, in which the metallic reinforcement layer consists of indium.
11. A method for the fabrication of an electronic thin-film circuit as claimed in claims 1 to 3, comprising the sequential steps of first applying the metallic-oxide layer as a continuous layer to the substrate plate, coating the entire surface of the metallic-oxide layer with a coating of photographic emulsion, removing the photographic-emulsion coating in the region of the second pattern by exposure to light and development, partially electrochemically reducing the metallic-oxide layer in the region of the second pattern whereby the grown layer is formed, electrodepositing the metallic reinforcement layer on the grown layer, removing the photographic emulsion layer, by a second exposure to light and development, from all the regions which do not pertain to the first pattern, removing the metallic-oxide layer by etching at the points thereby exposed, and, finally, removing the parts of the photographic-emulsion layer still remaining in the region of the first pattern.
12. A method as claimed in claim 11, in which the grown layer is formed by partial reduction of the metallic oxide of the metallicoxide layer in an electrolyte containing (N H4)2SO4 and di-ammoniumhydrogencitrate.
13. A method as claimed in claim 11, in which the grown layer is formed by partial reduction of the metallic oxide of the metallicoxide layer in dilute sulphuric acid.
14. A method as claimed in claim 11, in which the grown layer is formed by partial reduction of the metallic oxide of the metallicoxide layer in citric acid.
15. A method as claimed in any of claims 1 1 to 14 for the fabrication of an electronic thin-film circuit according to claim 8, in which deposition of the metallic reinforcement layer takes place in a bath containing (NH4)2SO4 diammoniumhydrogencitrate and KAu(CN)2.
16. A method as claimed in any of claims 11 to 15, in which hydrochloric acid is used in order to remove by etching the metallicoxide layer in the region outside the first pattern and second pattern.
17. An electronic thin-film circuit formed and/or constructed substantially as hereinbefore described with reference to the accompanying drawings.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE2948253A DE2948253C2 (en) | 1979-11-30 | 1979-11-30 | Electronic thin-film circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| GB2065380A true GB2065380A (en) | 1981-06-24 |
| GB2065380B GB2065380B (en) | 1983-08-17 |
Family
ID=6087280
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB8038205A Expired GB2065380B (en) | 1979-11-30 | 1980-11-28 | Electronic thin-film circuit and method of its fabrication |
Country Status (4)
| Country | Link |
|---|---|
| JP (1) | JPS5688396A (en) |
| DE (1) | DE2948253C2 (en) |
| FR (1) | FR2471119A1 (en) |
| GB (1) | GB2065380B (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE3038978C2 (en) * | 1980-10-15 | 1982-11-04 | Murata Manufacturing Co., Ltd., Nagaokakyo, Kyoto | Process for the production of a copper conductor arranged on a substrate, the copper conductor obtainable thereby and its use |
| DE3151557A1 (en) * | 1981-12-28 | 1983-07-21 | SWF-Spezialfabrik für Autozubehör Gustav Rau GmbH, 7120 Bietigheim-Bissingen | ELECTRO-OPTICAL DISPLAY DEVICE AND METHOD FOR THEIR PRODUCTION |
| DE3705258A1 (en) * | 1987-02-19 | 1988-09-01 | Vdo Schindling | SOLDERABLE LAYER SYSTEM |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR1444921A (en) * | 1965-05-28 | 1966-07-08 | Electronique & Automatisme Sa | Improvement in the making of contacts on thin resistive layers |
| US3544287A (en) * | 1967-04-13 | 1970-12-01 | Western Electric Co | Heat treatment of multilayered thin film structures employing oxide parting layers |
| US3930963A (en) * | 1971-07-29 | 1976-01-06 | Photocircuits Division Of Kollmorgen Corporation | Method for the production of radiant energy imaged printed circuit boards |
| DE2606086C3 (en) * | 1976-02-16 | 1980-08-14 | Bernd Dr.-Ing. 7250 Leonberg Kaiser | Manufacture of integrated thin-film circuits from a substrate coated in multiple layers with thin layers |
-
1979
- 1979-11-30 DE DE2948253A patent/DE2948253C2/en not_active Expired
-
1980
- 1980-11-26 JP JP16541280A patent/JPS5688396A/en active Pending
- 1980-11-28 FR FR8025372A patent/FR2471119A1/en active Pending
- 1980-11-28 GB GB8038205A patent/GB2065380B/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| DE2948253C2 (en) | 1981-12-17 |
| FR2471119A1 (en) | 1981-06-12 |
| JPS5688396A (en) | 1981-07-17 |
| DE2948253B1 (en) | 1981-03-19 |
| GB2065380B (en) | 1983-08-17 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PCNP | Patent ceased through non-payment of renewal fee |