GB2050005A - Improvements in or relating to electronic timepieces - Google Patents

Abstract

A stepping motor driven analog electronic timepiece (Fig. 17) includes a control arrangement whereby the width (e.g. 3.9 m secs) of normal drive pulses is automatically changed in incremental or decremental steps (e.g. of 0.5 m secs) to the minimum value capable of maintaining rotation. If a non-rotatable condition is detected by a detecting circuit 95 (as described with reference to Fig. 9 or Fig. 12), a correction pulse (e.g. of 7.8 m secs) is applied to the motor winding to product rotation. Immediately thereafter, a brief pulse is applied in the opposite direction to the correction pulse to demagnetize the stator before the next normal drive pulse. The control circuit 93 ensures that the width of the next normal drive pulse after a correction pulse, will be one increment greater than the drive pulse immediately before the correction pulse and which failed to produce rotation. <IMAGE>

Description

SPECIFICATION Improvements in or relating to electronic timepieces This invention relates to electronic timepieces and more specifically to electronic timepieces of the kind having an analog display driven by a stepping electric motor. For brevity timepieces of this kind will hereinafter be termed "stepping motor driven analog electronic timepieces".

According to this invention a stepping motor driven analog electronic timepiece comprises a time display driving stepping motor adapted to advance in successive steps in the same direction in response to the application thereto of current pulses in successively opposite directions; means for producing normal drive pulses for driving said motor; means for increasing or decreasing the width of said normal drive pulses by predetermined relatively small increments or decrements of width; means for detecting whether the motor is rotatable or non-rotatable by a normal drive pulse applied to it at any time; means for producing relatively wide correction drive pulses and for applying a correction drive pulse to drive the motor in response to the detection of the non-rotatable condition; means for periodically decreasing the normal drive pulse width by successive steps of decrement as long as the rotatable condition exists; and means for increasing the width of the normal drive pulses applied to the motor after the application of a correction drive pulse thereto resulting from the detection of the non-rotatable condition, by an increment relative to the normal drive pulse width which existed before the application of said correction drive pulse.

The invention is illustrated in and explained in connection with the accompanying drawings in which: Figure 1 shows a known stepping motor and associated gearing for driving an analog time display; Figure 2 is a block diagram of a conventional electronic timepiece as in common use at present; Figures 3,4,8,10, ila, 11b, 13a, 13b, 14,15,16, 18,2iaand2ibareexplanatoryfiguresof which all but 11 b and 1 3b are graphical; Figures 5, 6, and 7 are figures explanatory of certain operations which take place in the motor; Figure 9 shows one form of a rotor movement detection circuit which can be used in carrying out the present invention; Figure 12 shows another form of rotor movement detection circuit which can be used in carrying out the present invention;; Figure 17 is a simplified block diagram of an embodiment of the present invention; Figure 19 shows the the circuitry of the driving circuit and detecting circuit (including the comparator) used in the embodiment of Figure 17; Figures 20a and 20b serve to illustrate the comparator in more detail and to help in explaining its operation; and Figure 22 shows the circuitry of the control circuit used in the embodiment of Figure17.

Figure 1 shows diagrammatically the driving stepping motor and some of the display driving gearing of a typical known stepping motor driven analog electronic timepiece as commonly employed nowadays in so-called quartz watches. The motor has a stator 1, on which is an energising coil 7, and a permanently magnetised rotor 6 on the shaft of which is a pinion driving a train of gear wheels 5, 4, 3, 2.

The display of the timepiece is given by hands, (not shown) usually hour, minute and second hands which are driven by the motor via the gearing and, in many cases, the gearing is also used to drive a calendar (also not shown).

Figure 2 is a simplified block diagram of a typical known timepiece having a display driving arrangement as shown in Figure 1. Referring to Figure 2, 10 is a quartz crystal controlled time base oscillator the output from which is divided in frequency by a frequency divider 11 which provides a desired lower frequency output which is converted by a pulse combining circuit 12 into two signals each of which has a pulse width of (typically) 7.8 ms and a period of 2 secs, these two signals being dephased with respect to one another by 1 sec. These two signals are applied through driving inverters 1 3a and 1 3b to the opposite ends of the motor coil 7.The result is that current pulses in successively opposite directions pass through the coil, one every second, each pulse causing the rotor 6, which is permanently magnetised to have two poles as indicated by the letters N and S, to rotate through a step of 180 . Because successive pulses are in opposite directions through the coil, the rotor rotates always in the same direction in successive steps of 1800. Figure 3 typifies the flow of (I) through the coil with time (T) during one pulse.

The most usual practice at the present time, with a timepiece as illustrated by Figures 1 and 2, is so to choose the pulse width (7.8 ms in the above example), the resistance and number of turns of the coil, the dimensions of the motor and the detailed design, thereof that, in the worst conditions of working likely to be encountered in practice -- when the load on the motor is a maximum, as will normally occur in a timepiece having a calendar during the approximately 6 hours per day which it takes to change the calendar, or if the watch is placed in a strong external magnetic field, or the internal resistance of the watch battery is increased due to the watch being placed in a low ambient temperature -- that the motor develops enough torque to operate properly against the load imposed on it and to step forward correctly.This practice, though common, leads to an undesirably high overall power consumption since it involves always supplying the motor with current pulses wide enough to overcome the worst conditions whether those conditions are present or not. This defect can be overcome, and a considerable and useful reduction of overall power consumption can be achieved by relating the driving pulse power to the different working conditions which occur at different times, using wider pulses when the load is high or the conditions are otherwise adverse, and narrower pulses when the load is low or the conditions are not so adverse.The invention described in our co-pending Specification No. 47462/77 makes use of this expedient of relating pulse power to working conditions in order to achieve economy of power consumption in a stepping motor driven analog electronic timepiece and attention is directed to the said co-pending specification because it describes subjectmatter which is related to that of the present invention and has the same broad object. The main object of the present invention is, however, so closely to relate drive pulse width to the load and other conditions present at any time, as to achieve what is, practically speaking, a minimum overall consumption of power.

Before describing the present invention in detail some preliminary explanation will first be given with the aid of Figure 4 to explain how the present invention operates.

As will be seen more clearly later, the driving pulses supplied to the stepping motor used in an electronic timepiece in accordance with the present invention are of two types, namely normal driving pulses and correction driving pulses. In general the order in which these two pulses are supplied to the stepping motor is the order of first a normal driving pulse and then a correction driving pulse, but a correction driving pulse is as a ruie suplied to the motor only when the working conditions are such that a stepping motor is unable to be rotated properly by the normal driving pulse then being supplied thereto.Since a correction driving pulse is supplied to the stepping motor when the motor is not rotatable by the normal driving pulse supplied, the width of the next normal driving pulse is made longer by a predetermined amount so that the motor will be rotatable thereby. On the other hand, however, the normal driving pulse width is reduced by a predetermined amount when the supply of only normal driving pulses to the motor is able to make the stepping motor rotate by a few steps.

By automatically securing operation as just described the pulse width of the normal driving pulse (P1) is automatically controlled to be of the minimum pulse width necessary to drive the stepping motor to overcome the load condition obtaining at any time and, as a result, overall power consumption in the stepping motor will be minimised. Operation in this manner is illustratedin Figure 4. In the succession of normal driving pulses represented in Figure 4, (in line a) the first pulse P1 shown has a width of 3.9 ms which is then reduced by 0.5 ms to a width of 3.4 ms. If, as is assumed, the stepping motor is rotatable correctly through a number of steps by pulses of this width (3.4 ms), the width of the pulse P1 is further reduced by 0.5 ms to 2.9ms.If, after this, the motor beconies non-rotatable, i.e. it is unable to overcome the load on it, a correction pulse of 6.8 ms width is applied to the motor to make it rotate, after which the pulse width of 3.4 ms is restored for a few pulses followed by a second reduction to a width of 2.9 ms. If, again, the motor is not rotatable by this width of pulse, a second correction pulse P2 of 6.8 ms width is applied to the motor and this is followed, as before, by pulses P1 3.4 ms wide. if, as shown in line b of Figure 4 the motor becomes non-rotatable by this 3.4 ms pulse a third 6.8 ms correction pulse is applied to ensure rotation, after which the normal pulses P1 are increased to 3.9 ms wide for a few pulses.If the motor is still rotatable by these pulses, their width is again reduced by 0.5 ms to 3.4 ms (see line c of Figure 4) ... . .. . . . and so on. Thus, in operation, if the width of the normal driving pulses supplied to the motor at any time is sufficient to rotate it correctly through a few steps, the said width is automatically reduced by a predetermined amount until the width becomes too small for the motor to be rotatable, whereupon, as a result of detection of the non-rotatable condition of the motor, a wide correction pulse (Pz of width 6.8 ms) is promptly applied to make the motor rotate and this is followed by a normal driving pulse 0.5 ms wider than the normal driving pulse which preceded that correction pulse.If the motor is rotatable by this somewhat wider normal pulse, a number of such pulses are supplied, after which reduction of the normal driving pulse width occurs as before. If, however, the motor is not rotatable by one of these somewhat wider normal driving pulses, another wide (6.8 ms) correction pulse is promptly applied and this is followed by a normal driving pulse which is 0.5 ms wider than the one which preceded the last mentioned correction pulse ..... and so on.

A predetermined minimum normal driving pulse width below which the normal driving pulse width cannot be reduced -- for example a width of 2.4 ms - is preferably arranged for. In an electronic timepiece having stem-operated time correction means, it may be arranged for this predetermined minimum width to be brought into use initially after a time correction operation has been performed.

The above described sequences of operations in which the width of the normal drive pulses is varied by small predetermined amounts in such manner as automatically to adjust the pulse width to the minimum value necessary to overcome the load on the motor at any given time involves detecting whether the motor is in the rotatable condition or not. Although such detection could theoretically be effected by using a mechanism or arrangement which is additional to and external to the motor itself such as a mechanism or arrangement including a mechanicai switch or a semi-conductor to detect actual movement of the motor rotor-such use is hardly practical for, and certainly not desirable in, the case of a wristwatch or other timepiece of small size owing to the difficulty of incorporating such a mechanism or arrangement in the severely restricted space which is all that is available in the case of such a timepiece.As will be seen later, detection of whether the motor is in the rotatable condition or not is affected in carrying out the present invention by means which do not involve the use of inconveniently large or bulky detecting mechanisms or arrangements external to and additional to the motor but by detecting circuitry which can be made extremely small and can, in fact, readily be incorporated in an integrated circuit (I.C.) chip which also incorporates the time standard oscillator, the frequency divider and the motor driving and other circuits of the timepiece.

A detecting circuit used in carry;ng out the present invention may be designed to operate in accordance with either of two principles or methods. The first method makes use of the fact that, in a motor of the type illustrated in Figure 1, the driving current waveform through the motor coil changes with the position of the rotor relative to the stator. Referring to Figure 5, which shows the motor in more detail, 4 is an integrally formed stator which is recessed as indicated so as to have magnetically saturable portions 1 7a, 1 7b which are magnetically coupled to a stator limb on which is the motor coil 7. The stator also has diametrically opposed notches 1 8a, 1 8b in the wall of the hole in which the rotor 6, which is permanently magnetised to have two diametrically opposite poles, is situated.The diameter on which the said notches are formed is at an angle to a line joining the stator poles N, S when the stator is energised. When current is not applied to the coil, the rotor 6 assumes a rest position in which the diameter on which its poles N, S, lie is at an angle of approximately 900 to the line joining the notches 1 8a, 1 8b. Figure 5 shows the situation just after current is fed in the direction indicated by arrow heads to the coil 7. Magnetic poles N, S are generated ;n the stator as shown in Figure 5 and the rotor 6 starts to rotate clockwise (as seen in Figure 5) due to mutual repuision between like rotor and stator poles.If the motor is in the rotatable condition it is rotated through 1 800 clockwise by the applied current pulse, assuming, when current flow through the coil has ceased, a new rest position in which the rotor is at 1 800 to that shown in Figure 5. If now a current pulse is passed through the coil 7 in the opposite direction to that indicated in Figure 5, the rotor 6 (if in the rotatable condition) executes another half revolution clockwise to the rest position shown in Figure 5.

The current tirne characteristic of current though the coil 7 during an applied pulse exhibits an initial gradually rising portion as shown in Figure 3. This is because the magnetic resistance of the magnetic circuit as viewed from the coil 7 is very low before the saturabie portions 1 7a, 1 7b of the stator 4 saturates and as a result, the time constant T of the series circuit including the resistance of the coil is large. The value of T is given by T=L/R where L=.N2/Rm therefore T=N2(RxRm) where L is the inductance of the coil 7; N is the number of turns thereof; Rm is the magnetic resistance; and R is the ohmic resistance of the said series circuit.When, however, the portions 1 7a, 1 7b saturated, their permeability becomes the same as that of air, and accordingly the magnetic resistance Rm increases and the time constant T becomes small. As a result, the current characteristic suddenly rises as shown in Figure 3. It is worthy of note, at this point in the explanation, that since the saturation time also depends upon the condition of magnetisation of the motor, the saturation time will be increased with increase in the current present when a pulse is cut off and therefore, the saturating time will become long after a correction pulse has been supplied to the motor (as already explained this will only happen if the motor is in the non-rotatable condition) but this effect may be cancelled by applying a demagnetising pulse to the motor.

It follows from the preceding explanation that detection of whether the motor is in the rotatable or in the non-rotatable condition when a normal driving pulse is applied can be effected by utilising the difference in the time constant of the aforesaid series circuit which occurs in the two different conditions. The reason why this difference occurs will now be explained.

Figure 6 shows the magnetic fluxes present at the time when current starts to flow through the coil 7, and the magnetic poles of the rotor 6 are in a rest position from which rotor rotation can start.

The magnetic flux lines 20a, 20b represent the magnetic fluxes produced by the rotor 6. In practice, there will also exist a flux crossing the coil, but this is not shown. The directions of the magnetic flux lines 20a and 20b are indicated by arrow heads in Figure 6. The saturable portions 1 7a, 1 7b are initially, not yet saturated. When current flows through the coil 7 in the direction indicated by P arrow heads in Figure 6, magnetic fluxes as indicated by the flux lines 1 9a, 1 9b are produced by the coil 7 in the stator and these reinforce the fluxes 20a, 20b produced by the rotor 6 in the saturable portions 1 7a, 1 7b so that saturation rapidly occurs in these portions. After this, a magnetic flux of a sufficient strength for rotor rotation is produced by the rotor 6 but this is not shown in Figure 6. The characteristic of current flow through the coil is also shown by curve 22 in Figure 8 which is like that of Figure 3.

Figure 7 shows what happens if the non-rotatable condition exists and, after a driving pulse which has been unable, for some reason, to rotate the rotor through 1800, the next pulse (in the opposition direction to the preceding one) is applied at a time when the rotor has returned to the original position it occupied when said preceding pulse was applied. The direction of the fluxes 20a, 20b produced by the rotor 6 will be the same as in Figure 6 but the stator flux directions will be the opposite to those shown by lines 1 9a, 1 9b in Figure 6 and be as shown by lines 21 a, 21 b in Figure 7. Accordingly the rotor and stator fluxes now oppose one another in the saturable portions 1 7a, 1 7b of the stator 1 and a much longer time is taken to achieve saturation.The resulting characteristic of current through the coil is as shown by curve 23 in Figure 8.

Figure 9 shows a detecting circuit for utilising the above-described phenomena to achieve detection of whether the motor is in a rotatable position (Figure 6) or a non-rotatable position (Figure 7).

The circuit of Figure 9 comprises detection gates 28 and 29, a detection resistor 30, a transmission gate 31 for charging a capacitor 33, and a voltage comparator 32. The motor coil 7 is connected in a conventional driving inverter circuit composed of MOS gates 24, 25, 26 and 27.

Taking first the case of a normal driving operation, current is passed through a path as indicated by the full line 34, the coil 7 is energised and assuming the rotor is rotatable) the rotor is rotated through 1 800. After this step of rotation is substantially finished, a first detecting pulse is applied to the coil 7 through a path as indicated by the broken line 35 for a short time (about 0.5 ms to 1 ms) and, after that, a second detecting pulse is applied to the coil 7 through a path as indicated by the chain line 36.

Assuming that the rotor has rotated normally by one step, the relation between the rotor and stator magnetic poles at the time the first detecting pulse is applied to the coil will be as shown in Figure 6.

At this time the characteristic of the current through the coil exhibits a rapid rising time as shown in the curve 22 of Figure 8. When the second detecting pulse is applied to the coil, the position of the rotor is substantially the same as it was when the first detection pulse was applied, for the said detection pulse is too short and the resistor 30 of too large a value for the rotor to be rotated by the detecting pulse.

Since the direction of the current produced through the coil by the second detecting pulse (path 36) is the opposite of that produced by the first detecting pulse (path 35), the rotor position, as respects said second detecting pulse is as represented in Figure 7 and in consequence the current characteristic exhibits a shape having a slow rising time like that shown by curve 23 in Figure 8, although, because the detection resistor 30 is connected in series with the coil at the time of application of a detection pulse, the shape of the characteristic does not coincide precisely with the shape in Figure 8 except for the feature of the rising portion. As will now be seen the potential V51 produced at the "live" end of the resistor 30 by the first detection pulse will be much higher than the potential Vs2 produced at the same point by the second detection pulse.This is shown by curve a of Figure 10 which shows graphically the voltages produced across the detection resistor 30 by the two detection pulses.

Now suppose that, for some reason, the rotor could not be rotated by one 1800 step by the applied normal driving pulse, but returned to the original position it occupied before that pulse arrived.

When the next driving pulse arrives the motor will be in the non-rotatable condition and the relation between the voltages produced by the two detection pulses which follow said next driving pulse will be the opposite of that shown at a in Figure 10 but be as shown at bin Figure 10, with Vs2 larger than V51.

It is therefore possible to detect whether the rotor has performed a normal movement by the application of a normal driving pulse by comparing the value of V51 with the value of V52. To give a practical figure it is easy to make the voltage difference between V51 and V52 about 0.4V - a difference which can be easily detected.In the circuit of Figure 9 the gate 31 is caused to be ON (i.e. open) at the timing of the first detecting pulse so that the capacitor 33 is charged by the voltage V51 and then the potential V51, which has been stored in the capacitor 33, is compared by the comparator 32 at the time of application of the second detecting pulse with the potential V52 produced across the detection resistor 30 by said second detecting pulse. The voltage comparator thus determines which of the two detection pulses has produced the larger voltage.

The foregoing explains the first principle or method of detecting whether the motor is in the rotatable condition or not. As will have been seen, detection by this method is effected when movement of the rotor by a driving pulse has been finished. It is possible, however, in carrying out the invention, to achieve detection by utilising the voltage waveform produced in the coil by reason of the free oscillation of the rotor which occurs after it has been driven.

Figure 11 a shows relation between the rotational angle (6) of the rotor and the voltage (V) developed across the terminals of a high resistance resistor, such as a resistance of the order of 10 Kw which is assumed to be connected across the coil after a driving pulse has been applied thereto. The angle O is shown in Figure 11 b which is self-explanatory.

During the time T, a driving pulse is applied to the coil, but the aforesaid high value resistor (the detection resistor) is not connected in circuit. During the time T2 the high value resistor is connected in circuit and there is therefore applied across it voltage induced in the coil by the rotational and oscillatory movement of the rotor which occurs after it has been driven by a pulse. Since, as will be seen later, the voltage characteristic in the time T2 changes substantially in dependence upon the load and the driving conditions of the motor, it is possible to detect the movement of the rotor on the basis of such change.

Figure 12 shows an example of a detection circuit operating on this principle. The gates 24, 25, 26, 27, 28 and 29, the detection resistor 30 and the coil 7 are as shown in Figure 9, but the control thereof is different and instead of the circuit elements 31, 32 and 33 of Figure 9 the "live" end of the detection resistor 30 is connected to the imput terminal of a voltage detector 4Q with a predetermined threshold level. When a normal driving pulse is applied to the coil through the path indicated by the full line 41 the coil is energised, and the rotor is driven.After that, during movement of the rotor, switching is intermittently effected between two states in one of which both ends of the coil are grounded through a path indicated by the broken line 42 which short circuits the coil, and in the other of which a closed loop including the high value detection resistor 30 and the coil is formed. The effect of this intermittent switching action will be explained later. At first, to simplify the explanation, the condition in which the said closed loop including the detection resistor 30 is formed at a time when the rotor has just been driven will be explained. Figure 11 a shows the wave form of the voltage produced across the detection resistor 30 in this condition if the motor is approximately in the no load condition.Figure 1 3a shows the corresponding waveforms of the voltage produced across the detecting resistor 30 when the motor is under the maximum load which it can overcome when driven by the normal driving pulses applied and when it is over-loaded so as to be non-rotatable. Curves a in Figure 1 3a apply to the maximum load condition and curves b to the overload condition. Figure 1 3b corresponds with Figure 11 b.Since the rotational speed of the rotor in the maximum load condition (curves a) is relatively slow and the magnitude of the rotor oscillation which occurs after rotation through one step is small, the waveform of the produced voltage exhibits comparatively little irregularity though, when the overload condition exists, negative going peak voltage is produced when the rotor, unable to execute a complete step, but returns to the original position it occupied before the driving pulse was applied. Except for this negative peak, the produced voltage variations are relatively small in the overload condition.

Although there are many ways in which the voltage induced in the coil (i.e. the voltage across the detecting resistor) by oscillations of the rotor after it has been driven can be utilised to determine whether the overload condition exists or not, an excellent, simple and sure way of achieving such determination is by detecting the existence of the peak P (see Figure 11 a) i.e. by detecting whether potential across the detection resistor 30 reaches above a predetermined potential within the predetermined time in which the peak P should be produced shortly after the termination of the applied drive pulse.Although, when effecting detection in this way, the result of detection is that the motor is considered to be in the non-rotatable condition, when maximum load is present as in the curves a of Figure 1 3 - despite that, when such a load is present, the rotor will, in fact, just be able to rotate this result, though strictly speaking in error, is not in practice an error of any importance, for the error is very small and, in any case, it is an error on the side of safety for the effect of detecting the non-rotatable condition in this circumstance is merely to cause the production of a correction pulse when, strictly speaking, it is not absolutely necessary and no practical harm is done.

The lower part of Figure 14 shows a set of induced voltage waveforms produced in the coil after driving with the application of normal driving pulses of various different pulse widths. (A driving current pulse is shown in the upper part of Figure 14). It will be seen from Figure 14 that if the pulse width of a normal driving pulse becomes greater than a predetermined width, the peak value in the produced voltage waveform becomes lower (as shown by the Peak P;) in spite of the motor being in a condition of no-load and rotating normally. This is illustrated more clearly in Figure 1 5 in which the abscissa axis represents values of normal driving pulse width and the ordinate axis represents the peak voltage of the produced voltage.In Figure 1 5 the curve 45 represents the results obtained if the detection resistor is continuously connected in series with the coil after driving the same (as described hereinbefore) and curve 46 represents the results obtained if the detection resistor is intermittently connected in a closed loop as last described.

An effect resulting from continously connecting a detection resistor in series with the coil after the application of a driving pulse will now be explained. In a conventional driving circuit as shown in Figure 2, in which the driving of the motor is obtained by the use of two inverters, the two ends of the motor coil are in effect shorted together by a resistance of low value which is presented by the inverter circuit when the motor is in the non-rotatable condition and, therefore, the current produced by the voltage induced in the coil flows through the short-circuiting path 42 shown in Figure 12. This current causes the generation of heat in the low value resistance just mentioned and in the transistor used for driving and, as a result, the rotor is damped.When however a closed loop is formed through the path 43 shown in Figure 12 in order to detect the produced voltage, a detection resistor 30 of high value is in addition connected in series to the driving circuit and the current flowing through the damping circuit is therefore much smaller than in the former case.

Accordingly, switching between the two circuits (that through path 42 and that through path 43) at the time when rotor movement is being damped or braked causes considerable changes in the current flowing. However, because of the large inductance of the motor coil, the circuit thereof cannot follow in response to the change of current but exhibits delayed response characteristics with a delay having a time constant T=L1Rd, where L is the inductance of the coil and Rd=(R+R30) in the braking circuit, R being the resistance of the coil and R30 that of the resistor 30. The value of the voltage produced across the detection resistor 30 is approximately zero when the braking circuit is through the path 42 shown in Figure 12, and at the moment of switching over to the path 43, the coil 7 operates to maintain the flow of current at the braking operation through the path 42. As a result, a relatively high value of voltage is developed across the high value detection resistor 30 at this moment. After this, the said high value of voltage reduces in accordance with the time constant "T". Figure 1 6 shows an example of the waveform of the voltage V produced across the detection resistor 30 during the time T2.

It will be observed that amplification or increase of the voltage produced by the motor at the time of rotor braking action is achieved merely by changing the value 6f the effective resistance in the rotor braking circuit, a maximum peak voltage value reaching well above the value (usually about 1.5V) of the power supply fed to the driving circuit being obtained when the detection resistor is intermittently connected in circuit (see curve 46 of Figure 15) whereas a maximum value of peak voltage of only about 0.8V at the most is obtained when the produced voltage is continuously detected (see curve 45 of Figure 15). It is very easy to detect such a large voltage.Further, as will be also seen from Figure 14, the undulations in the produced voltage characteristic become much reduced when the width of the normal driving pulse is increased beyond a certain amount.

The two methods or principles which can be used for detecting the condition (rotatable or nonrotatable) of the motor - in other words for detecting the movement of the rotor - when carrying out the present invention having been described, an embodiment of the present invention will now be described.

Figure 17 is a block diagram of the said embodiment.

Referring to Figure 1 7, block 90 represents a quartz crystal controlled time standard oscillator having (to quote a practical example) a frequency of 32,768 Hz. Output from this oscillator is fed to a frequency divider 91 consisting of (in this example) fifteen cascaded flip-flops and producing a time signal output of 1 Hz.

Terminal 97 is a reset input terminal of the watch, and all the frequency dividing stages of the divider can be reset in well known manner by the application of a suitable reset input signal to terminal 97. Block 92 is a waveform combining circuit whereby pulses obtained from selected different stages in the divider are combined to produce at the output terminals P0 to P5 timing waveforms as shown in the timing chart of Figure 1 8. The circuitry of the combining circuit 92 may be as well known per se - it may consist of logic circuits employing NAND gates and NOR gates - and there is therefore no need to describe it in detail herein for its detailed design presents no problems to those skilled in the art.Block 93 is a control circuit controlling the driving circuit 94 driving the stepping motor (represented by block 96) and block 95 represents the detection circuit.

Figure 1 9 shows the circuitry of the driving circuit 94 and the detecting circuit 95 of Figure 17, and its input terminal T, corresponds with the similarly referenced output terminal of the control circuit 93 in Figure 1 7. Only when the terminal T, is "H" (logic HIGH) one output terminal of the coil of the stepping motor 96 is "H" and the other terminal is "L", (logic LOW) and as a result, current flows into the stepping coil. Terminals T2 and T3 in Figure 1 9 correspond with the similarly marked terminals in Figure 17. Block 100 is a flip-flop. When the terminal T2 becomes "H", the Q and Q outputs of the flipflop 100, which are applied as shown to Ex-OR gates 121 and 122, are inverted by those gates so long as the terminal T2 remain "H".In this way, as will be seen more clearly later, the reversal of the driving pulse current flow through the motor in the manner required to cause it to step forward, in 1 800 steps, is achieved.

If the motor is unable, for some reason, to rotate 18QO when a normal driving pulse is applied thereto a correction pulse P2 is applied to the motor and subsequently a short pulse P3 which is in the opposite direction to the pulse P2 is applied. These pulses, and their timings, are shown in Figure 1 8 and the terminals at which they appear are indicated by the same references in Figures 17 and 19. The different widths of the pulses P2 and P3 will be noted.As already explained the magnetic saturation time of the saturable magnetic path in the integrally formed motor stator at the time when the next driving pulse after the application of a correction driving pulse P2 was applied would be longer (if said normal drive pulse directly followed said correction pulse) than it would be if next driving pulse followed the application of a pulse which is shorter than a correction pulse. It is because of this that the shorter pulse P3, in the reverse direction to the preceding correction pulse P2, is applied to the motor coil after the application of the preceding pulse P2, the said pulse P3 being in the direction to demagnetise the stator so as to prepare it for receiving the next driving pulse, and thus reduce the time required for stator saturation when said next driving pulse arrives.

The output at terminal T3 of the control circuit 93 (Figure 17) is applied to the input terminal T3 of Figure 1 9. In the embodiment now being described the operation of detecting the condition (rotatable or non-rotatable) of the rotor is carried out by using the pulse at T3 in accordance with the second of the two methods previously described herein i.e. that in which voltage induced in the motor coil is utilised.

When a pulse P0 having a period of one second is applied to the flip-flop~lF/F) 100 it produces a signal having a frequency of 1/2 Hz. The Q output of the F7F 100 is applied to one input of the Ex-OR gate 121 and, the 0 output is applied to one input of the Ex-OR gate 122. The signal at the terminal T2 is applied to the remaining inputs of the gates 121 and 122. The output of the Ex-OR gate 121 is applied to one output of each of two NOR gates 102 and 103,, and the output of the Ex-OR gate 122 is applied to one input of each of two NORgetes 104 and 105.

Terminal T1 is connected through a NOT gate 101 to the remaining inputs of the NOR gates 1 03 and 104 and the terminal T3 is connected through a NOT gate 120 to the remaining inputs of the NOR gates 102 and 105.

The output of the NOR gate 1 02 is connected to one input of a NOR gate 106 and also to an Ntype MOS FET 11 5 while the output of the NOR gate 1 03 is connected through a NOT gate 123 to the input of a P-type MOS FET 113 in the driving circuit of the stepping motor and also to the remaining input of the NOR gate 106.

The output of the NOR gate 104 is connected to one input of a NOR gate 107 and also through a NOT gate 124 to the input of a P-type MOS FET 11 8 which is also in the driving circuit of the motor while the output of a NOR gate 105 is connected to an N-type MOS FET 11 6 and to the remaining input of the NOR gate 107. The output of the NOR gate 106 is connected to the input of an N-type MOS FET 114 in the driving circuit of the motor while the output of the NOR gate 107 is connected to the input of an N-type MOS FET 11 9 which is also in the motor driving circuit.

VDD is the positive terminal (it appears twice in Figure 19) of the power supply of the watch. The source electrodes of the P-type MOS FETs 113 and 118 are connected to this terminal; the source electrodes of the N-type MOS FETs 114 and 11 9 are grounded; the drain electrodes of the P-type MOS FET 113 and the N-type MOS FET 114 are connected to each other; and these drain electrodes are connected to one of the terminals of the motor coil. The coil is not shown in Figure 19 but it is connected between the terminals marked "Motor Out". The said drain electrodes of the MOS FETs 11 3 and 114 are also connected to the drain electrode of an N-type MOS FET 11 5 used for detection.

The drain electrodes of the P-type MOS FET 118 and the N-type MOS FET 11 9 are connected to each other, and to the remaining terminal of the motor coil and also to the drain electrode of an N-type MOS FET 11 6 which is also used for detection.

The source electrodes of the N-type MOS FETs 11 5 and 11 6 are connected to each other and through a resistor 117 to ground and also, through lead To to the positive input terminal of a comparator which is here referenced 110. The negative input terminal of the comparator 110 is connected to the junction point of two resistors 108 and 109 which are in series with an N-type MOS FET 111 between the positive supply terminal VDD and ground.

The signal appearing on the lead To is the detection signal which shows whether the rotor has rotated or not, and the circuit comprising the potentiometer formed by the resistors 108,109 and including the comparator 110 and the N-type MOS FET 111 constitutes the detecting circuit 95 of Figure 1 7. If the detection signal To is such that it can be detected by utilizing the threshold voltage of a CMOS gate circuit, a CMOS NOT gate may be used in place of the circuitry shown in the block 95.

The N-type MOS FET 111 is used for inhibiting the detecting operation and, the source electrode thereof is grounded. The ground terminal of the comparator 110 is also connected to the junction point of drain electrode of the N-type MOS FET 111 with the resistor 109.

The output signal from the comparator 110 is produced at the terminal 112 (referenced T4 in Figure 17 and also referenced T4 in Figure 19) and this signal T4 is applied to the control circuit 93 (see Figure 17).

The comparator 110 is of CMOS construction. Its circuitry is shown in detail in Figure 20 (a) and in block diagram form in Figure 20 (b).

Referring to Figure 20a a terminal 1 64 is the positive input terminal of the comparator terminal 165 is its negative input terminal, terminal 1 66 is its output terminal and terminal T3 is an enabling terminal for the comparator.

The functions performed by these comparators are shown in Table 1 below: TABLE 1

"+" input "-" input enabling output terminal terminal terminal terminal ~ O V + > ' V ~ 1 "H" Vs < V~ 1 "L" The positive terminal of VDD of the power supply is connected to the source electrodes of P-type MOS FETs 160 and 162.

The gate electrode of the P-type MOS FET 1 60 is connected to the drain electrode thereof and the junction point of these electrodes is connected to the gate electrode of the P-type MOS FET 1 62 and to the drain electrode of a P-type MOS FET 1 61.

The gate of the N-type MOS FET 1 61 is connected to the terminal 1 64 and the source thereof is connected to the drain of the N-type MOS FET 111.

The drain electrode of the P-type MOS FET 1 62 is connected to the drain electrode of an N-type MOS FET 1 63 and also to the output terminal 1 66 while the gate electrode of said N-type MOS FET 1 63 is connected to the terminal 1 65. The source electrode of the FET 1 63 is connected to the drain electrode of the N-type MOS FET 111 and also to the source electrode of the N-type MOS FET 161.

The source electrode of the MOS FET 111 is grounded and the gate electrode thereof is connected to the terminal T3.

The N-type MOS FETs 161 and 163 are chosen to have electrical characteristics which are as equal as practicable and the MOS FETs 1 60 and 1 62 are also chosen to have electrical characteristics which are as equal as practicable.

The operation of the comparator 110 will now be described. It should be remarked here that when the enabling terminal T3 is "L", the N-type MOS FET 111 is OFF, and the comparator cannot operate but when said terminal T3 becomes "H", the N-type MOS FET 111 is turned ON, and the comparator is put into an operable condition.

The threshold voltage for the detection signal is obtained from the potentiometer including the series resistors 108 and 109. If current was always left flowing through this potentiometer there would be considerable waste of power. It is to avoid this that the MOS FET 111 is connected in the potentiometer circuit and is so controlled that current can flow in the circuit only when the pulse T3 makes the terminal so marked become "H" and the MOS FET 111 is turned on. In this way a useful saving in power consumption is achieved.

When an input voltage V, is applied to the terminal 1 64, the potential and the current appearing at the junction point 1 68 in Figure 20a are as shown in Figure 21 a in which V168 is the potential at the point 1 68, and 1168 is the current flowing at this point. The potential V168 is applied to the gate electrode of the P-type MOS FET 162, and the saturation current of this MOS FET is equal to the current 1168.

This condition is shown by the characteristics in Figure 21 (b).

When, hdwever, the voltage applied to the terminal 1 65 is V2, the saturation current of the N-type MOS FET 1 63 becomes larger than 1168 if V2 is larger than V1.

Consequently, the potential V166 at the output terminal 166 becomes L approximately.

This condition is shown by the operating point "X" in Figure 21 (b).

On the other hand if V1 is larger than V2, the output V166 becomes "H". This condition is shown by the operating point Y in Figure 21 (b).

The foregoing explains how the function shown in Table 1 are obtained.

Figure 22 shows an example of the circuitry of the control circuit 93 shown in Figure 17.

The output signal T4 from the detecting circuit 95 is applied to the set-input terminal S of a setreset (SR) of F/F 140. The signal at P1 from the waveform combining circuit 92 is applied to the reset terminal R of F/F 140 and to a clock input terminal of a binary counter 143, and also to one input of a three input AND gate 156 and in addition to a NOT gate 1 57.The output signal Pafrom the waveform combining circuit 92 and the Q output of the SR-F/F 140 are applied to the respective inputs of an AND gate 141. The output P3 from the waveform combining circuit 92 and the E output of the SR-F/F 140 are applied to the respective inputs of an AND gate 142 the output from which is applied to the driving circuit 94 (Figure 17) at T2.The output P6 from the waveform combining circuit and the output from the SR-F/F 140 are applied to the respective inputs of an AND gate from which is applied to the driving circuit 94 at T3.

In the embodiment now being described, the binary counter 143 consists of four flip-flop stages and the output signals Q1 to Q4 from these stages are applied to the respective inputs of a fourinput AND gate 144 the output from which is applied to one input of an OR gate 145 the other input to which is taken from the output of the AND gate 142. The u output from the SR-F/F 140 and the output of a NAND gate 147 are applied to the respective inputs of an AND gate 146. 148 is an up/down counter and the output of the AND gate 146 is applied to the U/D terminal (up/down control input terminal) of this counter, the output of the OR gate 145 being applied to the clock input terminal C of this counter.In the embodiment now being described the up/down counter 148 has three flip-flop stages of flip-flops, the Q1, Q2 and Q3 outputs of which are respectively applied to the inputs of the three-input NAND gate 147. These three output Q1, Q2 and Q3 are applied respectively to one input of each of three Ex--OR gates 1 52, 1 51 and 1 50. The outputs P1 and P4 of the waveform combining circuit 92 and the Q output of the SR-F/F 1 58 are applied respectively to the inputs of a three-input AND gate 1 56 the output from which is connected to the clock input C of a binary-counter 149. The Q output of the RS--F/F 1 58 is applied to the reset input terminal R of the counter 149.In the embodiment now being described the binary counter 149 consists of three flip-flop stages and the output Q1, Q2and Q3 of these stages are applied to the respective inputs of a three-input OR gate 1 54, and also respectively to the remaining inputs of the Ex-OR gates 1 50, 1 51 and 1 52. The outputs of the Ex-OR gates 150, 151 and 152 are applied to the respective inputs of a three-input OR gate 153 the output of which is applied to the set input "S" of the SR-F/F 1 58. The output of the AND gate 141 , the output of the AND gate 142, the output of the OR gate 154 and the output P0 from the waveform combining circuit 92 are applied to the respective inputs of a four-input OR gate 155, the output from which appears at the T1 terminal of the driving circuit 94 (Figure 17).

The operation of the embodiment will now be described.

Assume the rotor to rotate and that the SR-F/F 140 is in the set condition due to the application of a detection signal T4 to its set terminal S. The Q output of 140 is thus L, the outputs of all the AND gates 141, 142, 146 and 1 59 become L, the output T3 of the AND gate 1 59 becomes L and, the detection circuit is inhibited due to the MOS FET 111 being OFF. The up/down counter 148 operates as an up counter when its U/D input is H and as a down counter when its U/D input is L, and the said counter 148 acts as a down counter when the rotor is rotating.

Since the output P from the waveform combining circuit 92 (Figure 17) is applied to the clock input terminal C of the binary counter 143 every second, and because, in this embodiment, the binary counter is a four-stage counter, the output of the AND gate 144 becomes H every sixteen seconds. This output is applied to the clock input C of the up/down counter 148 through the OR gate 145, and the count contents of the up/down counter 148 is reduced by 1 every sixteen seconds.

The output P4 of the waveform combining circuit 92 is a signal with a frequency of 2048 Hz, and a period of approximately (actually a little more than) 0.5 ms. This output P4 is applied to the clock input C of the binary counter 149 through the AND gate 1 56 only when the output P1 from the waveform combining circuit 92 is H. In this embodiment, as already stated, the binary counter 149 consists of three flip-flop stages.The Ex-OR gates 1 50, 1 51 and 1 52 check whether the output of the binary counter 149 is coincident with the output of the up/down counter 148 and, when such coincidence occurs the outputs of these Ex-OR gates become L, the output of the NOR gate 1 53 becomes H, the SR-F/F 1 58 is reset so that its Q output becomes H and the binary counter 149 is reset. As a result, the output of the OR gate 1 54 becomes H, the time width of this output being equal to the product of the count in the up/down counter 148 and the time of 0.5 ms.

If the detecting circuit 95 does not produce an H signal during a time for detection, this will be because the rotor could not be rotated by the application of the first driving pulse thereto and, in this condition, the Q output of the SR-F/F 140 remains H. As a result, the wide P2 correction pulse from the waveform combining circuit 92 is delivered from the output of the OR gate 155 unchanged, and carries out correction driving of the motor. The output P3 of the waveform combining circuit 92 appears at the output of the AND gate 142 as this signal T2 is applied to the driving circuit 94.Because at this time, the circuit 94 controls current direction in such a way as to cause the current flow to be in a direction which is opposite to that of the current flowing through the motor coil in correction driving, and at the same time the T1 signal from the output of the OR gate 155 is applied to the driving circuit 94, undesirable effects of residual magnetism produced in the motor stator by the correction pulse are reduced or eliminated and the stator put into a condition in which the saturable magnet path can be quickly saturated. Moreover, since the Q output of the RS-F/F 140 is H, the output of the ANDgate 146 becomes H, the U/D input of the up/down counter 148 becomes H and said counter is set in the up counting mode.The P3 output from the waveform combining circuit 92 is applied to the clock input terminal C of the up/down counter 148 through the AND gate 142 and the OR gate 145. Consequently, the count content of the up/down counter 148 change by + 1, and the width of the next normal driving pulse to be produced becomes greater by 0.5 ms. All the flip-flop outputs Q1. Q2 and Q3 in the up/down counter 148 become H. The contents in the counter are prevented from becoming all L at the time of the application of the up input thereto because the output of the AND gate 146 becomes H when all the inputs of the NAND gate 147 become H, and the up/down counter 148 is operated as a down counter.

The P0 output from the waveform combining circuit decides the minimum pulse width of a normal driving pulse. A predetermined definite minimum normal driving pulse width is adopted in order to avoid the loss of energy which would occur if there were no minimum and the pulse width had to be increased by 0.5 ms at a time from zero until a sufficiently wide pulse for driving the motor was obtained. In the present embodiment the minimum pulse width of the normal driving pulse is set at about 1.9 ms.

The counting content in the up/down counter 148 is not reset even if the frequency divider 91 is reset and change in the pulse width of the driving pulse starts from the value of the pulse width which was present before a reset operation even if the reset condition is released.

If the normal driving pulse width present at any time is too short for rotating the stepping motor i.e. the non-rotatable condition exists - the output signal T4 from the detecting circuit becomes L, the Q output of the SR-F/F 140 becomes H and the output signal P2 from the waveform combining circuit 92 is applied to the stepping motor 96 as a correction driving pulse. The pulse width of the correction pulse signal P2 is chosen at a value sufficient to ensure sufficient torque from the motor to overcome the worst load and working conditions to be expected. In this embodiment, this width is set at 7.8 ms. Since the up/down counter 148 counts up when the P3 output is applied, its counting content changes by + 1.

Therefore, if the pulse width of the driving pulse developed after one second is 1.9 ms, the pulse width of the normal driving pulse developed after two seconds becomes equal to the pulse width of the output "T," (1.9 ms) plus 0.5 ms. In other words the normal driving pulse becomes 2.4 ms. If the motor is still not rotatable by this 2.4 ms pulse it would be driven by a second correction driving pulse having a width of 7.8 ms, after which the count content of the up/down counter would be set at 2 by the output T3 from the waveform combining circuit 92 and the normal driving pulse width developed after three seconds would become 2.9ms. If the motor was still not rotatable, the operations described above would be repeated and the pulse width increased every second by 0.5 ms until the pulse width was the minimum necessary to rotate the motor under the load and other conditions then obtaining. However, when the count content of the binary counter 143 becomes 16, the output of the AND gate 144 becomes H and, the content in the up/down counter 148 changes by -1. Thus, if normal driving is being effected by using a driving pulse having a width of 3.4 ms, the normal driving pulse width is reduced to 2.9ms .

and so on. When the non-rotatable condition is detected the rotor is rotated by the application of a correction driving pulse as already described, and 1 is added to the count content of the up/down counter. If this occurs when the driving pulse is, for example, 2.9 ms wide the width of the next normal driving pulse to be applied after the correction pulse will be 3.4 ms.

In a wrist watch having a calendar mechanism, the load on the motor is increased for about 6 hours per day due to the load imposed by the calendar mechanism. As will be seen, the present invention would, in such a case, secure the provision of driving pulse widths of 3.9 ms, 4.4 ms, 4.9 ms and so on - i.e. whatever width was the minimum necessary to keep the motor rotating properly during the time occupied by calendar changing, whereas, in conditions of low motor loading, shorter pulses would be used. Thus automatic adjustment of the pulse width by 0.5 ms at a time is achieved every sixteen seconds. As a result, the motor is always driven by the application of driving pulses of the minimum width for driving and, practically speaking, minimum power consumption is obtained.

In the embodiment just described since the binary counter 143 has four stages a driving pulse and a correction pulse are produced every sixteen seconds. An even lower power consumption can be obtained, if required, by reducing the frequency at which a normal driving pulse and a correction driving pulse are produced within one second. This can be done by increasing the number of stages in the binary counter 143.

However, if the number of stages in the counter 143 is excesively increased, it will take a relatively long time for the width of the driving pulses to return to the minimum width required to overcome a small load if the load becomes small after a large load has caused a wide driving pulse to come into use.

Therefore no advantage is obtained if the number of stages in the counter 143 is increased excessively.

Probably a four stage counter 143 is about the best in practice.

It will have been observed that, in the embodiment described, the circuit elements employed are such as to lend themselves admirably to incorporation on a single MOS-IC chip; the stepping motor used is a known one which has been found very reliable in practice and can be made very small and it is driven by pulses which are adjusted in width automatically to be (practically speaking) of the minimum width necessary to ensure correct rotation under the load and other conditions obtaining at any time so that (practically speaking) minimum overall power consumption is achieved. These advantages make the invention very advantageously applicable to wrist watches, enabling them to be made very thin and - small and to be manufactured at relatively low cost.

Furthermore, timepieces embodying the invention can be easily tested and their function and performance checked after manufacture.

The invention is not limited to the use of the particular motor described and illustrated and having an integrally formed stator, for (for example) a motor having a so-called tow-body stator could be used.

Claims (12)

1. A stepping motor driven analog electronic timepiece comprising a time display driving stepping motor adapted to advance in successive steps in the same direction in response to the application thereto of current pulses in successively opposite directions; means for producing normal drive pulses for driving said motor; means for increasing or decreasing the width of said normal drive pulses by predetermined relatively small increments or decrements of width; means for detecting whether the motor is rotatable or non-rotatable by a normal drive pulse -applied to it at any time; means for producing relatively wide correction drive pulses and for applying a correction drive pulse to drive the motor in response to the detection of the non-rotatable condition; means for periodically decreasing the normal drive pulse width by successive steps of decrement as long as the rotatable condition exists; and means for increasing the width of the normal drive pulses applied to the motor after the application of a correction drive pulse thereto resulting from the detection of the non-rotatable condition by an increment relatively to the normal drive pulse width which existed before the application of said correction drive pulse.

2. A timepiece as claimed in claim 1 wherein the minimum width of the normal drive pulses is limited to a pre-determined value.

3. A timepiece as claimed in claim 1 or 2 wherein the motor is of the type having a driving coil magnetically linked with a stator providing a saturable magnetic circuit and a permanently magnetised rotor with at least one pair of magnetic poles and wherein detection is effected by applying two relatively short successively oppositely directed detection pulses to said coil after a drive pulse has been applied thereto, developing a voltage from the current flowing through the coil in each detection pulse and ascertaining whether the first or the second detection pulse develops the larger voltage.

4. A timepiece as claimed in claim 1 or 2 wherein the motor is of the type having a driving coil magnetically linked with a stator providing a saturable magnetic circuit and a permanently magnetised rotor with at least one pair of magnetic poles and wherein detection is effected by utilising the voltage induced in the coil by the rotation and oscillatory movement of the rotor which occurs after it has been driven.

5. A timepiece as claimed in claim 4 wherein detection is effected by ascertaining whether or not a peak voltage exceeding a predetermined value is induced in the coil at a predetermined time.

6. A timepiece as claimed in any of the preceding claims wherein means for periodically decreasing the normal drive pulse width and increasing said width after the application of a correction pulse include an up/down counter.

7. A timepiece as claimed in any of the preceding claims wherein the application of a correction drive pulse to the motor is followed by the application thereto of a relatively short pulse in a direction to effect demagnetisation of the motor stator caused by magnetisation thereof by the preceding correction drive pulse.

8. A stepping motor driven analog electronic timepiece substantially as herein described with reference to Figure 1 7.

9. A timepiece as claimed in claim 8 having driving and detecting circuits substantially as herein described with reference to Figure 1 9.

10. A timepiece as claimed in claim 8 having a control circuit substantially as herein described with reference to Figure 22.

11. A timepiece as claimed in claim 8 and having a detecting circuit substantially as herein described with reference to Figure 9.

12. A timepiece as claimed in claim 8 and having a detecting circuit substantially as herein described with reference to Figure 12.