GB1338776A - Automatic time control circuit - Google Patents
Automatic time control circuitInfo
- Publication number
- GB1338776A GB1338776A GB2303771*A GB2303771A GB1338776A GB 1338776 A GB1338776 A GB 1338776A GB 2303771 A GB2303771 A GB 2303771A GB 1338776 A GB1338776 A GB 1338776A
- Authority
- GB
- United Kingdom
- Prior art keywords
- circuit
- pulse
- control
- delay
- monostable
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/081—Details of the phase-locked loop provided with an additional controlled phase shifter
- H03L7/0812—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used
- H03L7/0814—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used the phase shifting device being digitally controlled
Landscapes
- Pulse Circuits (AREA)
- Radar Systems Or Details Thereof (AREA)
Abstract
1338776 Automatic phase control systems; monostable circuits INTERNATIONAL STANDARD ELECTRIC CORP 19 April 1971 [10 March 1970] 23037/71 Headings H3A and H3T An automatic time control circuit for delaying a signal by a predetermined amount includes an adjustable delay circuit 3, a circuit 4 for deriving a control signal pulse C having a length equal to the actual delay suffered by an input pulse A in its passage through a processing circuit 1, 3, 2, a circuit 6, 7 for generating synchronously with the control pulse C a reference pulse D having a duration equal to a predetermined delay, a phase comparator 5 for comparing the control and reference pulses for controlling the delay provided by 3. The pulse D is obtained by a circuit 7 counting a predetermined number of reference pulses from oscillator 6 when initiated by the control pulse C. The adjustable delay circuit is a monostable circuit (see Fig. 4) whose time constant is varied by the phase comparator 5 output. A monostable circuit such as shown in Fig. 4 has its unstable period varied by the application of a control voltage CV to a voltage controlled resistor R which may be an F.E.T. or to vary bias voltages V 1 or V 2 for controlling the discharge time of C. The circuit produces an output pulse of controlled width at B<SP>1</SP> in response to an input pulse at A<SP>1</SP>.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| IT2168370 | 1970-03-10 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| GB1338776A true GB1338776A (en) | 1973-11-28 |
Family
ID=11185327
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB2303771*A Expired GB1338776A (en) | 1970-03-10 | 1971-04-19 | Automatic time control circuit |
Country Status (2)
| Country | Link |
|---|---|
| JP (1) | JPS5612828B1 (en) |
| GB (1) | GB1338776A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2130450A (en) * | 1982-11-09 | 1984-05-31 | Del Norte Technology | Delay control circuit |
| GB2130825A (en) * | 1982-10-20 | 1984-06-06 | Sanyo Electric Co | A delay circuit |
| EP0087874A3 (en) * | 1982-02-25 | 1984-09-05 | Sperry Corporation | Apparatus and method for generating pretrigger and trigger signals |
| GB2316208A (en) * | 1996-08-13 | 1998-02-18 | Fujitsu Ltd | Semiconductor device and digital delay circuit |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104319927B (en) | 2014-10-11 | 2016-04-27 | 新疆金风科技股份有限公司 | There is motor slot wedge and the combination unit of hermetically-sealed construction |
-
1971
- 1971-03-10 JP JP1250471A patent/JPS5612828B1/ja active Pending
- 1971-04-19 GB GB2303771*A patent/GB1338776A/en not_active Expired
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0087874A3 (en) * | 1982-02-25 | 1984-09-05 | Sperry Corporation | Apparatus and method for generating pretrigger and trigger signals |
| GB2130825A (en) * | 1982-10-20 | 1984-06-06 | Sanyo Electric Co | A delay circuit |
| GB2130450A (en) * | 1982-11-09 | 1984-05-31 | Del Norte Technology | Delay control circuit |
| GB2316208A (en) * | 1996-08-13 | 1998-02-18 | Fujitsu Ltd | Semiconductor device and digital delay circuit |
| US6201423B1 (en) | 1996-08-13 | 2001-03-13 | Fujitsu Limited | Semiconductor device, semiconductor system, and digital delay circuit |
| GB2316208B (en) * | 1996-08-13 | 2001-04-11 | Fujitsu Ltd | Semiconductor device |
| US6298004B1 (en) | 1996-08-13 | 2001-10-02 | Fujitsu Limited | Semiconductor device, semiconductor system, and digital delay circuit |
| US6498524B1 (en) | 1996-08-13 | 2002-12-24 | Fujitsu Limited | Input/output data synchronizing device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5612828B1 (en) | 1981-03-24 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PS | Patent sealed [section 19, patents act 1949] | ||
| PCNP | Patent ceased through non-payment of renewal fee |