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GB1110993A - Semiconductors - Google Patents

Semiconductors

Info

Publication number
GB1110993A
GB1110993A GB1201/67A GB120167A GB1110993A GB 1110993 A GB1110993 A GB 1110993A GB 1201/67 A GB1201/67 A GB 1201/67A GB 120167 A GB120167 A GB 120167A GB 1110993 A GB1110993 A GB 1110993A
Authority
GB
United Kingdom
Prior art keywords
wafer
type
regions
face
diffused
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB1201/67A
Inventor
Zenon Jan Kurpisz
Brian Anthony Hegarty
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STC PLC
Original Assignee
Standard Telephone and Cables PLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Standard Telephone and Cables PLC filed Critical Standard Telephone and Cables PLC
Priority to GB1201/67A priority Critical patent/GB1110993A/en
Publication of GB1110993A publication Critical patent/GB1110993A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157Partial encapsulation or coating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/761PN junctions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D99/00Subject matter not provided for in other groups of this subclass
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Thyristors (AREA)

Abstract

1,110,993. Semi-conductor devices. STANDARD TELEPHONES & CABLES Ltd. 9 Jan., 1967, No. 1201/67. Heading H1K. In a method of making semi-conductor devices in multiple an impurity is diffused into a predetermined region or regions of a wafer of the opposite conductivity type and grooves etched in at least one face of the wafer so as to form isolated regions of said opposite conductivity type. The wafer is then subdivided into devices each containing at least one of these regions. In the embodiment PNPN switches are made by evaporating aluminium on to both faces of a 175Á N type silicon wafer, etching to the form of two opposed grids, and diffusing it in to form a P type grid extending through the wafer. The entire surface of the wafer is next converted to P type by diffusing gallium through an oxide coating. Phosphorus is then deposited on and diffused into one face through apertures etched in the oxide coating to form N regions. Both faces are covered with oxide masking 12 (Fig. 8) and nickel electrodes 11 electroless plated on the exposed areas. After dipping in molten solder which adheres to the plating, a photo-resist mask is applied to leave only the grid region exposed. The overlying oxide and the wafer is then etched in this region down to the N type wafer material (Fig. 11). After applying a protective layer of silicone rubber the solder contacts are re-exposed by abrasion and the wafer divided along the grooves into individual elements. In an alternative method aluminium is diffused into only one face and the grooves formed in the other. To form a bi-directional switch additional N type regions are formed on the lower face of the wafer and beneath the site of the gate contact.
GB1201/67A 1967-01-09 1967-01-09 Semiconductors Expired GB1110993A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB1201/67A GB1110993A (en) 1967-01-09 1967-01-09 Semiconductors

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB1201/67A GB1110993A (en) 1967-01-09 1967-01-09 Semiconductors

Publications (1)

Publication Number Publication Date
GB1110993A true GB1110993A (en) 1968-04-24

Family

ID=9717919

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1201/67A Expired GB1110993A (en) 1967-01-09 1967-01-09 Semiconductors

Country Status (1)

Country Link
GB (1) GB1110993A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2005250A1 (en) * 1968-04-01 1969-12-12 Lucas Industries Ltd
FR2091936A1 (en) * 1970-05-19 1971-01-21 Gen Electric
FR2044768A1 (en) * 1969-05-05 1971-02-26 Gen Electric
FR2333350A1 (en) * 1975-11-26 1977-06-24 Gen Electric ELEMENTARY TABLET CONSTITUTING A SEMICONDUCTOR DEVICE AND MANUFACTURING PROCESS
DE102016124669B3 (en) 2016-12-16 2018-05-17 Semikron Elektronik Gmbh & Co. Kg Thyristors with a respective semiconductor body

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2005250A1 (en) * 1968-04-01 1969-12-12 Lucas Industries Ltd
FR2044768A1 (en) * 1969-05-05 1971-02-26 Gen Electric
FR2091936A1 (en) * 1970-05-19 1971-01-21 Gen Electric
FR2333350A1 (en) * 1975-11-26 1977-06-24 Gen Electric ELEMENTARY TABLET CONSTITUTING A SEMICONDUCTOR DEVICE AND MANUFACTURING PROCESS
DE102016124669B3 (en) 2016-12-16 2018-05-17 Semikron Elektronik Gmbh & Co. Kg Thyristors with a respective semiconductor body

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