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GB1029767A - Improvements in or relating to the manufacture of electrical circuit elements - Google Patents

Improvements in or relating to the manufacture of electrical circuit elements

Info

Publication number
GB1029767A
GB1029767A GB36393/64A GB3639364A GB1029767A GB 1029767 A GB1029767 A GB 1029767A GB 36393/64 A GB36393/64 A GB 36393/64A GB 3639364 A GB3639364 A GB 3639364A GB 1029767 A GB1029767 A GB 1029767A
Authority
GB
United Kingdom
Prior art keywords
conductivity
transistors
mask
type
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB36393/64A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Litton Industries Inc
Original Assignee
Litton Industries Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Litton Industries Inc filed Critical Litton Industries Inc
Publication of GB1029767A publication Critical patent/GB1029767A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/13Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
    • H10D62/137Collector regions of BJTs
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/0262Reduction or decomposition of gaseous compounds, e.g. CVD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/02636Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
    • H01L21/02639Preparation of substrate for selective deposition
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0112Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Bipolar Transistors (AREA)
  • Bipolar Integrated Circuits (AREA)

Abstract

1,029,767. Semi-conductor devices.. LITTON INDUSTRIES Inc. Sept. 4, 1964 [Sept. 12, 1963], No. 36393/64. Heading H1K. A semi-conductor diode or transistor includes a region comprising two contiguous layers of different conductivity but the same conductivity type, one of the layers being formed by diffusion of impurity into a substrate and the other by deposition of doped semi-conductor on to the diffused substrate. A transistor of low saturation resistance but high breakdown voltage may be constructed using such a region as its collector zone, the former layer being of high conductivity and the latter, adjacent the collector-base junction, of low conductivity. The integrated circuit of Fig. 7 (not shown), consisting of a plurality of transistors on a common substrate, is produced by first forming on a silicon substrate 40, Fig. 4 (d), an oxide mask 41 through which phosphorus is diffused to provide high conductivity N-type layers 43. The oxide mask 41 is then removed by etching with mechanical vibration and a new mask 46, of oxide with a trace of an organoboron compound, is formed through which a layer 48, Fig. 4 (f), of low conductivity N-type silicon is epitaxially deposited on part of the surface of each layer 43 at a temperature sufficiently low- 1150‹ C. or less-to inhibit deposition on the oxide of mask 46. A P-type region 50 is then produced by boron diffusion through a new mask on to part of each layer 48; the treatment may be stepped at this stage if diodes rather than transistors are required. To convert these diodes to transistors a further diffusion of N-type material into the P-regions 50 is performed, resulting in the structure of Fig. 7. The connections to and between the transistors of Fig. 7 are laid down by vapour deposition of aluminium followed by photo resist etching or by thermo-compression bonding.
GB36393/64A 1963-09-12 1964-09-04 Improvements in or relating to the manufacture of electrical circuit elements Expired GB1029767A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US30851963A 1963-09-12 1963-09-12

Publications (1)

Publication Number Publication Date
GB1029767A true GB1029767A (en) 1966-05-18

Family

ID=23194294

Family Applications (1)

Application Number Title Priority Date Filing Date
GB36393/64A Expired GB1029767A (en) 1963-09-12 1964-09-04 Improvements in or relating to the manufacture of electrical circuit elements

Country Status (4)

Country Link
JP (1) JPS499267B1 (en)
DE (1) DE1489081B1 (en)
FR (1) FR1413980A (en)
GB (1) GB1029767A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3659160A (en) * 1970-02-13 1972-04-25 Texas Instruments Inc Integrated circuit process utilizing orientation dependent silicon etch
US3768150A (en) * 1970-02-13 1973-10-30 B Sloan Integrated circuit process utilizing orientation dependent silicon etch

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1141386B (en) * 1961-04-26 1962-12-20 Siemens Ag Method for manufacturing a semiconductor device
NL283619A (en) * 1961-10-06

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3659160A (en) * 1970-02-13 1972-04-25 Texas Instruments Inc Integrated circuit process utilizing orientation dependent silicon etch
US3768150A (en) * 1970-02-13 1973-10-30 B Sloan Integrated circuit process utilizing orientation dependent silicon etch

Also Published As

Publication number Publication date
DE1489081B1 (en) 1970-10-22
FR1413980A (en) 1965-10-15
JPS499267B1 (en) 1974-03-02

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