GB1029051A - Improvements in or relating to communication systems - Google Patents

Abstract

1,029,051. Automatic exchange systems. SIEMENS & HALSKE A.G. Jan. 21, 1963 [Jan. 19, 1962], No. 2479/63. Heading H4K. A control circuit for a link-connected multistage switching network comprises a store which contains information regarding the busy or free state of every link in the network and a " translation field " which serves to identify the links in terms of their positions in the network. In a suggested alternative system the store and field may be used to identify cross-points or complete multi-switches. The switching network may comprise relay, cross-coil or crossbar switches of the type disclosed in Specification 897,677. The " link information " store comprises a threedimensional array of magnetic cores (Fig. 5, not shown) and the Specification discusses, with reference to Figs. 6 and 7 (not shown), numerous ways in which the co-ordinates of such an array can be used to identify a particular outlet from a particular multi-switch of a switching stage, i.e. to identify a link in terms of the point from which it extends. The " translation field " may comprise magnetic cores or it may consist of a rectifier network (Fig. 8, not shown), which " translates " a marking pertaining to a link and applied to three inputs thereof into a marking of three outputs thereof which thereby identifies the particular inlet of a particular multi-switch of a switching stage to which the link concerned extends. Operation.-A register allotted to the call marks the inlet KyIj (corresponding to inlet T1j of switch A1) and the outlet (not shown) of the route selecting network. Consequently the storage cell 1 of store HAKG, which contains a storage cell in respect of each AB switching group KG1 to KGY, and a storage cell 1 of store HAKV whose storage cells identify the A- switches I to K within a group, are energized to provide (x, y) markings for section BAB of the " link information" store. A scanner (not shown) on finding marked x and y inputs of the store, causes output pulses to be applied to intermediate store HAB in respect of each free link encountered (as indicated by the magnetic state of the cores located in the z-direction corresponding to the marked x and y co-ordinates). These pulses are then passed to the " translation field " LAB and the location of the links (represented by the pulses) is registered in store HB. Circuit WAB which in effect " scans " the switches BI to BK of AB group KGI then applies pulses to coincidence circuits IU to KU whereupon in respect of the marked links in HB, y co-ordinate input signals are applied to section BBC of the " link information " store, the x co-ordinate marking being supplied from HAKG. Again output pulses are applied via HBC to " translation field " LBC which is of the rectifier type described above whereby the identities of free BC links are registered in store HC1. A similar process occurs for stages between the marked outlet of the network and centre-stage C, the identities of free links in these stages being registered in HC2. Scanner WC then selects the first set of storage cells in HC1 and HC2 which are marked simultaneously, the marking in the remaining cells then being erased. Store HB is again scanned until the first marked cell therein which has access to the marked cell in HC1 is found whereafter the marking in other cells of HB is erased. Finally the register and an associated marker (not shown) derive from stores HA, HB, HC &c. the identity of the chosen connection path and operate cross-points in the switching network accordingly, the just-seized links then being marked busy in the " link information " store. In an alternative arrangement route selection is achieved by marking all available links between the inlet and outlet in one direction only, i.e. without forward and backward marking from the inlet and outlet respectively to a centrestage. One of the switches in the penultimate stage is then selected and then either the procedure described above in connection with the HB and HC stores is repeated or each of the marked links up to the penultimates stage are released, i.e. link identities are erased from stores HB. HC &c. and a new search for a route between the inlet and the marked switch of the penultimate stage is initiated, this last process being repeated until a unique path between the input and output is obtained.