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FR3105469B1 - GRAPHICS PROCESSOR, PLATFORM COMPRISING SUCH A GRAPHICS PROCESSOR AND A MULTI-CORE CENTRAL PROCESSOR, AND METHOD FOR MANAGING RESOURCE(S) OF SUCH GRAPHICS PROCESSOR - Google Patents

GRAPHICS PROCESSOR, PLATFORM COMPRISING SUCH A GRAPHICS PROCESSOR AND A MULTI-CORE CENTRAL PROCESSOR, AND METHOD FOR MANAGING RESOURCE(S) OF SUCH GRAPHICS PROCESSOR Download PDF

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Publication number
FR3105469B1
FR3105469B1 FR1914873A FR1914873A FR3105469B1 FR 3105469 B1 FR3105469 B1 FR 3105469B1 FR 1914873 A FR1914873 A FR 1914873A FR 1914873 A FR1914873 A FR 1914873A FR 3105469 B1 FR3105469 B1 FR 3105469B1
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FR
France
Prior art keywords
graphics processor
processor
platform
graphics
core
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR1914873A
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French (fr)
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FR3105469A1 (en
Inventor
Alexandre Fine
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Thales SA
Original Assignee
Thales SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thales SA filed Critical Thales SA
Priority to FR1914873A priority Critical patent/FR3105469B1/en
Priority to US17/120,911 priority patent/US20210192675A1/en
Priority to CN202011481202.4A priority patent/CN113010467A/en
Priority to EP20215327.6A priority patent/EP3839733B1/en
Publication of FR3105469A1 publication Critical patent/FR3105469A1/en
Application granted granted Critical
Publication of FR3105469B1 publication Critical patent/FR3105469B1/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/48Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806Task transfer initiation or dispatching
    • G06F9/4843Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
    • G06F9/4881Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00General purpose image data processing
    • G06T1/20Processor architectures; Processor configuration, e.g. pipelining
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/177Initialisation or configuration control
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163Interprocessor communication
    • G06F15/167Interprocessor communication using a common memory, e.g. mailbox
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/80Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Computing Systems (AREA)
  • Image Generation (AREA)
  • Controls And Circuits For Display Device (AREA)
  • Digital Computer Display Output (AREA)

Abstract

Processeur graphique, plateforme comprenant un tel processeur graphique et un processeur central multicœurs, et procédé de gestion de ressource(s) d’un tel processeur graphique Ce processeur graphique (18) est destiné à être relié à un processeur central (16) multicœurs ayant N cœurs (C1, C2) distincts, N étant un nombre entier supérieur ou égal à 2, et comprend une mémoire (26). La mémoire (26) comporte un espace réservé (40) de stockage de N ensembles (42) de descripteur(s) (44), chaque ensemble (42) de descripteur(s) (44) étant associé à un cœur (C1, C2) respectif du processeur central (16) multicœurs, chaque descripteur (44) identifiant un lot de ressource(s) du processeur graphique (18) pour l’affichage de donnée(s) par une application logicielle destinée à être exécutée via ledit cœur (C1, C2). Le processeur graphique (18) comprend en outre un séquenceur (28) configuré pour traiter successivement les descripteurs (44) stockés dans l’espace réservé de stockage (40). Figure pour l'abrégé : Figure 1Graphics processor, platform comprising such a graphics processor and a multicore central processor, and method for managing the resource(s) of such a graphics processor This graphics processor (18) is intended to be linked to a multicore central processor (16) having N distinct cores (C1, C2), N being an integer greater than or equal to 2, and includes a memory (26). The memory (26) comprises a reserved space (40) for storing N sets (42) of descriptor(s) (44), each set (42) of descriptor(s) (44) being associated with a core (C1, C2) of the multi-core central processor (16), each descriptor (44) identifying a batch of resource(s) of the graphics processor (18) for the display of data(s) by a software application intended to be executed via said core (C1, C2). The graphics processor (18) further includes a sequencer (28) configured to successively process the descriptors (44) stored in the reserved storage space (40). Figure for abstract: Figure 1

FR1914873A 2019-12-19 2019-12-19 GRAPHICS PROCESSOR, PLATFORM COMPRISING SUCH A GRAPHICS PROCESSOR AND A MULTI-CORE CENTRAL PROCESSOR, AND METHOD FOR MANAGING RESOURCE(S) OF SUCH GRAPHICS PROCESSOR Active FR3105469B1 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
FR1914873A FR3105469B1 (en) 2019-12-19 2019-12-19 GRAPHICS PROCESSOR, PLATFORM COMPRISING SUCH A GRAPHICS PROCESSOR AND A MULTI-CORE CENTRAL PROCESSOR, AND METHOD FOR MANAGING RESOURCE(S) OF SUCH GRAPHICS PROCESSOR
US17/120,911 US20210192675A1 (en) 2019-12-19 2020-12-14 Graphics processor unit, platform comprising such a graphics processor unit and a multi-core central processor, and method for managing resources of such a graphics processor unit
CN202011481202.4A CN113010467A (en) 2019-12-19 2020-12-15 GPU, platform comprising GPU and multi-core CPU and method for managing resources of GPU
EP20215327.6A EP3839733B1 (en) 2019-12-19 2020-12-18 Graphic processor, platform comprising such a graphic processor and a multi-core central processor, and method for managing resource(s) of such a graphic processor

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR1914873A FR3105469B1 (en) 2019-12-19 2019-12-19 GRAPHICS PROCESSOR, PLATFORM COMPRISING SUCH A GRAPHICS PROCESSOR AND A MULTI-CORE CENTRAL PROCESSOR, AND METHOD FOR MANAGING RESOURCE(S) OF SUCH GRAPHICS PROCESSOR
FR1914873 2019-12-19

Publications (2)

Publication Number Publication Date
FR3105469A1 FR3105469A1 (en) 2021-06-25
FR3105469B1 true FR3105469B1 (en) 2021-12-31

Family

ID=71094415

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1914873A Active FR3105469B1 (en) 2019-12-19 2019-12-19 GRAPHICS PROCESSOR, PLATFORM COMPRISING SUCH A GRAPHICS PROCESSOR AND A MULTI-CORE CENTRAL PROCESSOR, AND METHOD FOR MANAGING RESOURCE(S) OF SUCH GRAPHICS PROCESSOR

Country Status (4)

Country Link
US (1) US20210192675A1 (en)
EP (1) EP3839733B1 (en)
CN (1) CN113010467A (en)
FR (1) FR3105469B1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113645412B (en) * 2021-10-15 2021-12-24 北京创米智汇物联科技有限公司 Startup method, startup device, camera and computer-readable storage medium

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9092267B2 (en) * 2011-06-20 2015-07-28 Qualcomm Incorporated Memory sharing in graphics processing unit
US20150091912A1 (en) * 2013-09-27 2015-04-02 Nvidia Corporation Independent memory heaps for scalable link interface technology
FR3025628B1 (en) * 2014-09-04 2017-12-22 Centre Nat D'etudes Spatiales (Cnes) ONBOARD SYSTEM USING CRITICAL AVIONIC FUNCTIONS
US10162405B2 (en) * 2015-06-04 2018-12-25 Intel Corporation Graphics processor power management contexts and sequential control loops
FR3045866B1 (en) * 2015-12-16 2018-02-02 Thales COMPUTER COMPRISING A MULTI-HEART PROCESSOR AND A CONTROL METHOD
US20200027189A1 (en) * 2018-07-23 2020-01-23 Qualcomm Incorporated Efficient dependency detection for concurrent binning gpu workloads

Also Published As

Publication number Publication date
US20210192675A1 (en) 2021-06-24
CN113010467A (en) 2021-06-22
FR3105469A1 (en) 2021-06-25
EP3839733B1 (en) 2025-01-01
EP3839733A1 (en) 2021-06-23

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