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FR3036200B1 - Methode de calibration pour equipements de traitement thermique - Google Patents

Methode de calibration pour equipements de traitement thermique

Info

Publication number
FR3036200B1
FR3036200B1 FR1554322A FR1554322A FR3036200B1 FR 3036200 B1 FR3036200 B1 FR 3036200B1 FR 1554322 A FR1554322 A FR 1554322A FR 1554322 A FR1554322 A FR 1554322A FR 3036200 B1 FR3036200 B1 FR 3036200B1
Authority
FR
France
Prior art keywords
thermal treatment
treatment equipment
calibration method
calibration
equipment
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR1554322A
Other languages
English (en)
Other versions
FR3036200A1 (fr
Inventor
Sebastien Mougel
Didier Masselin
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Soitec SA
Original Assignee
Soitec SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Soitec SA filed Critical Soitec SA
Priority to FR1554322A priority Critical patent/FR3036200B1/fr
Priority to JP2016096518A priority patent/JP6849319B2/ja
Priority to US15/153,509 priority patent/US9805969B2/en
Priority to CN201610320253.6A priority patent/CN106158623B/zh
Priority to KR1020160059098A priority patent/KR102536677B1/ko
Publication of FR3036200A1 publication Critical patent/FR3036200A1/fr
Application granted granted Critical
Publication of FR3036200B1 publication Critical patent/FR3036200B1/fr
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67242—Apparatus for monitoring, sorting or marking
    • H01L21/67248—Temperature monitoring
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67098—Apparatus for thermal treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
    • H01L21/67207—Apparatus for manufacturing or treating in a plurality of work-stations comprising a chamber adapted to a particular process
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10—Measuring as part of the manufacturing process
    • H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H10D86/021—Manufacture or treatment of multiple TFTs
    • H10D86/0214—Manufacture or treatment of multiple TFTs using temporary substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/201—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/421—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer
    • H10D86/425—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer having different crystal properties in different TFTs or within an individual TFT
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Formation Of Insulating Films (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
FR1554322A 2015-05-13 2015-05-13 Methode de calibration pour equipements de traitement thermique Active FR3036200B1 (fr)

Priority Applications (5)

Application Number Priority Date Filing Date Title
FR1554322A FR3036200B1 (fr) 2015-05-13 2015-05-13 Methode de calibration pour equipements de traitement thermique
JP2016096518A JP6849319B2 (ja) 2015-05-13 2016-05-12 熱処理ユニットのための較正方法
US15/153,509 US9805969B2 (en) 2015-05-13 2016-05-12 Calibration method for heat treatment units
CN201610320253.6A CN106158623B (zh) 2015-05-13 2016-05-13 用于热处理单元的校正方法
KR1020160059098A KR102536677B1 (ko) 2015-05-13 2016-05-13 열처리 유닛들을 위한 교정 방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR1554322A FR3036200B1 (fr) 2015-05-13 2015-05-13 Methode de calibration pour equipements de traitement thermique

Publications (2)

Publication Number Publication Date
FR3036200A1 FR3036200A1 (fr) 2016-11-18
FR3036200B1 true FR3036200B1 (fr) 2017-05-05

Family

ID=54329610

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1554322A Active FR3036200B1 (fr) 2015-05-13 2015-05-13 Methode de calibration pour equipements de traitement thermique

Country Status (5)

Country Link
US (1) US9805969B2 (fr)
JP (1) JP6849319B2 (fr)
KR (1) KR102536677B1 (fr)
CN (1) CN106158623B (fr)
FR (1) FR3036200B1 (fr)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6618336B2 (ja) * 2015-11-19 2019-12-11 株式会社Ｓｃｒｅｅｎホールディングス 基板の温度分布調整方法
CN107910280B (zh) * 2017-11-20 2020-01-21 上海华力微电子有限公司 一种建立全局调节模型进行优化快速热退火的方法
CN117751333A (zh) * 2021-09-17 2024-03-22 西门子股份公司 设定点曲线更新方法、系统及存储介质
DE102022130987A1 (de) * 2022-11-23 2024-05-23 Aixtron Se Verfahren zum Einrichten eines CVD-Reaktors
WO2024192097A1 (fr) * 2023-03-14 2024-09-19 Atomera Incorporated Procédé de fabrication d'une tranche de silicium sur isolant appliqué à la radiofréquence (rfsoi) comprenant un super-réseau
CN116845007A (zh) * 2023-07-14 2023-10-03 北京屹唐半导体科技股份有限公司 一种用于半导体工艺的温度控制方法

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5618461A (en) 1994-11-30 1997-04-08 Micron Technology, Inc. Reflectance method for accurate process calibration in semiconductor wafer heat treatment
FR2747506B1 (fr) * 1996-04-11 1998-05-15 Commissariat Energie Atomique Procede d'obtention d'un film mince de materiau semiconducteur comprenant notamment des composants electroniques
JP4232307B2 (ja) * 1999-03-23 2009-03-04 東京エレクトロン株式会社 バッチ式熱処理装置の運用方法
JP4847803B2 (ja) * 2000-09-29 2011-12-28 株式会社日立国際電気 温度制御方法、熱処理装置、及び半導体装置の製造方法
JP4149687B2 (ja) * 2001-07-19 2008-09-10 シャープ株式会社 熱処理方法
JP4285759B2 (ja) * 2003-07-28 2009-06-24 株式会社日立国際電気 基板処理装置及び基板処理方法
CN100576127C (zh) * 2004-12-27 2009-12-30 株式会社日立国际电气 温度调整方法、热处理设备以及半导体器件的制造方法
FR2888663B1 (fr) * 2005-07-13 2008-04-18 Soitec Silicon On Insulator Procede de diminution de la rugosite d'une couche epaisse d'isolant
US20070167029A1 (en) * 2005-11-11 2007-07-19 Kowalski Jeffrey M Thermal processing system, components, and methods
US7312422B2 (en) * 2006-03-17 2007-12-25 Momentive Performance Materials Inc. Semiconductor batch heating assembly
JP4786499B2 (ja) * 2006-10-26 2011-10-05 東京エレクトロン株式会社 熱処理板の温度設定方法、プログラム、プログラムを記録したコンピュータ読み取り可能な記録媒体及び熱処理板の温度設定装置
JP4796476B2 (ja) * 2006-11-07 2011-10-19 東京エレクトロン株式会社 熱処理板の温度設定方法、プログラム、プログラムを記録したコンピュータ読み取り可能な記録媒体及び熱処理板の温度設定装置
DE602006017906D1 (de) * 2006-12-26 2010-12-09 Soitec Silicon On Insulator Verfahren zum herstellen einer halbleiter-auf-isolator-struktur
FR2912258B1 (fr) * 2007-02-01 2009-05-08 Soitec Silicon On Insulator "procede de fabrication d'un substrat du type silicium sur isolant"
JP5274213B2 (ja) * 2008-11-14 2013-08-28 株式会社日立国際電気 基板処理装置および半導体装置の製造方法、温度制御方法
US20100130021A1 (en) * 2008-11-26 2010-05-27 Memc Electronic Materials, Inc. Method for processing a silicon-on-insulator structure
US20100240224A1 (en) * 2009-03-20 2010-09-23 Taiwan Semiconductor Manufactruing Co., Ltd. Multi-zone semiconductor furnace
US8888360B2 (en) * 2010-12-30 2014-11-18 Veeco Instruments Inc. Methods and systems for in-situ pyrometer calibration
JP5788355B2 (ja) * 2012-03-29 2015-09-30 東京エレクトロン株式会社 熱処理システム、熱処理方法、及び、プログラム
JP2014093471A (ja) * 2012-11-06 2014-05-19 Ulvac Japan Ltd 誘導加熱炉、ＳｉＣ基板のアニール方法
FR2998047B1 (fr) 2012-11-12 2015-10-02 Soitec Silicon On Insulator Procede de mesure des variations d'epaisseur d'une couche d'une structure semi-conductrice multicouche

Also Published As

Publication number Publication date
US9805969B2 (en) 2017-10-31
CN106158623B (zh) 2021-07-06
KR102536677B1 (ko) 2023-05-25
CN106158623A (zh) 2016-11-23
KR20160134581A (ko) 2016-11-23
JP2017034229A (ja) 2017-02-09
FR3036200A1 (fr) 2016-11-18
US20160336215A1 (en) 2016-11-17
JP6849319B2 (ja) 2021-03-24

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