FR2874455B1 - Traitement thermique avant collage de deux plaquettes - Google Patents
Traitement thermique avant collage de deux plaquettesInfo
- Publication number
- FR2874455B1 FR2874455B1 FR0408980A FR0408980A FR2874455B1 FR 2874455 B1 FR2874455 B1 FR 2874455B1 FR 0408980 A FR0408980 A FR 0408980A FR 0408980 A FR0408980 A FR 0408980A FR 2874455 B1 FR2874455 B1 FR 2874455B1
- Authority
- FR
- France
- Prior art keywords
- plates
- heat treatment
- treatment before
- before bonding
- bonding
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000010438 heat treatment Methods 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Recrystallisation Techniques (AREA)
- Element Separation (AREA)
Priority Applications (8)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FR0408980A FR2874455B1 (fr) | 2004-08-19 | 2004-08-19 | Traitement thermique avant collage de deux plaquettes |
| US11/020,057 US20060040470A1 (en) | 2004-08-19 | 2004-12-21 | Methods for minimizing defects when transferring a semiconductor useful layer |
| KR1020050068122A KR100769327B1 (ko) | 2004-08-19 | 2005-07-27 | 두 웨이퍼 결합에 선행되는 열처리 |
| EP05291636A EP1628339A1 (fr) | 2004-08-19 | 2005-08-01 | Traitement thermique préalable au collage de deux plaquettes |
| SG200504915A SG120244A1 (en) | 2004-08-19 | 2005-08-03 | Heat treatment prior to bonding two wafers |
| CNB2005100928139A CN100411094C (zh) | 2004-08-19 | 2005-08-18 | 在键合两个晶片之前的热处理 |
| JP2005238985A JP4855015B2 (ja) | 2004-08-19 | 2005-08-19 | 二枚のウエハを結合する前の熱処理 |
| US11/624,867 US7749862B2 (en) | 2002-05-02 | 2007-01-19 | Methods for minimizing defects when transferring a semiconductor useful layer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FR0408980A FR2874455B1 (fr) | 2004-08-19 | 2004-08-19 | Traitement thermique avant collage de deux plaquettes |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| FR2874455A1 FR2874455A1 (fr) | 2006-02-24 |
| FR2874455B1 true FR2874455B1 (fr) | 2008-02-08 |
Family
ID=34948972
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| FR0408980A Expired - Lifetime FR2874455B1 (fr) | 2002-05-02 | 2004-08-19 | Traitement thermique avant collage de deux plaquettes |
Country Status (7)
| Country | Link |
|---|---|
| US (2) | US20060040470A1 (fr) |
| EP (1) | EP1628339A1 (fr) |
| JP (1) | JP4855015B2 (fr) |
| KR (1) | KR100769327B1 (fr) |
| CN (1) | CN100411094C (fr) |
| FR (1) | FR2874455B1 (fr) |
| SG (1) | SG120244A1 (fr) |
Families Citing this family (33)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100738460B1 (ko) * | 2005-12-23 | 2007-07-11 | 주식회사 실트론 | 나노 에스오아이 웨이퍼의 제조방법 |
| FR2905801B1 (fr) * | 2006-09-12 | 2008-12-05 | Soitec Silicon On Insulator | Procede de transfert d'une couche a haute temperature |
| FR2910177B1 (fr) * | 2006-12-18 | 2009-04-03 | Soitec Silicon On Insulator | Couche tres fine enterree |
| FR2914495B1 (fr) * | 2007-03-29 | 2009-10-02 | Soitec Silicon On Insulator | Amelioration de la qualite d'une couche mince par recuit thermique haute temperature. |
| FR2926671B1 (fr) * | 2008-01-17 | 2010-04-02 | Soitec Silicon On Insulator | Procede de traitement de defauts lors de collage de plaques |
| FR2935536B1 (fr) * | 2008-09-02 | 2010-09-24 | Soitec Silicon On Insulator | Procede de detourage progressif |
| JP5493343B2 (ja) * | 2008-12-04 | 2014-05-14 | 信越半導体株式会社 | 貼り合わせウェーハの製造方法 |
| EP2200077B1 (fr) * | 2008-12-22 | 2012-12-05 | Soitec | Procédé pour la liaison de deux substrats |
| US7927975B2 (en) * | 2009-02-04 | 2011-04-19 | Micron Technology, Inc. | Semiconductor material manufacture |
| US9847243B2 (en) | 2009-08-27 | 2017-12-19 | Corning Incorporated | Debonding a glass substrate from carrier using ultrasonic wave |
| FR2961630B1 (fr) | 2010-06-22 | 2013-03-29 | Soitec Silicon On Insulator Technologies | Appareil de fabrication de dispositifs semi-conducteurs |
| US8338266B2 (en) | 2010-08-11 | 2012-12-25 | Soitec | Method for molecular adhesion bonding at low pressure |
| FR2964193A1 (fr) | 2010-08-24 | 2012-03-02 | Soitec Silicon On Insulator | Procede de mesure d'une energie d'adhesion, et substrats associes |
| FR2968121B1 (fr) | 2010-11-30 | 2012-12-21 | Soitec Silicon On Insulator | Procede de transfert d'une couche a haute temperature |
| US10543662B2 (en) | 2012-02-08 | 2020-01-28 | Corning Incorporated | Device modified substrate article and methods for making |
| US9340443B2 (en) | 2012-12-13 | 2016-05-17 | Corning Incorporated | Bulk annealing of glass sheets |
| US10014177B2 (en) | 2012-12-13 | 2018-07-03 | Corning Incorporated | Methods for processing electronic devices |
| TWI617437B (zh) | 2012-12-13 | 2018-03-11 | 康寧公司 | 促進控制薄片與載體間接合之處理 |
| US10086584B2 (en) | 2012-12-13 | 2018-10-02 | Corning Incorporated | Glass articles and methods for controlled bonding of glass sheets with carriers |
| JP6056516B2 (ja) * | 2013-02-01 | 2017-01-11 | 信越半導体株式会社 | Ｓｏｉウェーハの製造方法及びｓｏｉウェーハ |
| US10510576B2 (en) | 2013-10-14 | 2019-12-17 | Corning Incorporated | Carrier-bonding methods and articles for semiconductor and interposer processing |
| KR102353030B1 (ko) | 2014-01-27 | 2022-01-19 | 코닝 인코포레이티드 | 얇은 시트와 캐리어의 제어된 결합을 위한 물품 및 방법 |
| EP3129221A1 (fr) | 2014-04-09 | 2017-02-15 | Corning Incorporated | Article de substrat modifié de dispositif et procédés de fabrication |
| KR102573207B1 (ko) | 2015-05-19 | 2023-08-31 | 코닝 인코포레이티드 | 시트와 캐리어의 결합을 위한 물품 및 방법 |
| JP7106276B2 (ja) | 2015-06-26 | 2022-07-26 | コーニング インコーポレイテッド | シート及び担体を有する物品及び方法 |
| TW201825623A (zh) | 2016-08-30 | 2018-07-16 | 美商康寧公司 | 用於片材接合的矽氧烷電漿聚合物 |
| TWI821867B (zh) | 2016-08-31 | 2023-11-11 | 美商康寧公司 | 具以可控制式黏結的薄片之製品及製作其之方法 |
| CN106711027B (zh) * | 2017-02-13 | 2021-01-05 | 中国科学院上海微系统与信息技术研究所 | 晶圆键合方法及异质衬底制备方法 |
| KR102659516B1 (ko) | 2017-08-18 | 2024-04-23 | 코닝 인코포레이티드 | 유리 적층체 |
| WO2019118660A1 (fr) | 2017-12-15 | 2019-06-20 | Corning Incorporated | Procédés de traitement d'un substrat et procédé de fabrication d'articles à base de feuilles liées |
| CN109216223A (zh) * | 2018-09-03 | 2019-01-15 | 德淮半导体有限公司 | 晶圆键合能检测装置以及晶圆键合能的测量方法 |
| CN112951713A (zh) * | 2021-02-07 | 2021-06-11 | 长春长光圆辰微电子技术有限公司 | 一种小尺寸晶圆的加工方法 |
| CN113782462B (zh) * | 2021-08-23 | 2024-06-07 | 芯盟科技有限公司 | 晶圆键合强度的测量方法及设备 |
Family Cites Families (26)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2681472B1 (fr) * | 1991-09-18 | 1993-10-29 | Commissariat Energie Atomique | Procede de fabrication de films minces de materiau semiconducteur. |
| DE69619251T2 (de) * | 1995-09-04 | 2002-10-02 | Nakasu Denki K.K., Seki | Teil und instrument um konduktivität bei einer elektrischen verbindung zu erreichen |
| US6150239A (en) * | 1997-05-31 | 2000-11-21 | Max Planck Society | Method for the transfer of thin layers monocrystalline material onto a desirable substrate |
| FR2767416B1 (fr) * | 1997-08-12 | 1999-10-01 | Commissariat Energie Atomique | Procede de fabrication d'un film mince de materiau solide |
| JPH11145438A (ja) * | 1997-11-13 | 1999-05-28 | Shin Etsu Handotai Co Ltd | Ｓｏｉウエーハの製造方法ならびにこの方法で製造されるｓｏｉウエーハ |
| US6171982B1 (en) * | 1997-12-26 | 2001-01-09 | Canon Kabushiki Kaisha | Method and apparatus for heat-treating an SOI substrate and method of preparing an SOI substrate by using the same |
| US6540827B1 (en) * | 1998-02-17 | 2003-04-01 | Trustees Of Columbia University In The City Of New York | Slicing of single-crystal films using ion implantation |
| JPH11307747A (ja) * | 1998-04-17 | 1999-11-05 | Nec Corp | Ｓｏｉ基板およびその製造方法 |
| JPH11307472A (ja) | 1998-04-23 | 1999-11-05 | Shin Etsu Handotai Co Ltd | 水素イオン剥離法によってｓｏｉウエーハを製造する方法およびこの方法で製造されたｓｏｉウエーハ |
| JP3385972B2 (ja) * | 1998-07-10 | 2003-03-10 | 信越半導体株式会社 | 貼り合わせウェーハの製造方法および貼り合わせウェーハ |
| JP3921823B2 (ja) * | 1998-07-15 | 2007-05-30 | 信越半導体株式会社 | Ｓｏｉウェーハの製造方法およびｓｏｉウェーハ |
| JP4476390B2 (ja) * | 1998-09-04 | 2010-06-09 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
| JP3911901B2 (ja) * | 1999-04-09 | 2007-05-09 | 信越半導体株式会社 | Ｓｏｉウエーハおよびｓｏｉウエーハの製造方法 |
| US6287941B1 (en) * | 1999-04-21 | 2001-09-11 | Silicon Genesis Corporation | Surface finishing of SOI substrates using an EPI process |
| US6881644B2 (en) * | 1999-04-21 | 2005-04-19 | Silicon Genesis Corporation | Smoothing method for cleaved films made using a release layer |
| WO2001006546A2 (fr) * | 1999-07-16 | 2001-01-25 | Massachusetts Institute Of Technology | Liaison silicium iii-v d'un semiconducteur destinee a une integration monolithique optoelectronique |
| US6368938B1 (en) * | 1999-10-05 | 2002-04-09 | Silicon Wafer Technologies, Inc. | Process for manufacturing a silicon-on-insulator substrate and semiconductor devices on said substrate |
| JP2002076336A (ja) * | 2000-09-01 | 2002-03-15 | Mitsubishi Electric Corp | 半導体装置およびｓｏｉ基板 |
| KR100393208B1 (ko) * | 2001-01-15 | 2003-07-31 | 삼성전자주식회사 | 도핑된 다결정 실리콘-저매니움막을 이용한 반도체 소자및 그 제조방법 |
| KR100401655B1 (ko) * | 2001-01-18 | 2003-10-17 | 주식회사 컴텍스 | ALE를 이용한 알루미나(Al₂O₃) 유전체 층 형성에 의한 스마트 공정을 이용한 유니본드형 SOI 웨이퍼의 제조방법 |
| FR2821697B1 (fr) * | 2001-03-02 | 2004-06-25 | Commissariat Energie Atomique | Procede de fabrication de couches minces sur un support specifique et une application |
| FR2835097B1 (fr) * | 2002-01-23 | 2005-10-14 | Procede optimise de report d'une couche mince de carbure de silicium sur un substrat d'accueil | |
| US7202139B2 (en) * | 2002-02-07 | 2007-04-10 | Taiwan Semiconductor Manufacturing Company , Ltd. | MOSFET device with a strained channel |
| FR2839385B1 (fr) * | 2002-05-02 | 2004-07-23 | Soitec Silicon On Insulator | Procede de decollement de couches de materiau |
| EP1429381B1 (fr) * | 2002-12-10 | 2011-07-06 | S.O.I.Tec Silicon on Insulator Technologies | Procédé de fabrication d'un matériau composé |
| US6812116B2 (en) * | 2002-12-13 | 2004-11-02 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of fabricating a wafer with strained channel layers for increased electron and hole mobility for improving device performance |
-
2004
- 2004-08-19 FR FR0408980A patent/FR2874455B1/fr not_active Expired - Lifetime
- 2004-12-21 US US11/020,057 patent/US20060040470A1/en not_active Abandoned
-
2005
- 2005-07-27 KR KR1020050068122A patent/KR100769327B1/ko not_active Expired - Lifetime
- 2005-08-01 EP EP05291636A patent/EP1628339A1/fr not_active Withdrawn
- 2005-08-03 SG SG200504915A patent/SG120244A1/en unknown
- 2005-08-18 CN CNB2005100928139A patent/CN100411094C/zh not_active Expired - Lifetime
- 2005-08-19 JP JP2005238985A patent/JP4855015B2/ja not_active Expired - Lifetime
-
2007
- 2007-01-19 US US11/624,867 patent/US7749862B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| EP1628339A1 (fr) | 2006-02-22 |
| CN1737994A (zh) | 2006-02-22 |
| US20070117229A1 (en) | 2007-05-24 |
| CN100411094C (zh) | 2008-08-13 |
| JP4855015B2 (ja) | 2012-01-18 |
| KR100769327B1 (ko) | 2007-10-24 |
| SG120244A1 (en) | 2006-03-28 |
| JP2006074034A (ja) | 2006-03-16 |
| FR2874455A1 (fr) | 2006-02-24 |
| US7749862B2 (en) | 2010-07-06 |
| KR20060048784A (ko) | 2006-05-18 |
| US20060040470A1 (en) | 2006-02-23 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| CD | Change of name or company name |
Owner name: SOITEC, FR Effective date: 20120423 |
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Year of fee payment: 13 |
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