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FR2869720B1 - Tranche soi et procede pour sa preparation. - Google Patents

Tranche soi et procede pour sa preparation.

Info

Publication number
FR2869720B1
FR2869720B1 FR0504225A FR0504225A FR2869720B1 FR 2869720 B1 FR2869720 B1 FR 2869720B1 FR 0504225 A FR0504225 A FR 0504225A FR 0504225 A FR0504225 A FR 0504225A FR 2869720 B1 FR2869720 B1 FR 2869720B1
Authority
FR
France
Prior art keywords
trench
self
preparing same
preparing
same
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR0504225A
Other languages
English (en)
Other versions
FR2869720A1 (fr
Inventor
Dieter Graf
Markus Blietz
Reinhold Wahlich
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siltronic AG
Original Assignee
Siltronic AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siltronic AG filed Critical Siltronic AG
Publication of FR2869720A1 publication Critical patent/FR2869720A1/fr
Application granted granted Critical
Publication of FR2869720B1 publication Critical patent/FR2869720B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B15/00Single-crystal growth by pulling from a melt, e.g. Czochralski method
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B15/00Single-crystal growth by pulling from a melt, e.g. Czochralski method
    • C30B15/20Controlling or regulating
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/02Elements
    • C30B29/06Silicon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
    • H01L21/3226Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering of silicon on insulator

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Organic Chemistry (AREA)
  • Metallurgy (AREA)
  • Materials Engineering (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Recrystallisation Techniques (AREA)
FR0504225A 2004-04-29 2005-04-27 Tranche soi et procede pour sa preparation. Expired - Fee Related FR2869720B1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE102004021113A DE102004021113B4 (de) 2004-04-29 2004-04-29 SOI-Scheibe und Verfahren zu ihrer Herstellung

Publications (2)

Publication Number Publication Date
FR2869720A1 FR2869720A1 (fr) 2005-11-04
FR2869720B1 true FR2869720B1 (fr) 2006-08-25

Family

ID=35169514

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0504225A Expired - Fee Related FR2869720B1 (fr) 2004-04-29 2005-04-27 Tranche soi et procede pour sa preparation.

Country Status (7)

Country Link
US (2) US7394129B2 (fr)
JP (1) JP2005317973A (fr)
KR (1) KR20060043458A (fr)
CN (1) CN100379006C (fr)
DE (1) DE102004021113B4 (fr)
FR (1) FR2869720B1 (fr)
TW (1) TWI273644B (fr)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4715470B2 (ja) * 2005-11-28 2011-07-06 株式会社Sumco 剥離ウェーハの再生加工方法及びこの方法により再生加工された剥離ウェーハ
EP2012346B1 (fr) * 2006-04-27 2016-05-11 Shin-Etsu Handotai Co., Ltd. Procédé de fabrication d'une plaquette soi
DE102006053942A1 (de) * 2006-11-15 2008-05-21 Siltronic Ag Verfahren zum Regenerieren einer Donor-Halbleiterscheibe und nach dem Verfahren herstellbare Donor-Halbleiterscheibe
JP2008263087A (ja) * 2007-04-12 2008-10-30 Shin Etsu Chem Co Ltd Soi基板の製造方法
JP5499455B2 (ja) * 2007-10-22 2014-05-21 株式会社デンソー SOI(Silicononinsulator)構造の半導体装置およびその製造方法
WO2011027670A1 (fr) * 2009-09-07 2011-03-10 国立大学法人 新潟大学 Procédé permettant d'évaluer de façon quantitative la concentration de lacunes atomiques présentes dans une plaquette de silicium, procédé de fabrication d'une plaquette de silicium et plaquette de silicium fabriquée au moyen dudit procédé de fabrication d'une plaquette de silicium
FR2986106B1 (fr) * 2012-01-20 2014-08-22 Soitec Silicon On Insulator Procede de fabrication de substrats semi-conducteur, et substrats semi-conducteur
US10141413B2 (en) 2013-03-13 2018-11-27 Taiwan Semiconductor Manufacturing Co., Ltd. Wafer strength by control of uniformity of edge bulk micro defects
US9064823B2 (en) * 2013-03-13 2015-06-23 Taiwan Semiconductor Manufacturing Co., Ltd. Method for qualifying a semiconductor wafer for subsequent processing
US10943813B2 (en) 2018-07-13 2021-03-09 Globalwafers Co., Ltd. Radio frequency silicon on insulator wafer platform with superior performance, stability, and manufacturability

Family Cites Families (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2752799B2 (ja) * 1991-03-27 1998-05-18 三菱マテリアル株式会社 Soi基板の製造方法
FR2681472B1 (fr) 1991-09-18 1993-10-29 Commissariat Energie Atomique Procede de fabrication de films minces de materiau semiconducteur.
DE4414947C2 (de) * 1993-12-16 1998-12-17 Wacker Siltronic Halbleitermat Verfahren zum Ziehen eines Einkristalls aus Silicium
IT1280041B1 (it) 1993-12-16 1997-12-29 Wacker Chemitronic Procedimento per il tiraggio di un monocristallo di silicio
SG64470A1 (en) * 1997-02-13 1999-04-27 Samsung Electronics Co Ltd Methods of manufacturing monocrystalline silicon ingots and wafers by controlling pull rate profiles in a hot zone furnace and ingots and wafers manufactured thereby
US6045610A (en) 1997-02-13 2000-04-04 Samsung Electronics Co., Ltd. Methods of manufacturing monocrystalline silicon ingots and wafers by controlling pull rate profiles in a hot zone furnance
US5982018A (en) * 1997-05-23 1999-11-09 Micron Technology, Inc. Thin film capacitor coupons for memory modules and multi-chip modules
FR2773261B1 (fr) 1997-12-30 2000-01-28 Commissariat Energie Atomique Procede pour le transfert d'un film mince comportant une etape de creation d'inclusions
JPH11307747A (ja) 1998-04-17 1999-11-05 Nec Corp Soi基板およびその製造方法
US6224668B1 (en) 1998-06-02 2001-05-01 Shin-Etsu Handotai Co., Ltd. Method for producing SOI substrate and SOI substrate
WO2000013211A2 (fr) * 1998-09-02 2000-03-09 Memc Electronic Materials, Inc. Structure silicium sur isolant obtenue a partir d'un silicium monocristallin a faible taux de defauts
KR100331552B1 (ko) 1999-05-26 2002-04-06 윤종용 잉곳-용융물 경계의 중앙 및 가장자리에서의 온도구배의 조절에 의한 단결정 실리콘 잉곳의 제조를 위한 초크랄스키 풀러, 상기 초크랄스키 풀러용 열차단체 및 상기 초크랄스키 풀러의 개량방법.
JP2001044398A (ja) 1999-07-30 2001-02-16 Mitsubishi Materials Silicon Corp 張り合わせ基板およびその製造方法
KR20010016973A (ko) 1999-08-06 2001-03-05 윤종용 퍼펙트 풀리 디플레션 스마트컷 웨이퍼의 제조방법
JP2001144275A (ja) * 1999-08-27 2001-05-25 Shin Etsu Handotai Co Ltd 貼り合わせsoiウエーハの製造方法および貼り合わせsoiウエーハ
JP3994602B2 (ja) 1999-11-12 2007-10-24 信越半導体株式会社 シリコン単結晶ウエーハおよびその製造方法並びにsoiウエーハ
US6352909B1 (en) 2000-01-06 2002-03-05 Silicon Wafer Technologies, Inc. Process for lift-off of a layer from a substrate
WO2001067510A1 (fr) * 2000-03-10 2001-09-13 Nippon Steel Corporation Substrat simox et procede de production dudit substrat
AU6004101A (en) * 2000-04-24 2001-11-07 Beijing Normal University Method for fabricating silicon-on-insulator
US6663708B1 (en) * 2000-09-22 2003-12-16 Mitsubishi Materials Silicon Corporation Silicon wafer, and manufacturing method and heat treatment method of the same
KR100381797B1 (ko) 2000-09-25 2003-05-01 손원근 오폐수와 벙커 씨유를 이용한 에멀젼 연료유의 제조장치
DE10131249A1 (de) 2001-06-28 2002-05-23 Wacker Siltronic Halbleitermat Verfahren zur Herstellung eines Films oder einer Schicht aus halbleitendem Material
KR100445190B1 (ko) 2001-11-13 2004-08-21 주식회사 실트론 단결정 실리콘 잉곳 제조 방법
US6911380B2 (en) 2002-07-22 2005-06-28 Intel Corporation Method of forming silicon on insulator wafers
US6800518B2 (en) * 2002-12-30 2004-10-05 International Business Machines Corporation Formation of patterned silicon-on-insulator (SOI)/silicon-on-nothing (SON) composite structure by porous Si engineering

Also Published As

Publication number Publication date
DE102004021113A1 (de) 2005-11-24
JP2005317973A (ja) 2005-11-10
US7394129B2 (en) 2008-07-01
US20050245048A1 (en) 2005-11-03
CN1694258A (zh) 2005-11-09
US20080153259A1 (en) 2008-06-26
TWI273644B (en) 2007-02-11
TW200535996A (en) 2005-11-01
US8323403B2 (en) 2012-12-04
FR2869720A1 (fr) 2005-11-04
DE102004021113B4 (de) 2006-04-20
CN100379006C (zh) 2008-04-02
KR20060043458A (ko) 2006-05-15

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