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FI20070904A7 - Menetelmä piirilevyjen valmistuksessa - Google Patents

Menetelmä piirilevyjen valmistuksessa Download PDF

Info

Publication number
FI20070904A7
FI20070904A7 FI20070904A FI20070904A FI20070904A7 FI 20070904 A7 FI20070904 A7 FI 20070904A7 FI 20070904 A FI20070904 A FI 20070904A FI 20070904 A FI20070904 A FI 20070904A FI 20070904 A7 FI20070904 A7 FI 20070904A7
Authority
FI
Finland
Prior art keywords
printed circuit
circuit boards
manufacture
board
conductive
Prior art date
Application number
FI20070904A
Other languages
English (en)
Swedish (sv)
Other versions
FI20070904A0 (fi
Inventor
Rauno Holappa
Rauno Salminen
Original Assignee
Finnish Environment Tech Oy
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from FI20070453A external-priority patent/FI20070453A0/fi
Application filed by Finnish Environment Tech Oy filed Critical Finnish Environment Tech Oy
Priority to FI20070904A priority Critical patent/FI20070904A7/fi
Publication of FI20070904A0 publication Critical patent/FI20070904A0/fi
Priority to CA2690198A priority patent/CA2690198A1/en
Priority to CN200880019046.0A priority patent/CN101711488A/zh
Priority to BRPI0812579-1A2A priority patent/BRPI0812579A2/pt
Priority to KR1020107000203A priority patent/KR20100018041A/ko
Priority to JP2010510837A priority patent/JP2010529667A/ja
Priority to US12/601,142 priority patent/US20100146781A1/en
Priority to PCT/FI2008/050312 priority patent/WO2008152193A1/en
Priority to RU2009147684/07A priority patent/RU2009147684A/ru
Priority to EP08761708A priority patent/EP2151150A4/en
Priority to AU2008263848A priority patent/AU2008263848A1/en
Publication of FI20070904A7 publication Critical patent/FI20070904A7/fi

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/102—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by bonding of conductive powder, i.e. metallic powder
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4053—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4053—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
    • H05K3/4069—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in organic insulating substrates
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/10—Using electric, magnetic and electromagnetic fields; Using laser light
    • H05K2203/107—Using laser light
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/11—Treatments characterised by their effect, e.g. heating, cooling, roughening
    • H05K2203/1131—Sintering, i.e. fusing of metal particles to achieve or improve electrical conductivity
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y10T29/49163—Manufacturing circuit on or in base with sintering of base
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y10T29/49165—Manufacturing circuit on or in base by forming conductive walled aperture in base

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)

Abstract

Menetelmä piirilevyjen, erityisesti ainakin kahdella eristekerroksen erottamalla johtavalla pinnalla varustetun ja rei'itetyn piirilevyn johtavien pintojen yhdistämiseksi tai johtimien muodostamiseksi levylle sähköä johtavalla tavalla. Menetelmässä syötetään reikiin tai levylle metallia tai metalliseosta jauhemuodossa ja sintrataan jauhe laseria käyttäen yhtenäisen johtavan rakenteen aikaansaamiseksi.&sr;(Fig.1)
FI20070904A 2007-06-07 2007-11-26 Menetelmä piirilevyjen valmistuksessa FI20070904A7 (fi)

Priority Applications (11)

Application Number Priority Date Filing Date Title
FI20070904A FI20070904A7 (fi) 2007-06-07 2007-11-26 Menetelmä piirilevyjen valmistuksessa
AU2008263848A AU2008263848A1 (en) 2007-06-07 2008-05-29 Method in manufacturing of circuit boards
EP08761708A EP2151150A4 (en) 2007-06-07 2008-05-29 METHOD FOR MANUFACTURING PRINTED CIRCUIT BOARDS
BRPI0812579-1A2A BRPI0812579A2 (pt) 2007-06-07 2008-05-29 Método de fabricação de placas de circuito
CN200880019046.0A CN101711488A (zh) 2007-06-07 2008-05-29 电路板的制造方法
CA2690198A CA2690198A1 (en) 2007-06-07 2008-05-29 Method in manufacturing of circuit boards
KR1020107000203A KR20100018041A (ko) 2007-06-07 2008-05-29 회로 기판들의 제조 방법
JP2010510837A JP2010529667A (ja) 2007-06-07 2008-05-29 回路基板の製造方法
US12/601,142 US20100146781A1 (en) 2007-06-07 2008-05-29 Method in manufacturing of circuit boards
PCT/FI2008/050312 WO2008152193A1 (en) 2007-06-07 2008-05-29 Method in manufacturing of circuit boards
RU2009147684/07A RU2009147684A (ru) 2007-06-07 2008-05-29 Способ изготовления печатных плат

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FI20070453A FI20070453A0 (fi) 2007-06-07 2007-06-07 Menetelmä piirilevyjen valmistuksessa
FI20070904A FI20070904A7 (fi) 2007-06-07 2007-11-26 Menetelmä piirilevyjen valmistuksessa

Publications (2)

Publication Number Publication Date
FI20070904A0 FI20070904A0 (fi) 2007-11-26
FI20070904A7 true FI20070904A7 (fi) 2009-03-30

Family

ID=38786682

Family Applications (1)

Application Number Title Priority Date Filing Date
FI20070904A FI20070904A7 (fi) 2007-06-07 2007-11-26 Menetelmä piirilevyjen valmistuksessa

Country Status (11)

Country Link
US (1) US20100146781A1 (fi)
EP (1) EP2151150A4 (fi)
JP (1) JP2010529667A (fi)
KR (1) KR20100018041A (fi)
CN (1) CN101711488A (fi)
AU (1) AU2008263848A1 (fi)
BR (1) BRPI0812579A2 (fi)
CA (1) CA2690198A1 (fi)
FI (1) FI20070904A7 (fi)
RU (1) RU2009147684A (fi)
WO (1) WO2008152193A1 (fi)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI613177B (zh) * 2011-11-16 2018-02-01 製陶技術股份有限公司 製造一基材的方法
CN103440074A (zh) * 2013-07-18 2013-12-11 苏州触动电子科技有限公司 一种投射式电容触控屏制作工艺
US9456507B2 (en) * 2013-10-07 2016-09-27 The Boeing Company Ecological method for constructing circuit boards
JP2016039171A (ja) * 2014-08-05 2016-03-22 株式会社秀峰 導電配線の製造方法および導電配線
CN105393650B (zh) 2014-03-28 2018-04-10 株式会社秀峰 导电布线的制造方法以及导电布线
JP2015195329A (ja) * 2014-03-28 2015-11-05 株式会社秀峰 導電配線の製造方法および導電配線
DE102014116275A1 (de) * 2014-11-07 2016-05-12 Webasto SE Verfahren zur Herstellung eines Kontaktbereichs für eine Schicht eines elektrischen Heizgeräts sowie Vorrichtung für ein elektrisches Heizgerät für ein Kraftfahrzeug
JP6441954B2 (ja) * 2014-11-07 2018-12-19 株式会社Ｆｕｊｉ 配線形成方法
US20180264722A1 (en) * 2015-04-14 2018-09-20 Hewlett-Packard Development Company, L.P. Marking build material
CN108735315B (zh) * 2018-06-04 2024-05-14 江苏核电有限公司 一种vver乏燃料组件贮存栅元及制造方法
DE102021107711A1 (de) 2021-03-26 2022-09-29 Gottfried Wilhelm Leibniz Universität Hannover, Körperschaft des öffentlichen Rechts Elektrisches Bauteil und Verfahren zu dessen Herstellung

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5922385B2 (ja) * 1980-04-25 1984-05-26 日産自動車株式会社 セラミツク基板のスル−ホ−ル充填用導電体ペ−スト
WO1985001415A1 (en) * 1983-09-21 1985-03-28 Allied Corporation Method of making a printed circuit board
US4929370A (en) * 1986-10-14 1990-05-29 Lubra Sheet Corporation Dry lubricant drilling of thru-holes in printed circuit boards
US4781495A (en) * 1986-10-14 1988-11-01 Lubra Sheet Corp. Dry lubricant drilling of thru-holes in printed circuit boards
US5296062A (en) * 1986-10-17 1994-03-22 The Board Of Regents, The University Of Texas System Multiple material systems for selective beam sintering
US5011725A (en) * 1987-05-22 1991-04-30 Ceramics Process Systems Corp. Substrates with dense metal vias produced as co-sintered and porous back-filled vias
US5176772A (en) * 1989-10-05 1993-01-05 Asahi Glass Company Ltd. Process for fabricating a multilayer ceramic circuit board
US5229549A (en) * 1989-11-13 1993-07-20 Sumitomo Electric Industries, Ltd. Ceramic circuit board and a method of manufacturing the ceramic circuit board
US5011655A (en) * 1989-12-22 1991-04-30 Inco Alloys International, Inc. Process of forming a composite structure
US5724727A (en) * 1996-08-12 1998-03-10 Motorola, Inc. Method of forming electronic component
TW369672B (en) * 1997-07-28 1999-09-11 Hitachi Ltd Wiring board and its manufacturing process, and electrolysis-free electroplating method
TW512653B (en) * 1999-11-26 2002-12-01 Ibiden Co Ltd Multilayer circuit board and semiconductor device
JP4030285B2 (ja) * 2001-10-10 2008-01-09 株式会社トクヤマ 基板及びその製造方法
US20060044083A1 (en) * 2004-08-27 2006-03-02 Maksim Kuzmenka Circuit board and method for producing a circuit board
US7342183B2 (en) * 2005-07-11 2008-03-11 Endicott Interconnect Technologies, Inc. Circuitized substrate with sintered paste connections, multilayered substrate assembly, electrical assembly and information handling system utilizing same

Also Published As

Publication number Publication date
KR20100018041A (ko) 2010-02-16
RU2009147684A (ru) 2011-07-20
JP2010529667A (ja) 2010-08-26
BRPI0812579A2 (pt) 2015-02-18
US20100146781A1 (en) 2010-06-17
EP2151150A1 (en) 2010-02-10
CA2690198A1 (en) 2008-12-18
AU2008263848A1 (en) 2008-12-18
CN101711488A (zh) 2010-05-19
FI20070904A0 (fi) 2007-11-26
EP2151150A4 (en) 2011-07-06
WO2008152193A1 (en) 2008-12-18

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Owner name: FINNISH ENVIRONMENT TECHNOLOGY OY

Free format text: FINNISH ENVIRONMENT TECHNOLOGY OY