FI125801B

FI125801B - Checking a semiconductor coupler

Info

Publication number: FI125801B
Application number: FI20145130A
Authority: FI
Inventors: Juha Norrena; Tuomas Yli-Rahnasto; Pasi Voltti
Original assignee: Vacon Oy
Priority date: 2014-02-11
Filing date: 2014-02-11
Publication date: 2016-02-29
Also published as: FI20145130A7

Description

CONTROL OF A SEMICONDUCTOR SWITCH

Technical field

The present invention relates to a method and arrangement for controlling a power semiconductor switch in a power electronic device. More particularly, the invention is related to optimizing the switching speed and power losses of a power semiconductor switch in a frequency converter.

Background and prior art technology A fundamental objective of the control system of a power electronic device, is to keep the output current under control so that the current continuously stays within specified limits which are appropriate e.g. from the power components stress point of view.

Insulated gate bipolar transistors (IGBT) are switch-type power electronic components which are widely used in the main circuits of power electronic devices, like in frequency converters. IGBT is a gate controlled component, which means that it can be switched on/off by a voltage signal supplied to the gate terminal. IGBT is an ideal component for power electronic applications due to a fast response time to the gate control signal, thus making it possible to keep the load current under precise control.

In the following, IGBT is used as an example of the power semiconductor switch, but as is clear for a person skilled in the art, there exist another type of power semiconductor components, too, whereto the present invention can be applied.

It is well known that fast voltage slopes, caused by fast switching phenomena of IGBTs, may cause emitted EMC-problems to the environment. In motor drives, the high voltage slope may increase the current through bearings and increase the stress of insulations, thus shortening the useful lifetime of the motor. The switching speed, and thus also the severity of EMC-level, can be affected by the resistor used in the gate control circuit of the IGBT; the higher the resistor value, the slower the switching speed and the lower the EMC emission level. On the other hand, the lower switching speed increases the dissipated power inside IGBT. Thus the gate resistor value selection can be seen as a compromise between the switching power dissipation and the generated EMC noise, negative motor effects etc.

The patent publication US 8,558,491 B2 presents a solution, wherein the gate resistor value is changed according to the operating state of an inverter. The operating state is determined from the measured DC-bus voltage and measured output current of one output phase, and the gate resistors of all IGBT switches are changed simultaneously.

Summary of the invention

The object of the present invention is to provide a novel method and arrangement for turning on a power semiconductor switch, e.g. IGBT, in a power electronics device so that both the generated EMC noise and the internal switching energy losses are minimized. The objective is achieved by what is stated in the independent claims. Other preferred embodiments are disclosed in the dependent claims.

In the arrangement according to the invention, at least two different gate resistor values can be selected into use when turning on an IGBT switch. The resistor selection is preferably done by using gate controlled switches like MOSFETs.

According to an embodiment of the invention, only the lower ohmic gate resistor value is selected when the instantaneous value of IGBT load current is above a predetermined limit.

According to an embodiment of the invention, only the higher ohmic gate resistor value is selected when the instantaneous value of IGBT load current is below a predetermined limit.

According to an embodiment of the invention, the gate resistor selection is alternated between at least two gate resistor values when the instantaneous value of IGBT load current is within a predetermined band.

The present invention is beneficial over the prior art technology in that the gate resistor selection is made individually according to the load current of each IGBT. By this way the trade-off between the power losses in the power electronic device and EMC emission from it can be optimized.

The invention is defined in more detail in the present description and the following examples of embodiment. The scope of protection is defined in the independent claims and the preferred embodiments in other claims.

Brief description of the figures

Below the invention appears a more detailed explanation using examples with references to the enclosed figures, wherein

Fig. 1 presents a main circuit of a frequency converter,

Fig. 2 presents a gate control arrangement of an IGBT switch,

Fig. 3 illustrates IGBT on-state voltages,

Fig. 4 illustrates a turn-on situation of an IGBT switch,

Fig. 5 illustrates mutual dependences of gate resistors, switching speed and switching energy of an IGBT,

Figs 6A and 6B present IGBT examples of turn-on control arrangements according to the present invention,

Fig. 7 illustrates characteristic waveforms of the switching speed and switching energy of an IGBT, according to one embodiment of the present invention, and

Fig. 8 illustrates an IGBT turn-on control method according to one embodiment of the present invention.

Detailed description of the preferred embodiments

Fig. 1 presents a main diagram of a known and typical variable speed motor drive, wherein a frequency converter FC is used to control the speed of an AC motor, e.g. an asynchronous motor M. The frequency converter FC in this example contains a diode-bridge rectifier REC, rectifying the three-phase supply voltage L-ι, L2, L3 into a constant DC-link voltage Udc which is smoothed by a capacitor Cdc, a three-phase inverter unit INU, consisting of IGBT-switches Vi...V6 with antiparallel free-wheeling diodes Di...D6, and a control unit CU. An inductive component is normally used in either side of the rectifier, in order to filter the harmonics of the supply phase current, but as an irrelevant component from the present invention point of view it has been left out from the figure. The basic function of the inverter is to create a three-phase adjustable output voltage U, V, W for the motor M. Means for measuring the output phase currents are normally included in the inverter unit (not drawn).

Fig. 2 presents one phase switch of the inverter unit, consisting of upper arm power components V-i, D-ι, and lower arm power components V4, D4. The phase switch is able to connect either the positive pole or the negative pole of the DC-link voltage Udc to the output phase terminal U, regardless of the output phase current iu direction.

The figure also presents some details of an IGBT and its typical control arrangements by the lower arm IGBT V4. CGc is an internal, so-called Miller capacitance, which has an essential effect on the IGBT switching process as described below. +Ug4 and -Ug4 are control voltages, filtered by capacitors C1 and C2 and having magnitudes normally about +15 V and -15V in respect to the IGBT emitter E terminal potential. IGBT is turned on (into conductive state between C and E terminals) by a turn-on arrangement, consisting of a control switch Sgon which connects the IGBT gate terminal G to the positive control voltage +Ug4 via the resistor Rgon- Respectively, IGBT is turned off by the control switch Sgoff, which connects the IGBT gate terminal to the negative control voltage -Ug4 via the resistor Rgoff-

The threshold gate voltage limit for turning an IGBT on is normally a few volts, e.g. about 6 V. In order to ensure a safe turn-off state the gate is normally connected to a negative control voltage as presented in fig. 2. Above the threshold voltage the IGBT works in a so-called linear operation area, where the conducted current ic is proportional to the gate voltage uGe regardless of the collector voltage uCe as presented in the characteristic example curves of Fig. 3. In order to minimize the switching losses the gate voltage is normally controlled rapidly through the linear area to a saturation level, e.g. to a +15 V.

Fig. 4 illustrates known characteristic waveforms when the IGBT is turned on. Before time instant ti the IGBT is in an off-state, where the voltage over it (uce) is at full DC-link voltage Udc, its current ic is 0, and the gate voltage uge at the negative gate control voltage -Ug. The turn-on process starts at time instant ti by starting to increase the gate voltage. When the gate voltage reaches the threshold voltage UGE(th) at time instant t2, IGBT starts to conduct current in the linear operation area, until time instant t3 where the gate voltage reaches the value uGe(Pi), which corresponds to the load current value iL. After that the voltage over IGBT starts to decrease by a slope, which is determined by the gate turn-on circuit capability to supply current to the Miller capacitance, according to formula [1]:

After time instant U, where the IGBT voltage uce finally reaches the low on-state voltage level, the current flow through Miller capacitance ends and the gate voltage can rise to the final positive gate control voltage level +Ug.

Fig. 5 illustrates known characteristic effect of two values of gate turn-on circuit resistors, where the value of Ri is smaller than the value of R2, as a function of IGBT current ic.

The voltage slope ducE/dt is higher by a smaller gate resistance, due to the higher capability of gate circuit to supply current to the Miller capacitance, as is evident according to formula [1], The voltage slope is the slower, the higher is the load current value ic, due to the higher gate voltage value uGe(Pi) at the linear operation area.

The turn-on switching energy pulse value Eon is higher at higher gate resistance, due to that both the current rising time (period t2 - t3 in Fig. 4) and voltage decreasing time (period t3 -14 in Fig. 4) are staying longer.

Figures 6A and 6B present example embodiments of IGBT turn-on gate circuit arrangements according to the present invention.

Fig. 6A presents an arrangement, where either resistor Rgoni or Rgon2, or the parallel-connection of them can be selected by the switches Sgoni and Sgon2- In Fig. 6B either Rgoni or the parallel-connection of Rgoni and Rgon2 can be selected by the switches Sgoni and Sgon2-

As is evident for a person skilled in the art, the number of switches and resistors can also be higher than two.

Figures 7 and 8 illustrate embodiments of the present invention in a frequency converter when turning on an IGBT.

In fig. 7 the higher value gate resistor R2 is used when the instantaneous value of the load current iu is below a limit iLim (time before t5 or after t6), and the lower value gate resistor Ri when the load current iu is higher than the limit ilim (time between ts and te). By this way the average voltage slope du/dt, and thus also the total EMC emission level remains lower than by using Ri only.

On the other hand the average switching pulse energy Eon level is lower than by using R2 only (curve Eonfs), which reduces the total power loss of the device.

In fig. 8 the higher value gate resistor R2 is used below the limit iLiM2 (time before t7 or after tio) and the lower value gate resistor Ri above the limit iLiMi (time between t8 and t9). Within an instantaneous current value band between the limits iLimi and iLiM2, a resistance value that can be changed between Ri and R2 as a function of the current iu, is used (times between t7 and t8 and between t9 and ho). This gradual resistor value changing makes the transition of du/dt and Eon from the curve corresponding to Ri to the curve corresponding to R2 smoother.

In both embodiments of figs. 7 and 8, the higher gate resistor value R2 corresponds to the resistance Rgoni, and the lower value R1 to the parallel-connection of Rgoni and Rgon2 in figures 6A and 6B. The gradually changing effective resistor value between Ri and R2 can be realized by switching Sgon2 on and off at gradually changing duty cycle for example so, that during each voltage decrease time (e.g. t3...t4 in Fig. 4), the resistor value is changed at least once.

While the invention has been described with reference to the previous embodiments, it should be recognized that the invention is not limited to these embodiments, but many modifications and variations will become apparent to persons skilled in the art without departing from the scope and spirit of the invention, as defined in the appended claims. As an example of a variation, in both embodiments of figs. 7 and 8 a hysteresis may be used when changing resistor values as a function of the load current.

Claims

A method for connecting a power semiconductor switch, such as an IGBT transistor (Vi-V6), from a non-conductive state to a conductive state by an arrangement comprising at least two different gate resistance values (R-ι, R2) that can be connected separately to a semiconductor switch gate terminal and positive gate control voltage + Ug4), characterized in that the method comprises the steps of measuring the instantaneous value of the load current (iu) of the power semiconductor switch (V-ι, V4) and using the gate resistance as a function of the measured instantaneous current value (lu) so that when the current is equal to or less than specified value (ilim2), a higher resistance value (R2) is used, and when the current is equal to or greater than the predetermined value (ilim), a lower resistance value (R-ι) is used, and when the current is between predetermined load current values (iuMi- iuM2), the effective gate resistance value is gradually changed between a higher resistance value (R2) and a lower resistance value (R-ι).

2. An arrangement for switching a power semiconductor switch, such as an IGBT transistor (Vi-V6), from a non-conductive state to a conductive state, the arrangement comprising at least two different gate resistance values (R-ι, R2) that can be connected separately to a semiconductor switch gate terminal and a positive gate control voltage (+ Ug4), characterized in that the arrangement is adapted to measure the instantaneous value (iu) of the load current of the power semiconductor switch (V-ι, V4) and to use the gate resistance as a function of the measured instantaneous current value (Iu) so that when the current is equal to or less than a predetermined value (ilim2), the arrangement is adapted to use a higher resistance value (R2), and when the current is equal to or greater than a predetermined value (ilim), the arrangement is adapted to use a lower resistance value (R-ι), and when the current is equal to predetermined load current values (iuMi-iuM2), the arrangement is adapted to change the effective gate resistance value to a gradually higher resistance value. (R2) and a lower resistance value (R-ι).

An arrangement according to claim 2, characterized in that the arrangement further comprises a first resistor (Rgon-i), a second resistor (Rgon2) and a first switch (Sgoni) and a second switch (Sgon2), which switches may be, for example, MOSFET switches.

An arrangement according to claim 3, characterized in that the first resistor (Rgon-i), the second resistor (Rgon2), the first switch (Sgoni) and the second switch (Sgon2) are arranged so that the arrangement is able to use either the first resistor (Rgoni) , a second resistor (Rgon2) or a parallel connection of the first resistor (Rgoni) and the second resistor (Rgon2) with the first switch (Sgoni) and / or the second switch (Sgon2) ·

Arrangement according to claim 3 or 4, characterized in that the arrangement is adapted to use a higher gate resistance value (R2) by switching on a first switch (Sgoni) connected in series with the first resistor (Rgoni), and the arrangement is adapted to use a lower gate resistance value (Ri) by switching on a second switch (Sgon2) connected in series with the second resistor (Rgon2) and the second switch (Sgon2) and the second resistor (Rgon2) being connected in parallel with the first switch (Sgoni) and the first resistor (Rgoni), or in parallel with the first resistor (Rgoni).

Arrangement according to one of Claims 3 to 5, characterized in that the higher value of the gate resistance (R2) corresponds to the resistance of the first resistor (Rgoni).

Arrangement according to one of Claims 3 to 6, characterized in that the lower value of the gate resistance (R-ι) corresponds to the parallel connection of the first resistor (Rgoni) and the second resistor (Rgon2).