ES3018308T3 - Phased nanopore array - Google Patents

Abstract

The techniques described here allow AC signals with different phases to be applied to distinct groups of nanoporous cells on a nanoporous sensor chip. When a first group of nanoporous cells is in a dark period and is not sampled, or is minimally sampled, by an analog-to-digital converter (ADC) to capture useful data, a second group of nanoporous cells is in a light period, during which the analog-to-digital converter samples the ADC's output signals. The ADC's reference level setting is dynamically modified based on the applied AC signals to take full advantage of its dynamic range. (Automatic translation with Google Translate, no legal value)

Description

DESCRIPTION

Phased nanopore array

Background

Nanopore membrane devices with pore sizes on the order of one nanometer in internal diameter have shown promise in rapid nucleotide sequencing. When a voltage signal is applied across a nanopore immersed in a conducting fluid, the electric field can move ions in the conducting fluid through the nanopore. The movement of ions in the conducting fluid through the nanopore can cause a small ion current. The applied voltage can also move the molecules to be sequenced into, through, or out of the nanopore. The level of the ion current (or a corresponding voltage) depends on the size and chemical structure of the nanopore and the particular molecule that has moved into the nanopore.

As an alternative to a DNA molecule (or other nucleic acid molecule to be sequenced) moving through the nanopore, a molecule (e.g., a nucleotide being added to a DNA strand) may include a particular label of a particular size and/or structure. An ionic current or voltage in a circuit including the nanopore (e.g., in an integrating capacitor) may be measured as a way of measuring the resistance of the nanopore corresponding to the molecule, thereby allowing detection of the particular molecule in the nanopore, and the particular nucleotide at a particular position in a nucleic acid.

A nanopore-based sequencing sensor chip may incorporate a large number of sensor cells configured as an array for parallel DNA sequencing. For example, a nanopore-based sequencing sensor chip may include 100,000 or more cells arranged in a two-dimensional array for sequencing 100,000 or more DNA molecules in parallel. It may be difficult to fit this many cells onto a sensor chip without compromising measurements. It may also be difficult to efficiently operate the circuitry on such a sensor chip. Examples of known devices and methods are shown in US 2014/134616 A1, US 2017/089858 A1, US 2017/089857 A1, and US 2017/091381 A1, where an AC signal is used for nanopore sequencing.

Brief summary

The techniques described herein relate to applying AC signals with different phases to different groups of nanopore cells that are served by the same data sampling circuit on a nanopore sensor chip. Due to the different phases of the AC signals, over a given period of time, a first group of nanopore cells may be in a dark period and are not sampled or are minimally sampled by a data sampling circuit (e.g., an analog-to-digital converter (ADC)) to capture useful data, while a second group of nanopore cells may be in a bright period and the output signals from the second group of nanopore cells may be sampled by the analog-to-digital converter. The reference level setting of the ADC may be dynamically changed based on the applied AC signals to fully utilize the dynamic range of the ADC. The techniques described herein can also be applied to systems using periodically changing DC bias, which may also have a "dark" period when the electrode is recharged.

According to one embodiment, a sensor chip for nucleic acid (e.g., DNA) sequencing includes a first set of cells organized into N groups, where N is an integer of two or more. Each cell includes a cell electrode that is configured to provide an AC signal to the cell to characterize a nucleotide of a nucleic acid molecule. The sensor chip for nucleic acid sequencing also includes at least N circuits, where each of the at least N circuits is configured to provide a separately configurable AC signal to one or more cell electrodes of a respective group of cells of the N groups of cells, wherein the N circuits are configured to provide AC signals with different phases to different groups of one or more cells in the N groups.

According to another embodiment useful for understanding the invention, a sensor chip for nucleic acid sequencing includes an array of cells. Each cell in the array of cells may include a nanopore configured to receive a label connected to a nucleotide; a membrane within which the nanopore resides, wherein the membrane functions as a capacitor and the nanopore functions as a resistor in a circuit; a first electrode electrically coupled to the circuit at a first end of the cell; and a second electrode coupled to the circuit at a second end of the cell and shared by two or more cells in the array of cells. The sensor chip also includes a control circuit configured to apply a first AC signal across the first electrode to precharge the capacitor, and apply a second signal across the second electrode to charge or discharge the precharged capacitor via the nanopore.

According to another embodiment, a nucleic acid sequencing method using a sensor chip including an array of cells may include applying a first AC signal to a first group of cells in the array of cells, and applying a second AC signal to a second group of cells in the array of cells, wherein the first AC signal and the second AC signal have different phases. The method may also include, during a first portion of the first AC signal, sampling, using an analog-to-digital converter (ADC), output signals from the first group of cells and not sampling output signals from the second group of cells. The method may further include, during a second portion of the first AC signal, sampling, using the ADC, output signals from the second group of cells and not sampling output signals from the first group of cells.

These and other embodiments of the invention are described in detail below. For example, other embodiments relate to systems and devices associated with the methods described herein.

In other words, the present invention provides a sensor chip for nucleic acid sequencing, the sensor chip comprising a first set of cells organized into N groups, N being an integer of two or more, each cell having a cell electrode configured to provide an AC signal to the cell for characterizing a nucleotide of a nucleic acid molecule; and at least N circuits, each of the at least N circuits configured to provide a separately configurable AC signal to one or more cell electrodes of a respective group of one or more cells of the N groups, wherein the N circuits are configured to provide AC signals with different phases to different groups of one or more cells in the N groups.

Each cell of the first set of cells may include a common electrode configured to provide a second signal to the cell, the common electrode being shared by two or more cells of the first set of cells. Each cell of the first set of cells may further include a nanopore positioned between the cell electrode and the common electrode, wherein the nanopore is configured to receive a label connected to a nucleotide and act as a variable resistor between the cell electrode and the common electrode. Each cell of the first set of cells may further include an integrating capacitor coupled to the cell electrode; and each of the at least N circuits may be configured to precharge integrating capacitors of a respective group of one or more of the N groups with the AC signal. In this case, the precharged integrating capacitors of a group of one or more cells may be configured to be charged or discharged by the second signal.

The sensor chip may also further comprise a sampling circuit coupled to the first set of cells, wherein the N circuits are configured to provide different AC signals to the N groups; and the sampling circuit is configured to selectively sample voltage signals from one or more groups of one or more cells of the N groups based on the AC signals provided to the N groups. During a first period of time, a voltage level of the AC signal provided to one or more cell electrodes of a first group of one or more cells of the N groups may be greater than a voltage level of the second signal provided to common electrodes of the first group of one or more cells; a voltage level of the AC signal provided to one or more cell electrodes of a second group of one or more cells of the N groups may be lower than a voltage level of the second signal provided to common electrodes of the second group of one or more cells; and the sampling circuit may be configured to sample voltage signals from either the first group of one or more cells or the second group of one or more cells, but not both. During a second time period, a voltage level of the AC signal provided to one or more cell electrodes of a first group of one or more cells of the N groups may be greater than a voltage level of the second signal provided to common electrodes of the first group of one or more cells; a voltage level of the AC signal provided to one or more cell electrodes of a second group of one or more cells of the N groups may be greater than a voltage level of the second signal provided to common electrodes of the second group of one or more cells; and the sampling circuit may be configured to perform one of: sampling the voltage signals of the first group of one or more cells, but not the second group of one or more cells, at a first sampling rate; sampling voltage signals from the second group of one or more cells, but not from the first group of one or more cells, at the first sampling rate; and sampling voltage signals from the first group of one or more cells at a second sampling rate and sampling voltage signals from the second group of one or more cells at a third sampling rate, wherein the second and third sampling rates are less than the first sampling rate. The sampling circuit may also include an analog-to-digital converter (ADC); and the sampling circuit may be configured to dynamically change a reference level setting for the ADC based on the different AC signals provided to the N groups.

The AC signal from the sensor chip may be a rectangular wave and may have a duty cycle equal to or less than 50%. The second signal may be a second AC signal with a frequency lower than a frequency of the AC signal or may be a DC signal. The N circuits may be configured to provide AC signals with different phases to different groups of one or more cells in the N groups.

The sensor chip may further comprise a second set of cells arranged in N groups, each cell of the second set of cells having a cell electrode configured to provide an AC signal to the cell for characterizing a nucleotide of a nucleic acid molecule, wherein each circuit of the at least N circuits is configured to provide a separately configurable AC signal to one or more cell electrodes of a respective group of the N groups of the first set of cells and to one or more cell electrodes of a respective group of the N groups of the second set of cells. In addition, the sensor chip may further comprise a first sampling circuit coupled to the first set of cells and configured to selectively sample voltage signals from one or more groups of the N groups of the first set of cells; and a second sampling circuit coupled to the second set of cells and configured to selectively sample voltage signals from one or more groups of the N groups of the second set of cells.

The sensor chip may also comprise two or more fluidic channels, wherein the cells in different fluidic channels are arranged in different groups of the N groups. Each circuit of the at least N circuits may include a switch, the switch configured to alternately connect a cell electrode to two voltage levels; and each switch is controlled by an AC control signal. Each of the N groups may include at least one cell.

Each cell of the first set of cells may include a switch, the switch configured to alternately connect a cell electrode to two voltage levels; each switch being controlled by an AC control signal; wherein each circuit of the at least N circuits includes one or more switches of the one or more cells in the respective group; and the one or more switches of the one or more cells in the respective group receive a same AC control signal.

The present invention also provides a sensor chip for nucleic acid sequencing comprising a first set of cells organized into N groups, N being an integer of two or more, each cell having a cell electrode configured to provide an AC signal to the cell for characterizing a nucleotide of a nucleic acid molecule; an analog-to-digital converter (ADC) coupled to the first set of cells and configured to convert output signals from the first set of cells; and a control circuit configured to apply a first AC signal to a first group of cells of the N cell groups; apply a second AC signal to a second group of cells of the N cell groups, wherein the first AC signal and the second AC signal have different phases; and during a first portion of the first AC signal, causing the ADC to convert output signals from the first group of cells and not convert output signals from the second group of cells.

The present invention also provides a nucleic acid sequencing method using a sensor chip including an array of cells, the method comprising applying a first AC signal to a first group of cells of the array of cells; applying a second AC signal to a second group of cells of the array of cells, wherein the first AC signal and the second AC signal have different phases; during a first portion of the first AC signal, sampling, using an analog-to-digital converter (ADC), output signals from the first group of cells and not sampling output signals from the second group of cells; and during a second portion of the first AC signal, sampling, using the ADC, output signals from the second group of cells and not sampling output signals from the first group of cells.

Applying the first AC signal to the first group of cells in the cell array may comprise applying the first AC signal to a cell electrode of each cell in the first group of cells; and applying the second AC signal to the second group of cells in the cell array may comprise applying the second AC signal to a cell electrode of each cell in the second group of cells.

The method may further comprise applying a common signal to a common electrode shared by the set of cells, wherein the common signal is a DC signal or a third AC signal having a frequency lower than a frequency of the first AC signal and a frequency of the second AC signal. In addition, the method may further comprise, during a third portion of the first AC signal, sampling, using the ADC, output signals from both the second group of cells and the first group of cells. In addition, a reference level setting for the ADC may be changed based on the first AC signal and the second AC signal.

Brief description of the drawings

FIG. 1 is a top view of an embodiment of a nanopore sensor chip having an array of nanopore cells.

FIG. 2 illustrates one embodiment of a nanopore cell in a nanopore sensor chip that can be used to characterize a polynucleotide or a polypeptide.

FIG. 3 illustrates an embodiment of a nanopore cell that performs nucleotide sequencing using a nanopore-based sequencing-by-synthesis (Nano-SBS) technique.

FIG. 4 illustrates an embodiment of an electrical circuit in a nanopore cell.

FIG. 5 shows example data points captured from a nanopore cell during bright and dark periods of AC cycles.

FIG. 6 is a cross-sectional view of a nanopore cell array in an exemplary nanopore sensor chip.

FIG. 7 is a top view of an exemplary nanopore cell array including a two-dimensional array of nanopore cells.

FIG. 8 is a schematic of an exemplary nanopore cell array including a two-dimensional array of nanopore cells.

FIG. 9 illustrates example data samples captured from nanopore cells in a column of a nanopore cell array.

FIG. 10 is a schematic of an exemplary nanopore cell array including a two-dimensional array of nanopore cells, in accordance with certain aspects of the present disclosure.

FIG. 11 illustrates example control signals for a nanopore cell array, in accordance with certain aspects of the present disclosure.

FIG. 12 illustrates example data samples captured from nanopore cells in a column of a nanopore cell array, in accordance with certain aspects of the present disclosure.

FIG. 13 shows example control signals for a nanopore cell array, in accordance with certain aspects of the present disclosure.

FIG. 14A shows fixed reference levels for an ADC on a nanopore sensor chip, in accordance with certain aspects of the present disclosure.

FIG. 14B illustrates variable reference levels for an ADC on a nanopore sensor chip, in accordance with certain aspects of the present disclosure.

FIG. 15 is a flow diagram illustrating an exemplary method of nucleic acid sequencing using a sensor including a cell array, in accordance with certain aspects of the present disclosure.

FIG. 16 is a block diagram of an example computer system usable with a system and methods, which is useful for understanding the invention.

Definitions

"Nucleic acid" may refer to deoxyribonucleotides or ribonucleotides and polymers thereof in either single-stranded or double-stranded form. The term may encompass nucleic acids that contain known nucleotide analogs or modified backbone residues or linkages, that are synthetic, natural, and non-natural, that have binding properties similar to the reference nucleic acid, and that are metabolized similarly to the reference nucleotides. Examples of such analogs may include, but are not limited to, phosphorothioates, phosphoramidites, methylphosphonates, chiral methylphosphonates, 2-O-methylribonucleotides, peptidonucleic acids (PNAs). The term nucleic acid may be used interchangeably with gene, cDNA, mRNA, oligonucleotide, and polynucleotide.

The term "template" can refer to a single-stranded nucleic acid molecule that is copied onto a complementary strand of DNA nucleotides for DNA synthesis. In some cases, a template can refer to the DNA sequence that is copied during mRNA synthesis.

The term "primer" can refer to a short nucleic acid sequence that provides a starting point for DNA synthesis. Enzymes that catalyze DNA synthesis, such as DNA polymerases, can add new nucleotides to a primer for DNA replication.

As used herein, the term "column" may generally refer to nanopore cells in a nanopore cell array that share a sampling and conversion circuit. The nanopore cells in a column may or may not be physically fabricated into a column on a nanoporous sensor chip. As used herein, the term "bright period" may generally refer to the period of time when a labeled nucleotide tag is forced into a nanopore by an electric field applied via an AC signal. The term "dark period" may generally refer to the period of time when a labeled nucleotide tag is forced out of the nanopore by the electric field applied via the AC signal. An AC cycle may include both the bright period and the dark period. In different embodiments, the polarity of the voltage signal applied to a nanopore cell to put the nanopore cell into the bright period (or the dark period) may be different.

Detailed description

The techniques disclosed herein relate to nanopore-based nucleic acid sequencing and, more specifically, to increasing the data sampling rate by a nanopore-based sequencing sensor chip that includes a large number of parallel sequencing nanopore cells.

In nanopore-based sequencing-by-synthesis (Nano-SBS), higher sampling rates are generally desired because, for example, a higher sampling rate allows the observation of events that have shorter durations, which can increase the accuracy for base calling. Examples of such events might include an unbound nucleotide label briefly entering the nanopore, the nucleotide briefly binding but not being catalyzed, and a nucleotide being rapidly catalyzed (potentially followed by the same nucleotide being catalyzed at the next position). However, there is an upper limit to the possible sampling rate due to, for example, the limited sampling and conversion speed of analog-to-digital converters, and/or the limited bandwidth of buses, data storage devices, or data processing circuitry.

AC signals can be used in Nano-SBS to improve the lifetime of a nanopore sensor chip that includes an array of nanopore cells. For example, a constant level can be applied to the working electrode of each nanopore cell in the nanopore sensor chip, and a universal AC signal can be applied to a shared counter electrode of the nanopore cells. In this example, each nanopore cell cycles through the AC signals at substantially the same time. Each AC cycle can include a bright period (a label can be introduced into a nanopore to identify a nucleotide) and a dark period, where the duty cycle can be low (i.e., the dark period can be much longer than the bright period). Thus, all nanopore cells in the nanopore sensor chip would be in either the bright period or the dark period at approximately the same time.

During the bright period, a sampling and data conversion circuit associated with nanopore cells in a column may sequentially sample and convert the output voltage signals of each nanopore cell in the column, as part of identifying a tag and, consequently, a nucleotide being incorporated. The AC signal attracts (pulls) a bound nucleotide tag toward the nanopore in the bright period, and thus the measured signals provide information about which tag (and, therefore, which nucleotide) is currently bound. During the dark period (any nucleotide tag is ejected from the nanopore), information about any nucleotide tags in the nanopore cannot be obtained, and thus the output voltage signals from the cells are of little or no use. However, during the dark period, the output voltage signals from the cells may still be sampled and converted anyway, or the sampling and data conversion circuit may be inactive. Therefore, a significant portion of the sampling and data conversion circuit bandwidth may not be used to capture useful data, at least during the dark period.

Furthermore, for nanopore sensor chips with a high cell density, a single sampling and conversion circuit can serve multiple cells. Therefore, each cell can be sampled at a much lower rate than the full sampling rate of the sampling and conversion circuit.

The techniques disclosed herein address the above problems by applying AC signals with different phases to different nanopore cells in a column, such that when some nanopore cells in the column are in the dark period, some other nanopore cells in the same column are in the bright period. For example, the nanopore cells in a column can be arranged in two or more groups. A constant voltage level can be applied to the counter electrodes of all nanopore cells, and the phase of an AC signal applied to the working electrodes of the nanopore cells in each group of nanopore cells can be delayed by a different value.

In this way, at any given time, the sampling and data conversion circuit can sample and convert the output voltage signals from the portion of the nanopore cells in the column that are in the bright period, while the dark period is minimally sampled, e.g., only for normalization purposes. As such, the sampling and data conversion can be performed at a higher rate for each nanopore cell during the bright period, since the circuit services fewer cells at any given time. Furthermore, because the dark period is only minimally sampled, all or nearly all of the captured data would be useful, unlike the case where the dark period is sampled at an unnecessarily high rate. In this way, embodiments can reduce the number of cells served by the sampling and conversion circuit in any given time period and thus increase the sampling rate per cell even without using a faster sampling and data conversion circuit.

I. Nanopore-based sequencing chip

FIG. 1 is a top view of one embodiment of a nanopore sensor chip 100 having an array 140 of nanopore cells 150. Each nanopore cell 150 includes control circuitry integrated into a silicon substrate of the nanopore sensor chip 100. In some embodiments, sidewalls 136 may be included in the array 140 to separate groups of nanopore cells 150 so that each group may receive a different sample for characterization. Each nanopore cell may be used to sequence a nucleic acid. In some embodiments, the nanopore sensor chip 100 may include a cover plate 130. In some embodiments, the nanopore sensor chip 100 may also include a plurality of pins 110 for interfacing with other circuitry, such as a computer processor.

In some embodiments, the nanopore sensor chip 100 may include multiple chips in a single package, such as, for example, a multi-chip module (mCm) or a system-in-package (SiP). The chips may include, for example, a memory, a processor, a field-programmable gate array (FpGa), an application-specific integrated circuit (ASIC), data converters, a high-speed I/O interface, etc.

In some embodiments, the nanopore sensor chip 100 may be coupled to (e.g., attached to) a nanochip workstation 120, which may include various components for performing (e.g., automatically performing) various embodiments of the methods disclosed herein, including, for example, analyte delivery mechanisms, such as pipettes for delivering lipid suspension or other membrane structure suspension, analyte solution and/or other liquids, suspensions or solids, robotic arms, computer processor and/or memory. A plurality of polynucleotides may be detected within the array 140 of nanopore cells 150. In some embodiments, each nanopore cell 150 may be individually addressable.

II. Nanopore sequencing cell

The nanopore cells 150 in the nanopore sensor chip 100 can be implemented in many different ways. For example, in some embodiments, labels of different sizes and/or chemical structures can be affixed to different nucleotides in a nucleic acid molecule to be sequenced. In some embodiments, a strand complementary to a template of the nucleic acid molecule to be sequenced can be synthesized by hybridizing differently shaped polymer-labeled nucleotides to the template. In some implementations, the nucleic acid molecule and the affixed labels can both move through the nanopore, and a stream of ions passing through the nanopore can indicate the nucleotide that is in the nanopore due to the particular size and/or structure of the label affixed to the nucleotide. In some implementations, only the labels can move into the nanopore. There can also be many different ways to detect the different labels in the nanopores.

A. Nanopore sequencing cell structure

FIG. 2 illustrates an embodiment of an exemplary nanopore cell 200 in a nanopore sensor chip, such as the nanopore cell 150 in the nanopore sensor chip 100 of FIG. 1 , which may be used to characterize a polynucleotide or a polypeptide. The nanopore cell 200 may include a well 205 formed by dielectric layers 201 and 204; a membrane, such as a lipid bilayer 214 formed over the well 205; and a sample chamber 215 above the lipid bilayer 214 and separated from the well 205 by the lipid bilayer 214. The well 205 may contain a volume of electrolyte 206, and the sample chamber 215 may contain bulk electrolyte 208 containing a nanopore, e.g., a soluble protein nanopore transmembrane molecular complex (PNTMC), and the analyte of interest (e.g., a nucleic acid molecule to be sequenced).

The nanopore cell 200 may include a working electrode 202 at the bottom of the well 205 and a counter electrode 210 disposed in the sample chamber 215. A signal source 228 may apply a voltage signal between the working electrode 202 and the counter electrode 210. A single nanopore (e.g., a PNTMC) may be inserted into the lipid bilayer 214 by an electroporation process driven by the voltage signal, thereby forming a nanopore 216 in the lipid bilayer 214. Individual membranes (e.g., lipid bilayers 214 or other membrane structures) in the array may not be chemically or electrically connected to each other. Thus, each nanopore cell in the array can be an independent sequencing device, producing unique data for the individual polymer molecule associated with the nanopore that acts on the analyte of interest and modulates the ionic current across the otherwise impermeable lipid bilayer.

As shown in FIG. 2, the nanopore cell 200 may be formed on a substrate 230, such as a silicon substrate. The dielectric layer 201 may be formed on the substrate 230. The dielectric material used to form the dielectric layer 201 may include, for example, glass, oxides, nitrides, and the like. An electrical circuit 222 may be formed to control the electrical stimulation and to process the detected signal from the nanopore cell 200 on the substrate 230 and/or within the dielectric layer 201. For example, a plurality of patterned metal layers (e.g., metal 1 to metal 6) may be formed in the dielectric layer 201, and a plurality of active devices (e.g., transistors) may be fabricated on the substrate 230. In some embodiments, the signal source 228 is included as part of the electrical circuit 222. The electrical circuit 222 may include, for example, amplifiers, integrators, analog-to-digital converters, noise filters, feedback control logic, and/or various other components. The electrical circuit 222 may further be coupled to a processor 224 that is coupled to a memory 226, where the processor 224 may analyze the sequencing data to determine sequences of the polymer molecules that have been sequenced on the array.

The working electrode 202 may be formed over the dielectric layer 201 and may form at least a portion of the bottom of the well 205. In some embodiments, the working electrode 202 is a metal electrode. For non-faradaic conduction, the working electrode 202 may be made of metals or other materials that are resistant to corrosion and oxidation, such as, for example, platinum, gold, titanium nitride, and graphite. For example, the working electrode 202 may be a platinum electrode with platinum electrodeposited thereon. In another example, the working electrode 202 may be a titanium nitride (TiN) working electrode. The working electrode 202 may be porous, thereby increasing its surface area and a resulting capacity associated with the working electrode 202. Because the working electrode of one nanopore cell may be independent of the working electrode of another nanopore cell, in the present disclosure the working electrode may be referred to as a cell electrode.

The dielectric layer 204 may be formed on top of the dielectric layer 201. The dielectric layer 204 forms the walls surrounding the well 205. The dielectric material used to form the dielectric layer 204 may include, for example, glass, oxide, silicon mononitride (SiN), polyimide, or other suitable hydrophobic insulating material. The top surface of the dielectric layer 204 may be silanized. The silanization may form a hydrophobic layer 220 on top of the top surface of the dielectric layer 204. In some embodiments, the hydrophobic layer 220 has a thickness of about 1.5 nanometers (nm).

The well 205 formed by the dielectric layer walls 204 includes an electrolyte volume 206 above the working electrode 202. The electrolyte volume 206 may be buffered and may include one or more of the following: lithium chloride (LiCl), sodium chloride (NaCl), potassium chloride (KCl), lithium glutamate, sodium glutamate, potassium glutamate, lithium acetate, sodium acetate, potassium acetate, calcium chloride (CaCh), strontium chloride (SrCh), manganese chloride (MnCh), and magnesium chloride (MgCh). In some embodiments, the electrolyte volume 206 has a thickness of approximately three micrometers (|µm).

As also shown in FIG. 2 , a membrane may be formed on top of the dielectric layer 204 and spanning the entire well 205. In some embodiments, the membrane may include a lipid monolayer 218 formed on top of the hydrophobic layer 220. As the membrane reaches the opening of the well 205, the lipid monolayer 208 may convert into the lipid bilayer 214 spanning the entire opening of the well 205. The lipid bilayer may comprise or consist of phospholipid, for example, selected from diphytanoyl-phosphatidylcholine (DPhPC), 1,2-diphytanoyl-sn-glycero-3-phosphocholine, 1,2-di-O-phytanyl-sn-glycero-3-phosphocholine (DoPhPC), palmitoyl-oleoyl-phosphatidylcholine (POPC), ester dioleoyl-phosphatidyl-methyl (DOPME), di palmitoylphosphatidylcholine (DPPC), phosphatidylcholine, phosphatidylethanolamine, phosphatidylserine, phosphatidic acid, phosphatidylinositol, phosphatidylglycerol, sphingomyelin, 1,2-di-O-phytanyl-sn-glycerol; 1.2- dipalmitoyl-sn-glycero-3-phosphoethanolamine-N-[methoxy(polyethylene glycol)-350];

1.2- dipalmitoyl-sn-glycero-3-phosphoethanolamine-N-[methoxy(polyethylene glycol)-550];

1.2- dipalmitoyl-sn-glycero-3-phosphoethanolamine-N-[methoxy(polyethylene glycol)-750];

1.2- dipalmitoyl-sn-glycero-3-phosphoethanolamine-N-[methoxy(polyethylene glycol)-1000];

1.2- dipalmitoyl-sn-glycero-3-phosphoethanolamine-N-[methoxy(polyethylene glycol)-2000];

1.2- Dioleoyl-sn-glycero-3-phosphoethanolamine-N-lactosyl; ganglioside GM1, lysophosphatidylcholine (LPC) or any combination thereof.

As shown, the lipid bilayer 214 is enclosed within a single nanopore 216, e.g., formed by a single PNTMC. As described above, the nanopore 216 may be formed by inserting a single PNTMC into the lipid bilayer 214 by electroporation. The nanopore 216 may be large enough to allow passage of at least a portion of the analyte of interest and/or small ions (e.g., Na+, K+, Ca2+, Cl−) between the two sides of the lipid bilayer 214.

The sample chamber 215 is above the lipid bilayer 214 and may contain a solution of the analyte of interest for characterization. The solution may be an aqueous solution containing bulk electrolyte 208 and buffered to an optimal ion concentration and maintained at an optimal pH to keep nanopore 216 open. Nanopore 216 crosses lipid bilayer 214 and provides the only path for ionic flow from bulk electrolyte 208 to working electrode 202. In addition to nanopores (e.g., PNTMCs) and the analyte of interest, bulk electrolyte 208 may further include one or more of the following: lithium chloride (LiCl), sodium chloride (NaCl), potassium chloride (KCl), lithium glutamate, sodium glutamate, potassium glutamate, lithium acetate, sodium acetate, potassium acetate, calcium chloride (CaCh), strontium chloride (SrCh), manganese chloride (MnCh), and magnesium chloride. (MgCh).

The counter electrode (CE) 210 may be an electrochemical potential sensor. In some embodiments, the counter electrode 210 may be shared among a plurality of nanopore cells and thus may be referred to as a common electrode. In some cases, the common potential and the common electrode may be common to all nanopore cells, or at least to all nanopore cells within a particular array. The common electrode may be configured to apply a common potential to the bulk electrolyte 208 in contact with the nanopore 216. The counter electrode 210 and the working electrode 202 may be coupled to the signal source 228 to provide an electrical stimulus (e.g., voltage bias) across the lipid bilayer 214, and may be used to detect electrical characteristics of the lipid bilayer 214 (e.g., resistance, capacitance, and ionic current flow). In some embodiments, the nanopore cell 200 may also include a reference electrode 212.

In some embodiments, various checks may be performed during the creation of the nanopore cell as part of the calibration. Once a nanopore cell is created, other calibration steps may be performed, for example, to identify nanopore cells that are functioning as desired (e.g., one nanopore in the cell). Such calibration checks may include physical checks, voltage calibration, open channel calibration, and identification of cells with a single nanopore.

B. Cell detection signals from nanopore sequencing

Nanopore cells in the nanopore sensor chip, such as the nanopore cells 150 in the nanopore sensor chip 100, may enable parallel sequencing using a single-molecule nanopore-based sequencing-by-synthesis (nano-SBS) technique.

FIG. 3 illustrates one embodiment of a nanopore cell 300 that performs nucleotide sequencing using the nano-SBS technique. In the nano-SBS technique, a template 332 to be sequenced (e.g., a nucleic acid molecule or other analyte of interest) and a primer may be introduced into the bulk electrolyte 308 in the sample chamber of the nanopore cell 300. As an example, the template 332 may be circular or linear. A nucleic acid primer may hybridize to a portion of the template 332 to which four differently shaped polymer-labeled nucleotides 338 may be added.

In some embodiments, an enzyme (e.g., a polymerase 334, such as a DNA polymerase) may be associated with the nanopore 316 for use in synthesizing a strand complementary to the template 332. For example, the polymerase 334 may be covalently attached to the nanopore 316. The polymerase 334 may catalyze the incorporation of the nucleotides 338 into the primer using a single-stranded nucleic acid molecule as a template. The nucleotides 338 may comprise label species ("labels"), the nucleotide being one of four different types: A, T, G, or C. When a labeled nucleotide is successfully complexed with the polymerase 334, the label may be attracted (charged) toward the nanopore by an electrical force, such as a force generated in the presence of an electric field generated by a voltage applied across the lipid bilayer 314 and/or the nanopore 316. The tail of the label may be positioned on the nanopore barrel 316. The label contained within the nanopore barrel 316 may generate a unique ion-blocking signal 340 due to the label's distinctive chemical structure and/or size, thereby electronically identifying the added base to which the label is attached.

As used herein, a "charged" or "pass-through" label may be one that is located in and/or remains in or near the nanopore for an appreciable amount of time, e.g., from 0.1 milliseconds (ms) to 10,000 ms. In some instances, a label is loaded into the nanopore before being released from the nucleotide. In some instances, the probability that a charged label will pass through (and/or be detected by) the nanopore after being released following a nucleotide incorporation event is suitably high, e.g., from 90% to 99%.

In some embodiments, before the polymerase 334 connects to the nanopore 316, the conductance of the nanopore 316 may be high, such as, for example, about 300 picosiemens (300 pS). As the label is loaded into the nanopore, a unique conductance signal (e.g., signal 340) is generated due to the distinctive chemical structure and/or size of the label. For example, the nanopore conductance may be about 60 pS, 80 pS, 100 pS, or 120 pS, each corresponding to one of the four types of labeled nucleotides. The polymerase may then undergo an isomerization reaction and a transphosphorylation reaction to incorporate the nucleotide into the growing nucleic acid molecule and release the label molecule.

In some cases, some of the labeled nucleotides may not match (complementary bases) with a current position on the nucleic acid molecule (template). Labeled nucleotides that are not base-paired with the nucleic acid molecule may also pass through the nanopore. These unpaired nucleotides may be rejected by the polymerase within a time scale that is shorter than the time scale over which correctly paired nucleotides remain associated with the polymerase. Labels bound to unpaired nucleotides may pass through the nanopore quickly and be detected for a short period of time (e.g., less than 10 ms), whereas labels bound to paired nucleotides may be loaded into the nanopore and detected for a long period of time (e.g., at least 10 ms). Thus, unpaired nucleotides may be identified by a downstream processor based at least in part on the time over which the nucleotide is detected in the nanopore.

A conductance (or equivalently, resistance) of the nanopore including the charged (passing) label can be measured by means of a current passing through the nanopore, thereby providing an identification of the label species and thus the nucleotide at the current position. In some embodiments, a direct current (DC) signal can be applied to the nanopore cell (e.g., so that the direction in which the label moves through the nanopore is not reversed). However, operating a nanopore sensor for extended periods of time using a direct current can change the composition of the electrode, unbalance ion concentrations across the nanopore, and have other undesirable effects that may affect the lifetime of the nanopore cell. Applying an alternating current (AC) waveform can reduce electromigration to avoid these undesirable effects and has certain advantages as described below. The nucleic acid sequencing procedures described herein using labeled nucleotides are fully compatible with applied AC voltages and therefore an AC waveform can be used to achieve these advantages.

The ability to recharge the electrode during the AC sensing cycle can be advantageous when using sacrificial electrodes, electrodes that change molecular character in current-carrying reactions (e.g., electrodes comprising silver), or electrodes that change molecular character in current-carrying reactions. An electrode can be depleted during a sensing cycle when a DC signal is used. Recharging can prevent the electrode from reaching a depletion limit, such as being completely depleted, which can be a problem when the electrodes are small (e.g., when the electrodes are small enough to provide an electrode array having at least 500 electrodes per square millimeter). Electrode lifetime in some cases varies with, and at least partly depends on, the electrode width.

Suitable conditions for measuring ionic currents passing through nanopores are known in the art, and examples are provided herein. The measurement can be carried out with a voltage applied across the membrane and the pore. In some embodiments, the voltage used can range from -400 mV to 400 mV. The voltage used is preferably in a range having a lower limit selected from -400 mV, -300 mV, -200 mV, -150 mV, -100 mV, -50 mV, -20 mV, and 0 mV and an upper limit independently selected from 10 mV, 20 mV, 50 mV, 100 mV, 150 mV, 200 mV, 300 mV, and 400 mV. The voltage used may be, more preferably, in the range of 100 mV to 240 mV and, most preferably, in the range of 160 mV to 240 mV. It is possible to increase the discrimination between different nucleotides by a nanopore by using an increased applied potential. Nucleic acid sequencing using AC waveforms and labeled nucleotides is described in U.S. Patent Publication No. US 2014/0134616 entitled "Nucleic Acid Sequencing Using Tags", filed November 6, 2013. In addition to the labeled nucleotides described in US 2014/0134616, sequencing can be performed using nucleotide analogs that lack a carbohydrate or acyclic moiety, for example, (S)-glycerol nucleoside triphosphates (gNTPs) of the five common nucleobases: adenine, cytosine, guanine, uracil, and thymine (Horhota et al. Organic Letters, 8:5345-5347 [2006]).

C. Electrical circuit of the nanopore sequencing cell

FIG. 4 illustrates one embodiment of an electrical circuit 400 (which may include portions of the electrical circuit 222 in FIG. 2) in a nanopore cell, such as nanopore cell 200. As described above, in some embodiments, the electrical circuit 400 includes a counter electrode 210 that may be shared among a plurality of nanopore cells or all of the nanopore cells in a nanopore sensor chip, and thus may also be referred to as a common electrode. The common electrode may be configured to apply a common potential to the bulk electrolyte (e.g., bulk electrolyte 208) in contact with the lipid bilayer (e.g., lipid bilayer 214) in the nanopore cells by connecting to a voltage source V<liq>420. In some embodiments, a non-faradaic mode of AC can be used to modulate the voltage V<liq> with an AC signal (e.g., a square wave) and apply it to the bulk electrolyte in contact with the lipid bilayer in the nanopore cell. In some embodiments, V<liq> is a square wave with a magnitude of ±200-250 mV and a frequency between, for example, 25 and 400 Hz. The bulk electrolyte between the counter electrode 210 and the lipid bilayer (e.g., lipid bilayer 214) can be modeled by a large capacitor (not shown), such as, for example, 100 |<j>F or larger.

FIG. 4 also shows an electrical model 422 representing the electrical properties of a working electrode (e.g., working electrode 202) and the lipid bilayer (e.g., lipid bilayer 214). The electrical model 422 includes a capacitor 426 (CBilayer) modeling a capacitance associated with the lipid bilayer and a resistor 428 (Rpore) modeling a variable resistance associated with the nanopore, which may change based on the presence of a particular label in the nanopore. The electrical model 422 also includes a capacitor 424 having a bilayer capacitance (CBilayer) and representing the electrical properties of the working electrode 202 and the well 205. The working electrode 202 may be configured to apply a distinctive potential independent of working electrodes in other nanopore cells.

The gate device 406 is a switch that can be used to connect or disconnect the lipid bilayer and the working electrode from the electrical circuit 400. The gate device 406 can be controlled by a memory bit to enable or disable a voltage stimulus from being applied across the lipid bilayer in the nanopore cell. Before lipids are deposited to form the lipid bilayer, the impedance between the two electrodes can be very low because the well of the nanopore cell is not sealed, and therefore the gate device 406 can be kept open to prevent a short circuit condition. The gate device 406 can be closed after the lipid solvent has been deposited in the nanopore cell to seal the well of the nanopore cell.

Circuit 400 may further include an on-chip integrating capacitor 408 (ncon). Integrating capacitor 408 may be precharged using a reset signal 403 to close switch 401 such that integrating capacitor 408 is connected to a voltage source V<pre>405. In some embodiments, voltage source V<pre>405 provides a constant positive voltage with a magnitude of, for example, 900 mV. When switch 401 is closed, integrating capacitor 408 may be precharged to the positive voltage level of voltage source V<pre>405.

After the integrating capacitor 408 is precharged, the reset signal 403 may be used to open the switch 401 so that the integrating capacitor 408 is disconnected from the voltage source V<pre>405. At this point, depending on the level of the voltage source V<liq>, the potential of the counter electrode 210 may be at a higher level than the potential of the working electrode 202 (and the integrating capacitor 408) or vice versa. For example, during a positive phase of a square wave from the voltage source V<liq> (e.g., the bright or dark period of the AC voltage source signal cycle), the potential of the counter electrode 210 is at a higher level than the potential of the working electrode 202. During a negative phase of the square wave from the voltage source V<liq> (e.g., the dark or bright period of the AC voltage source signal cycle), the potential of the counter electrode 210 is at a lower level than the potential of the working electrode 202. Thus, in some embodiments, the integrating capacitor 408 may be further charged during the bright period from the pre-charged voltage level of the voltage source V<pre>405 to a higher level, and discharged during the dark period to a lower level, due to the potential difference between the counter electrode 210 and the working electrode 202. In other embodiments, charging and discharging may occur in dark periods and bright periods, respectively.

The integrating capacitor 408 may be charged or discharged over a fixed period of time, depending on the sampling rate of an analog-to-digital converter (ADC) 410, which may be greater than 1 kHz, 5 kHz, 10 kHz, 100 kHz, or more. For example, with a sampling rate of 1 kHz, the integrating capacitor 408 may be charged/discharged over a period of approximately 1 ms, and then the voltage level may be sampled and converted by the ADC 410 at the end of the integration period. A particular voltage level would correspond to a particular mark species in the nanopore and thus would correspond to the nucleotide at a current position in the template.

After being sampled by the ADC 410, the integrating capacitor 408 may be pre-charged again by using the reset signal 403 to close the switch 401 so that the integrating capacitor 408 is connected to the voltage source V<pre>405 again. The steps of pre-charging the integrating capacitor 408, waiting a fixed period of time for the integrating capacitor 408 to charge or discharge, and sampling and converting the integrating capacitor voltage level by the ADC 410 may be repeated in cycles throughout the sequencing procedure.

A digital processor 430 may process the ADC output data, for example, for normalization, data buffering, data filtering, data compression, data reduction, event extraction, or assembling ADC output data from the nanopore cell array into various data frames. In some embodiments, the digital processor 430 may perform additional post-processing, such as basis determination. The digital processor 430 may be implemented as hardware (e.g., in a GPU, FPGA, ASIC, etc.) or as a combination of hardware and software.

Consequently, the voltage signal applied across the nanopore can be used to detect particular states of the nanopore. One of the possible states of the nanopore is an open channel state when a polyphosphate label-bound nucleotide is absent from the nanopore barrel. Four other possible states of the nanopore each correspond to a state where one of the four different types of polyphosphate nucleotides bound to the label (A, T, G, or C) is retained in the nanopore barrel. Yet another possible state of the nanopore is when the lipid bilayer is ruptured.

When measuring the voltage level across the integrating capacitor 408 after a fixed period of time, different states of a nanopore may result in measurements of different voltage levels. This is because the rate of voltage decay (decrease per discharge or increase per charge) across the integrating capacitor 408 (i.e., the steepness of the slope of a graph of voltage across the integrating capacitor 408 versus time) depends on the nanopore resistance (e.g., the resistance of the resistor R<pore>428). More particularly, since the resistance associated with the nanopore in different states is different due to the distinctive chemical structures of the molecules (of the labels), different corresponding rates of voltage decay can be observed and can be used to identify the different states of the nanopore. The voltage decay curve may be an exponential curve with a time constant of RC<t>=RC, where R is the resistance associated with the nanopore (i.e., R<pore>428) and C is the capacitance associated with the membrane (i.e., capacitor 426 (CBilayer)) in parallel with R. A time constant of the nanopore cell may be, for example, about 200-500 ms. The decay curve may not exactly fit an exponential curve due to the detailed implementation of the bilayer, but the decay curve may be exponential-like and is repeatable, thus allowing for mark detection.

In some embodiments, the resistance associated with the nanopore in an open channel state may be in the range of 100 MOhm to 20 GOhm. In some embodiments, the resistance associated with the nanopore in a state where a mark is inside the nanopore cylinder may be within the range of 200 MOhm to 40 GOhm. In other embodiments, the integrating capacitor 408 may be omitted, since the voltage being driven to the ADC 410 will still vary due to the voltage drop across the electrical pattern 422.

The rate of voltage drop across the integrating capacitor 408 can be determined in several ways. As discussed above, the rate of voltage drop can be determined by measuring a voltage drop over a fixed time interval. For example, the voltage across the integrating capacitor 408 can be measured first by the ADC 410 at time t i and then the voltage is measured again by the ADC 410 at time t2. The voltage difference is larger when the slope of the voltage versus time curve across the integrating capacitor 408 is steeper, and the voltage difference is smaller when the slope of the voltage curve is shallower. Therefore, the voltage difference can be used as a metric to determine the rate of voltage drop across the integrating capacitor 408 and thus the state of the nanopore cell.

In other embodiments, the rate of voltage drop can be determined by measuring a duration of time required for a selected amount of voltage drop. For example, the time required for the voltage to drop or rise from a first voltage level V1 to a second voltage level V2 can be measured. The time required is shorter when the slope of the voltage versus time curve is steeper, and the time required is longer when the slope of the voltage versus time curve is less steep. Thus, the measured time required can be used as a metric to determine the rate of voltage drop across the integrating capacitor ncon 408 and, therefore, the state of the nanopore cell. One of skill in the art will appreciate the various circuits that can be used to measure the resistance of the nanopore, for example, including current measurement techniques.

In some embodiments, the electrical circuit 400 may not include a feed-through device (e.g., feed-through device 406) and an additional capacitor (e.g., integrating capacitor 408 (ncon)) that are fabricated on-chip, thereby facilitating reduction in nanopore-based sequencing chip size. Due to the thin nature of the membrane (lipid bilayer), the capacitance associated with the membrane (e.g., capacitor 426 (CBilayer)) alone may be sufficient to create the required RC time constant without the need for additional on-chip capacitance. Thus, the capacitor 426 may be used as an integrating capacitor and may be pre-charged by the voltage signal V<pre> and subsequently discharged or charged by the voltage signal V<liq>. Eliminating the additional capacitor and feed-through device otherwise fabricated on the electrical circuit chip can significantly reduce the footprint of a single nanopore cell on the nanopore sequencing chip, thereby facilitating scaling of the nanopore sequencing chip to include increasingly larger numbers of cells (e.g., having millions of cells on a nanopore sequencing chip).

D. Data sampling in nanopore cells

To perform nucleic acid sequencing, the voltage level of the integrating capacitor (e.g., integrating capacitor 408 (ncon) or capacitor 426 (CBilayer)) may be sampled and converted by the ADC (e.g., ADC 410) while a labeled nucleotide is added to the nucleic acid. The nucleotide label may be pushed toward the nanopore barrel by the electric field across the nanopore that is applied via the counter electrode and the working electrode, e.g., when the applied voltage is such that V<liq> is less than V<pre>.

1. Step

A passing event occurs when a labeled nucleotide binds to the template (e.g., a nucleic acid fragment) and the label moves in and out of the nanopore barrel. This can happen multiple times during a passing event. When the label is in the nanopore barrel, the nanopore resistance may be higher, and a lower current may flow through the nanopore.

During sequencing, a label may not be in the nanopore during some AC cycles (called the open-channel state), where the current is highest due to the nanopore's lower resistance. When a label is attracted to the nanopore barrel, the nanopore is in bright mode. When the label is ejected from the nanopore barrel, the nanopore is in dark mode.

2. Bright and dark period

During an AC cycle, the voltage across the integrating capacitor may be sampled multiple times by the ADC. For example, in one embodiment, an AC voltage signal is applied across the system at, say, about 100 Hz, and an ADC acquisition rate may be about 2000 Hz per cell. Thus, there may be about 20 data points (voltage measurements) captured per AC cycle (cycle of an AC waveform). The data points corresponding to one cycle of the AC waveform may be referred to as a set. In a set of data points for one AC cycle, there may be a subset captured when, say, V<liq> is less than V<pre>, which may correspond to a bright mode (period) where the tag is forced toward the nanopore cylinder. Another subset may correspond to a dark mode (period) when the label is ejected from the nanopore cylinder by the applied electric field when, for example, V<líq> is greater than V<pre>.

3. Measured voltages

For each data point, when switch 401 is opened, the voltage across the integrating capacitor (e.g., integrating capacitor 408 (ncon) or capacitor 426 (CBilayer)) will change in a decrementing manner as a result of charging/discharging by V<liq>, e.g., as an increase from V<pre> to V<liq> when V<liq> is greater than V<pre> or a decrease from V<pre> to V<liq> when V<liq> is less than V<pre>. The final voltage values may differ from V<liq> as the working electrode is charged. The rate of change of the voltage level across the integrating capacitor may be governed by the value of the resistance of the bilayer, which may include the nanopore, which in turn may include a molecule (e.g., a label of a labeled nucleotide) in the nanopore. The voltage level may be measured at a predetermined time after switch 401 is opened.

Switch 401 may operate at the data acquisition rate. Switch 401 may be closed for a relatively short period of time between two data acquisitions, typically just after a measurement made by the ADC. The switch allows multiple data points to be collected for each cycle. If switch 401 remained open, the voltage level across the integrating capacitor, and thus the ADC output value, would drop completely and remain there. Such multiple measurements may allow for higher resolution with a fixed ADC (e.g., from 8 bits to 14 bits due to the increased number of measurements, which can be averaged). Multiple measurements may also provide kinetic information about the molecule passing through the nanopore. The timing information may allow for the determination of how long it takes to pass. This may also be used to help determine whether multiple nucleotides that are added to the nucleic acid strand are being sequenced.

FIG. 5 shows example data points captured from a nanopore cell during bright and dark periods of AC cycling. In FIG. 5, the change in the data points is exaggerated for illustrative purposes. The voltage (V<pre>) applied to the working electrode or integrating capacitor is at a constant level, such as, for example, 900 mV. A voltage signal 510 (V<liq>) applied to the counter electrode of the nanopore cells is an AC signal shown as a rectangular wave, where the duty cycle may be any suitable value, such as less than or equal to 50%, for example, about 40%.

During a bright period 520, the voltage signal 510 (V<liq>) applied to the counter electrode is lower than the voltage V<pre> applied to the working electrode, such that a mark can be forced toward the nanopore cylinder by the electric field caused by the different voltage levels applied at the working electrode and the counter electrode (e.g., due to charging on the mark and/or ion flow). When switch 401 is opened, the voltage at a node before the ADC (e.g., at an integrating capacitor) will decrease. After one voltage data point is captured (e.g., after a specified period of time), switch 401 can be closed and the voltage at the measurement node will increase back to V<pre> again. The procedure can be repeated to measure multiple voltage data points. In this way, multiple data points can be captured during the bright period.

As shown in FIG. 5, a first data point 522 (also referred to as first point delta (FPD)) in the bright period after a change in signal sign V<liq> may be lower than subsequent data points 524. This may be because there is no mark in the nanopore (open channel) and therefore it has a low resistance and high discharge rate. In some cases, the first data point 522 may exceed the V<liq> level as shown in FIG. 5. This may be caused by the capacitance of the bilayer coupling the signal to the capacitor on the chip. The data points 524 may be captured after a pass-through event has occurred, i.e., a mark is forced into the nanopore barrel, where the resistance of the nanopore and therefore the discharge rate of the integrating capacitor depends on the particular type of mark that is forced into the nanopore barrel. The 524 data points may decrease slightly for each measurement due to the accumulated load on the 424 CDouble layer, as mentioned below.

During a dark period 530, the voltage signal 510 (V<liq>) applied to the counter electrode is greater than the voltage (V<pre>) applied to the working electrode, such that any label would be ejected out of the nanopore cylinder. When the switch 401 is opened, the voltage at the measurement node increases because the voltage level of the voltage signal 510 (V<liq>) is greater than V<pre>. After a voltage data point is captured (e.g., after a specified period of time), the switch 401 may be closed and the voltage at the measurement node will decrease back to V<pre> again. The procedure may be repeated to measure multiple voltage data points. Thus, multiple data points may be captured during the dark period, including a first delta point 532 and subsequent data points 534. As described above, during the dark period, any nucleotide labels are expelled from the nanopore, and therefore, minimal information about any nucleotide labels is obtained, other than for use in normalization. Therefore, the voltage signals output by the cells during the dark period may be of little or no use.

FIG. 5 also shows that during the bright period 540, although the voltage signal 510 (V<liq>) applied to the counter electrode is lower than the voltage (V<pre>) applied to the working electrode, no breakthrough event (open channel) occurs. Therefore, the nanopore resistance is low and the integrating capacitor discharge rate is high. As a result, the captured data points, including a first data point 542 and subsequent data points 544, show low voltage levels.

One might expect that the voltage measured during a bright or dark period would be approximately the same for each measurement of a constant resistance of the nanopore (e.g., made during a bright mode of a given AC cycle while a tag is in the nanopore), but this may not be the case when charge builds up on the double-layer capacitor 424 (Double-layer). This charge buildup can cause the time constant of the nanopore cell to lengthen. As a result, the voltage level may shift, thereby causing the measured value to decrease for each data point in a cycle. Thus, within a cycle, the data points may change slightly from one data point to the next, as shown in FIG. 5.

4. Determination of bases

For each usable nanopore cell of the nanopore sensor chip, a production mode can be run to sequence nucleic acids. ADC output data captured during sequencing can be normalized to provide increased accuracy. Normalization can account for drift effects such as cycle conformation and reference value shift. After normalization, the embodiments can determine voltage bins for the feedthrough channels, where each bin corresponds to a different label species and thus a different nucleotide. The bins can be used to determine the probabilities that a given voltage corresponds to a given nucleotide. As another example, the bins can be used to determine cutoff voltages to discriminate between different nucleotides (bases).

Other details regarding the sequencing operation can be found in, for example, U.S. Patent Publication No. 2016/0178577 entitled "Nanopore-Based Sequencing With Varying Voltage Stimulus", U.S. Patent Publication No. 2016/0178554 entitled "Nanopore-Based Sequencing With Varying Voltage Stimulus", U.S. Patent Application No. 15/085,700 entitled "Non-Destructive Bilayer Monitoring Using Measurement Of Bilayer Response To Electrical Stimulus", and U.S. Patent Application No. 15/085,713 entitled "Electrical Enhancement Of Bilayer Formation".

111. Nanopore cell array

When nanopore sequencing cells are arranged on the nanopore sensor chip, many nucleic acid molecules can be sequenced in parallel. Each cell may have some specialized circuitry (e.g., an integrating capacitor), but they may also share some circuitry, such as an ADC, a signal source, an electrode, or a control circuit.

FIG. 6 is a cross-sectional view of a nanopore cell array 600 in an exemplary nanopore sensor chip, such as the nanopore cell array 150 in the nanopore sensor chip 140 viewed along line A-A shown in FIG. 1. FIG. 6 shows a plurality of nanopore cells in a row or a column of a nanopore cell array 600. As described above with respect to FIG. 2, each nanopore cell includes an electrical circuit 622 integrated into the silicon substrate 630 and/or the dielectric layer 601 of the nanopore sensor chip. Each nanopore cell includes a respective well 605 formed by dielectric layers 601 and 604 and a working electrode 602 at the bottom of well 605. Well 605 may contain the volume of electrolyte 606. A lipid bilayer 614 may be formed over dielectric layer 604 and cover each well 605. Lipid bilayer 614 includes a nanopore 616 at the top of each well 605. Sample chamber 615 on top of lipid bilayer 614 may be configured to contain bulk electrolyte 608, which may include the molecules to be analyzed and polymer-labeled nucleotides or primers, as described above. A molecule 670 to be analyzed may be bound to nanopore 616, for example, by an interaction between a polymerase and molecule 670. In some embodiments, side walls 636 (such as side walls 136 shown in FIG. 1 ) may be included in array 600 to separate groups of nanopore cells so that each group may receive a different sample for characterization. In some embodiments, the nanopore sensor chip may include cover plate 630 enclosing sample chamber 615.

The counter electrodes 610 of different nanopore cells may be arranged in the sample chamber 615 and may be connected to the voltage source 628 to apply a common V to the nanopore cells. The counter electrodes 610 for different nanopore cells may be physically connected to each other to form a common electrode. The working electrodes 602 of different nanopore cells may be connected to a common voltage source, or they may be independently connected to different voltage sources. In some embodiments, the electrical circuits 622 of different nanopore cells may be connected to a bus 660, and the voltage level across the integrating capacitors of the different nanopore cells may be sequentially read via the bus 660 by sequentially selecting the different nanopore cells as described in detail below.

FIG. 7 is a top view of an exemplary nanopore cell array 700 including a two-dimensional array of nanopore cells 708. The nanopore cell array 700 may include thousands or even millions of nanopore cells. For example, in one embodiment, the nanopore cell array 700 may include 512x512 nanopore cells arranged in 512 rows and 512 columns. In some embodiments, the nanopore cell array 700 may be grouped into different batteries 706, where each battery may include a subset of the nanopore cells in the nanopore cell array 700. In some embodiments, the nanopore cells in each column of the nanopore cell array 700 may be grouped together, and the voltage levels across the integrating capacitors of the nanopore cells in each column may be sampled and converted by an ADC 712. The nanopore cells in a column may share the same ADC to reduce the overall area and power consumption of the nanopore sensor chip.

Row drivers and precharge circuitry 718 may be used to selectively precharge nanopore cells in one or more rows (e.g., by closing switch 401 of FIG. 4 to connect nanopore cells in one or more rows to V<pre>using row select lines (or word lines) 714). Row drivers and precharge circuitry 718 may also be used to sequentially select each row using row select lines (i.e., word lines) 714. Integrating capacitors for the nanopore cells in the selected row may be connected to corresponding column lines 716 (e.g., via a switch (not shown) between the on-chip integrating capacitor 408 (ncon) and the ADC 410, or via the pass-through device 406 if the on-chip integrating capacitor 408 (ncon) is not used). The voltage signals from the nanopore cells in the selected row may optionally be processed (e.g., detected and amplified) by corresponding column amplifiers 720, and converted to digital outputs by corresponding ADCs 712. In some embodiments, multiple columns could be served by the same column amplifier and ADC.

FIG. 8 is a schematic of an exemplary nanopore cell array 800 including a two-dimensional array of nanopore cells 802. The nanopore cell array 800 may include all of the nanopore cells of a nanopore sensor chip, or may include only a subset (e.g., a battery) of the nanopore cells of a nanopore sensor chip. The working electrode of each nanopore cell 802 may be connected to a voltage source (e.g., V<pre> of FIG. 4) (not shown), and the counter electrode of each nanopore cell 802 may be connected to a common V<liq> signal. The nanopore cell array 800 includes a plurality of column lines 820, each column line 820 coupled to nanopore cells 802 in a same column and coupled to an ADC 840. The nanopore cell array 800 includes M rows of nanopore cells 802, where each of the M rows can be selected by the row selection lines 810-0 to 810-M-1.

During the sequencing process, an integrating capacitor of each nanopore cell 802 may first be precharged by a voltage source V<pre> applied to the working electrode (e.g., via switch 401 as shown in FIG. 4 ), and the common signal V<liq> may be applied to the counter electrodes of the nanopore cells 802, as described above. After the integrating capacitors in the nanopore cells 802 have been charged/discharged, each of the M rows may be sequentially selected to connect the integrating capacitors of the nanopore cells in a row to corresponding column lines and corresponding ADCs. The integrating capacitors may be buffered to prevent coupling through parasitic capacitors. Thus, the ADC 840, for a column, may sequentially sample and convert the voltage levels of the integrating capacitors of the nanopore cells in the column.

In this way, a set of data samples can be captured from the nanopore cells in a column of a nanopore cell array after each precharge and charge/discharge operation. When multiple precharge and charge/discharge operations are performed during the bright and dark periods of an AC cycle, multiple sets of data samples can be captured, with each set of data samples including a data sample from each of the nanopore cells in the column.

FIG. 9 illustrates example data samples captured from nanopore cells in a column of a nanopore cell array, such as the 800 nanopore cell array, during an AC cycle. In FIG. 9, the horizontal axis represents time during the sequencing process. FIG. 9 shows that, during the time T of a bright period of an AC cycle, a total of K samples can be captured from each nanopore cell by an ADC serving the column.

As described above with respect to FIG. 8, a column of the nanopore cell array may include M nanopore cells, each in a different row. The ADC may capture one data sample for the nanopore cell in row 0, one data sample for the nanopore cell in row 1, ..., and one data sample for the nanopore cell in row M-1. Each ADC capture may be controlled by a clock signal that is much faster than the AC signal applied to the electrodes of the nanopore cells. After each nanopore cell in the column has been sampled once, the nanopore cell in the column may be pre-charged again by the voltage source V<pre>, and charged/discharged by the common signal V<liq>. Thereafter, a second data sample may be captured from each of the M nanopore cells in the column sequentially or in a pipeline. The sequencing process can be repeated to capture K samples from each of the M nanopore cells in the column during the bright period. As a result, a total number of MxK samples can be captured from the M nanopore cells in each column during the time T<b>of the bright period. Therefore, the sampling rate of the ADC can be at least M<x>K/T<b>to capture MxK samples during the time T<b>of the bright period. Data samples can be similarly captured during the dark period.

IV. Phased nanopore cell arrays

As discussed above, there is an upper limit to the possible sampling rate due to, for example, the limited sampling and conversion speed of analog-to-digital converters, and/or the limited bandwidth of buses, data storage devices, or data processing circuits. When all nanopore cells in a column are driven by a common V signal, almost all useful data is captured during the common bright period, while during the dark period, little or no useful data may be captured. Therefore, a significant portion of the bandwidth of a sampling and data conversion circuit may not be used to capture useful data, at least during the dark period.

The techniques disclosed herein address the above problems and increase the effective sampling rate per cell of the sampling and conversion circuit by applying AC signals with different phases to different nanopore cells in a column. As a result, when some nanopore cells are in the dark period, other nanopore cells are in the bright period and are being sampled by the shared sampling and conversion circuit. For example, in some embodiments, the nanopore cells in a column may be arranged in two or more groups. A common V may be applied to the counter electrodes of all nanopore cells, and the phase of an AC signal V applied to the working electrodes of the nanopore cells in each group of nanopore cells may be delayed by a different value. In this way, at any given time, the sampling and data conversion circuit can sample and convert the output voltage signals from the portion of the nanopore cells in a column that are in the bright period, with the dark period being minimally sampled, for example, only for normalization purposes. As such, the sampling and data conversion can be performed at a higher rate for each nanopore cell in the bright period. Furthermore, because the dark period is only minimally sampled, all or nearly all of the captured data would be useful, unlike where the dark period is sampled at an unnecessarily high rate.

A. Architecture

FIG. 10 is a schematic of an exemplary nanopore cell array 1000 including a two-dimensional array of nanopore cells 1002, in accordance with certain aspects of the present disclosure. Similar to the nanopore cell array 800 of FIG. 8 , the nanopore cell array 1000 may include all of the nanopore cells of a nanopore sensor chip, or may include only a subset of the nanopore cells of a nanopore sensor chip. The nanopore cell array 1000 includes a plurality of column lines 1020, each column line 1020 coupled to nanopore cells 1002 in a same column and coupled to an ADC 1040. The nanopore cell array 1000 includes M rows of nanopore cells 1002, where each of the M rows can be selected by a row selection line 1010. The nanopore cells 1002 in the nanopore cell array 1000 can be organized into N groups, where N can be any number between 2 and the total number of nanopore cells in the column. In one embodiment, the nanopore cell array 1000 can be organized such that each group of the N groups can include the nanopore cells in M/N rows. In other embodiments, the nanopore cells 1002 in the nanopore cell array 1000 may be arranged into N groups in a different manner. For example, some groups may have more nanopore cells than other groups. In some embodiments, nanopore cells in every other row may be in the same group. In some embodiments, nanopore cells in alternating pairs of rows may be in the same group. In some embodiments, nanopore cells in one group may be in the same region. In some embodiments, nanopore cells in one group may not be in the same region and may be separated by nanopore cells in other groups.

The counter electrode of each nanopore cell 1002 in the nanopore cell array 1000 may be connected to a common V signal (not shown), which may be a constant voltage level. The working electrodes of the nanopore cells 1002 in each group of the N groups may be connected to a common V signal (1030), where the V signals for the N groups (i.e., V 1 , V 2 , ..., V N ) may be independently applied to the N groups and may be in different phases relative to each other. For example, the V signals for the N groups may come from the same signal source but may be delayed differently by delay lines or gates. The delay allows sampling to be primarily during the bright period, as illustrated in FIG. 11 below. In this way, a more granular control can be achieved by receiving more groups of nanopore cells with different V<pre> signals. Because the grouping is performed electrically by applying a single V<pre> signal to the nanopore cells in a group, the grouping can be scalable and dynamically configurable when the working electrodes of the nanopore cells are independently addressable at the subgroup level or at the cell level.

In some implementations, each nanopore cell may include a switch. The switch may be connected to switch 401 of FIG. 4, for example, upstream of switch 401 or in parallel with switch 401, but with a coordinated control signal. The switch may selectively connect the working electrode of the nanopore cell (and voltage signal V<pre>405) to a high voltage level or a low voltage level. For example, the switch may be controlled by an AC control signal, such as a square wave or a rectangular wave signal, such that the working electrode may be connected to the high voltage level during a portion of a cycle of the AC control signal, and may be connected to the low voltage level during another portion of the cycle. In some embodiments, the switch may be implemented using two switches controlled by inverse control signals, where one switch may be configured to connect the working electrode to the high voltage level and the other switch may be configured to connect the working electrode to the low voltage level. The AC control signal may be a digital signal, such as a digital clock signal. The high voltage level may be higher than the common signal V, and the low voltage level may be lower than the common signal V. As such, an AC signal V may be effectively applied to the nanopore cell.

Different V<pre>signals can be applied to different nanopore cells by applying different digital AC control signals (e.g., with different phase delays) to the nanopore cells. Some nanopore cells can receive digital AC control signals with the same phase to form a group of the N groups of nanopore cells. In this way, a group can include one or more nanopore cells, and the grouping of the nanopore cells can be more flexible and dynamic. For example, the grouping can be dynamically changed by modifying the digital AC control signals applied to the nanopore cells, and nanopore cells that are not in the same neighborhood can form a group.

In some implementations, the nanopore sensor chip may include two or more different fluidic channels above the nanopore cells of the nanopore sensor chip. The nanopore cells in the nanopore sensor chip may be grouped based on the fluidic channels they are in. For example, nanopore cells in different fluidic channels may be assigned to different groups. In some implementations, nanopore cells may be grouped into two or more fluidic channels. A different AC signal V may then be used to drive the counter electrodes of nanopore cells in a different group. For example, the AC signals for driving the counter electrodes of nanopore cells in different groups may have different phases or delays. As a result of the different phases of the V<líq> signals, the nanopore cells in different groups may be in the bright period at different times, and thus the outputs of the nanopore cells in different groups can be sampled at different times by a shared sampling circuit.

B. AC signals from different groups of cells having different phases

FIG. 11 illustrates example AC signals (V<pre>) for a nanopore cell array, such as nanopore cell array 1000, in accordance with certain aspects of the present disclosure. The nanopore cells in the nanopore cell array 1000 having M rows may be arranged into N groups. FIG. 11 includes a plurality of graphs, each graph showing the Ca signal applied to a group of cells in the N groups and corresponding sample points. The horizontal axis of FIG. 11 represents time during the sequencing process.

As shown in FIG. 11, the counter electrode of each nanopore cell in the nanopore cell array 1000 may be connected to a common V<liq> signal, which may be a constant voltage level. The working electrodes of the nanopore cells in each group of the N groups may be connected to a V<pre> signal, where the V<pre> signals for the N groups (i.e., V<pre>1, V<pre>2, ..., V<pre>N) may be in different phases relative to each other.

In some embodiments, the V<pre> signals for the N groups may each be incrementally delayed relative to each other by a period of time approximately equal to the bright period. In the example shown in FIG. 11 , the N V<pre> signals are rectangular AC signals that alternate between a high voltage level and a low voltage level. The V<pre> signals are delayed relative to each other such that when the nanopore cells in one group are in the bright period (e.g., when V<liq> is less than V<pre>), the nanopore cells in other groups are in the dark period.

For example, for the nanopore cells in group 1, during the bright period, the signal V<pre>1 may be at the high voltage level which may be greater than the constant V<liq>, and the integrating capacitor in each nanopore cell in group 1 that is controlled by V<pre>1 may first be precharged to the high voltage level of V<pre>1. The integrating capacitor may then be disconnected from V<pre>1, and discharged by the low level signal V<liq> through the nanopore. The discharge rate depends on the resistance of the nanopore, which may be varied when marks of different structures and sizes are forced into the nanopore barrel as described above. The voltage level of the integrating capacitor may be measured by the sampling and conversion circuit (e.g., an ADC) after the integrating capacitor has discharged for a selected period of time. One or more samples may be captured from a nanopore cell in this manner during the bright period.

When the nanopore cells in group 1 driven by V<pre>1 are in a bright period of width Tb, the nanopore cells in groups 2-N driven by signals V<pre>2 to V<pre>N, respectively, may be in a dark period. During this time period Tb, M/N, instead of M, nanopore cells in a column can be attended to by an ADC. Thus, to capture K samples for each nanopore cell during the time period Tb, an ADC with a sampling rate of (MxK/Tb)/N can be used. In other words, an ADC with a sampling rate of MxK/Tb can capture KxN (instead of K) samples for each nanopore cell during the time period Tb. Consequently, each nanopore cell can be sampled at a faster rate (e.g., N times faster) and can therefore detect events that have shorter durations.

After the V<pre>1 signal alternates to the low voltage level, the nanopore cells in group 1 may enter the dark period. During the dark period, the V<pre>1 signal may be at the low voltage level which may be lower than the constant V<liq> level, and labels associated with the nucleotides may be expelled from the nanopores. In various embodiments, no data samples may be captured during the dark period, or one or more data samples may be captured at the end (or beginning) of the dark period in each AC cycle, e.g., for normalization purposes. To further limit sampling in a dark period, only some dark periods may be sampled, e.g., every nth dark period, such as every 8th dark period. To capture a data sample in the dark period, the integrating capacitor in each nanopore cell in group 1 that is controlled by V<pre>1 can first be precharged to the low voltage level of V<pre>1. The integrating capacitor can then be disconnected from V<pre>1, and charged by the V<liq> signal across the nanopore. The charging rate depends on the nanopore resistance as described above.

After the signal V<pre>1 alternates to the low voltage level, the signal V<pre>2 may alternate from the low voltage level to the high voltage level such that the nanopore cells in group 2 that are controlled by the signal V<pre>2 may enter the bright period, and data samples from the nanopore cells in group 2 may be captured by the shared sampling and conversion circuit. As described above, multiple data samples may be captured for each nanopore cell in group 2 during the bright period, and one or more data samples may be captured from each nanopore cell in group 2 at the end of a dark period during one or more AC cycles for normalization purposes.

The nanopore cells in each of groups 3 to N may enter the bright period sequentially, and multiple data samples may be captured from each of the nanopore cells in each group by the shared sampling and conversion circuit in the manner described above. After the nanopore cells in group N enter the dark period from the bright period, the nanopore cells in group 1 may again enter the bright period in a new AC cycle for sequencing data sampling.

FIG. 12 illustrates example data samples captured from nanopore cells in a column of a nanopore cell array, such as nanopore cell array 1000, in accordance with certain aspects of the present disclosure. The horizontal axis of FIG. 12 represents time during the sequencing process. The gray boxes in the diagram indicate row selection events. The column of the nanopore cell array includes M nanopore cells, each in a different row. The M nanopore cells are organized into N different groups, with M/N nanopore cells in each group. When the nanopore cells in group 1 (nanopore cells in rows 0 to M/N-1) subjected to V<pre>1 are in the bright period Tb, the nanopore cells in groups 2 to N driven by signals V<pre>2 to V<pre>N, respectively, may be in the dark period. Therefore, during the bright period Tb, only the outputs from the nanopore cells in row 0 to M/N-1 can be captured by the ADC serving the column.

Each of the nanopore cells in group 1 may be precharged to the high signal level V<pre>1, and discharged by the signal V<liq> through the nanopore. After a selected discharge time, the ADC may capture a data sample for the nanopore cell in row 0, a data sample for the nanopore cell in row 1, ..., and a data sample for the nanopore cell in row M/N-1. After each cell in the column belonging to group 1 has been sampled once, each of the nanopore cells in group 1 may be precharged again to the high signal level V<pre>1, and discharged by the signal V<liq> through the nanopore. After the selected discharge time, the ADC may capture a second data sample for the nanopore cell in row 0, a second data sample for the nanopore cell in row 1, ..., and a second data sample for the nanopore cell in row M/N-1. The sequencing process may be repeated to capture multiple samples from each of the M/N nanopore cells in group 1 during the bright period. Thus, for an ADC with a sampling rate of M<x>K/T<b>, a total of NxK samples may be captured from each of the M/N cells in group 1 during the bright period T<b>, compared to K samples captured from each nanopore cell during the bright period Tb illustrated in FIG. 9. Therefore, compared to the nanopore cells in the 800 nanopore cell array, each nanopore cell in the 1000 nanopore cell array can be measured N times faster without using a faster sampling and conversion circuit, and therefore events having shorter durations can be detected.

Similarly, when the nanopore cells in group 2 (or any of groups 3 to N) are in the bright period and the nanopore cells in other groups are in the dark period, a total number of NxK samples can be captured from each of the M/N cells in group 2 (or any of groups 3 to N) during the bright period T<b>.

In this way, the sampling and data conversion circuit can sample and convert the output signals from each nanopore cell in the nanopore cell segment at a higher sampling rate by serving only a portion of the nanopore cells in a column at a given time, even if the overall speed of the sampling and data conversion circuit is not changed. Therefore, events with shorter durations can be detected.

Additionally or alternatively, the frequency of the AC control signal (e.g., V<pre>) can be increased with or without increasing the number of samples captured during the bright period. As a result, sequencing a polymer molecule with a given number of units (e.g., bases) can take a shorter period of time due to the shorter AC cycle. Furthermore, because the effective sampling rate is higher for each nanopore cell with the shorter AC cycle, events with shorter durations can be detected.

FIGS. 11 and 12 illustrate embodiments where there may be no overlap between the bright periods of different V<pre>signals for different groups of nanopore cells. Such embodiments may occur when the bright period of each AC control signal is shorter than the AC cycle period divided by the number of groups N, i.e., the duty cycle of the AC control signal is no greater than 1/N. For example, when the nanopore cells in the nanopore cell array are arranged in two groups, and the duty cycle of the AC control signal is no greater than 50%, i.e., the bright period is equal to or shorter than the dark period, no overlap may occur between the bright periods of the V<pre>signals for the two groups of nanopore cells. Although the V<pre>signals for different groups are shown in FIGS. 11 and 12 have some similar properties (e.g., the same voltage levels, duty cycle, and cycle time) and can be derived from the same signal source by different delays, the V<pre>signals for different groups can be independent of each other because the working electrode of each nanopore cell can be independent of the working electrodes of other nanopore cells. Therefore, the V<pre>signals can have different voltage levels, duty cycles, cycle times, and phases.

As described above, in some implementations, each nanopore cell may include a switch, which may be controlled by an AC control signal to alternately connect the working electrode of the nanopore cell (and V<pre>) to a high voltage level and a low voltage level. The high voltage level may be higher than the common V<liq> signal, and the low voltage level may be lower than the common V<liq> signal. Thus, V<pre> signals with different phases may be efficiently applied to the working electrodes of different groups of nanopore cells or of different individual nanopore cells using digital AC control signals with different phases for the switches.

As described above, in some implementations, the nanopore cells in the nanopore sensor chip may be grouped based on the fluidic channels they are in, and a different AC signal V may be used to drive the counter electrodes of the nanopore cells in a different group, rather than using a different AC signal V for each group as described with respect to FIG. 11. In such implementations, the V signals for different groups may be delayed differently, similar to the manner in which the V signals are configured in FIG. 11. The outputs of the nanopore cells in different groups may be sampled at different times by a shared sampling circuit (e.g., ADC) in a manner similar to the manner in which the nanopore cells are sampled as described with respect to FIG. 12.

C. Adaptive and selective sampling

In some implementations, the V<pre>signals may be configured such that there may be an overlap period between the bright periods of different V<pre>signals applied to different groups of nanopore cells. In such implementations, the data sampling and conversion circuit or a control circuit may be configured to determine which group of nanopore cells to sample from and convert the output voltage signals during each overlap period on different AC cycles.

FIG. 13 shows example control signals (V<pre>) for a nanopore cell array, such as nanopore cell array 1000, in accordance with certain aspects of the present disclosure. The horizontal axis of FIG. 13 represents time during the sequencing process. As shown in FIG. 13, the counter electrode of each nanopore cell in the nanopore cell array 1000 may be connected to a common V<liq> signal, which may be a constant voltage level. The working electrodes of the nanopore cells in each group of the N groups may be connected to a V<pre> signal, where the V<pre> signals for the N groups (i.e., V<pre>1, V<pre>2, ..., V<pre>N) are in different phases with respect to each other. For example, when the duty cycle of the V<pre>signals is greater than 1/N, one or more of the V<pre>signals for the N groups can each be incrementally delayed relative to the others by a period of time shorter than the bright period. As a result, there can be an overlap period between the bright periods of different V<pre>signals applied to different groups of nanopore cells. An advantage of such an implementation is that duty cycles with a bright period greater than 50% can be used, or the cells can be divided into more than two groups and controlled by more than two signals with different phases.

During the non-overlapping bright period, each nanopore cell in a group of the nanopore cell array 1000 that is in the bright period may be sampled at a higher rate (as described above with respect to FIGS. 11 and 12) than the nanopore cell shown in FIG. 8. In some cases, during the overlap period, the sampling and data conversion circuit or a control circuit may dynamically determine the group(s) of nanopore cells to be sampled, while ignoring output signals from other group(s) of nanopore cells that are in the overlapping bright period. In some cases, during the overlap interval, the sampling rate of nanopore cells in different groups in the bright period may be reduced since nanopore cells from more than one group are in the bright period. For example, in some cases, the sampling rate of nanopore cells in different groups during the bright period may be at an equal but reduced rate relative to the sampling rate when only one group is in a bright period. In other cases, the sampling rates of nanopore cells in different groups during the bright period may be at reduced and different rates.

D. Advantages

The techniques described in the present disclosure make it possible to control the nanopore cells at a finer granularity, such as at an individual cell level or at a group level, rather than applying a common control signal to all nanopore cells. As such, the number of cells in the bright period can be more constant over time, and the sampling and conversion rate for each cell in the bright period can be increased without changing the overall speed of the data sampling and conversion circuit, because the available resources are utilized more efficiently at any given time.

In addition to increasing the effective sampling rate for each nanopore cell to detect events that have short durations and reducing sequencing time as described above, other advantages can be achieved using the techniques disclosed herein. For example, the bandwidth of the data sampling and conversion circuitry can be fully utilized at any given time to capture data samples that are useful for sequencing. Therefore, it may be possible to develop a nanopore sensor chip with a higher density or a greater number of cells. Additionally or alternatively, with reduced sampled data captured from cells in the dark period, the amount of data to be transported from the nanopore sensor chip and processed by subsequent storage or processing circuitry can be reduced, which can reduce the cost of the sequencing system because circuitry with lower performance (e.g., speed or bandwidth) or capacity (e.g., memory space or data channels) can be used.

Furthermore, because some nanopore cells are in the dark period while other nanopore cells are in the bright period for the same amount of time, and because a given V<liq> is applied to (shared by) the counter electrodes of all cells, the total current at the counter electrode can be at least partially reduced at any given time. This is caused by the opposite polarities of the dark-period cell current and the bright-period cell current, where electrons flowing into the counter electrode and electrons flowing away from the electrode can cause the net current at the counter electrode to be reduced. Furthermore, due to the AC nature of the V<pre> signal, the current at the counter electrode and the working electrode for each cell can also be balanced over time.

In some implementations, instead of being a constant voltage level, the signal V<liq> applied to the counter electrodes may also be an AC signal, but at a lower frequency than the signal V<pre> applied to the working electrodes. In this way, even if there is some imbalance between the cell current in the dark period and the cell current in the bright period (e.g., because the duty cycle is different from 50% and a number of nanopore cell groups in the dark period may be different from a number of nanopore cell groups in the bright period) at a given time, the overall current at the counter electrode may be balanced over time. As such, the voltage drop across the counter electrode and thus the output voltage offset may be reduced.

V. ADC Input Interval Control

In many cases, the voltage levels across the integrating capacitor (e.g., integrating capacitor 408 (ncon)) to be measured can be grouped within certain smaller intervals. Therefore, the dynamic range of an ADC may not be fully utilized if the ADC input range is fixed. To fully utilize the ADC's dynamic range, the ADC input range can be dynamically changed by adaptively changing the ADC reference levels based on the estimated voltage level to be measured.

In an ADC, the full-scale input range and the ADC common-mode voltage may depend on the ADC reference levels, such as the positive reference level (V<refp>) and the negative reference level (V<refn>). The common-mode voltage may be the average of V<refp> and V<refn>. When a signal to be sampled by the ADC is at a voltage level near Vrefn, the ADC input may be close to zero scale, that is, the ADC output may represent a value close to the lowest possible value; the exact output code may depend on the ADC coding scheme, which may include, for example, straight binary, shifted binary, two's complement, and so on.

When a signal to be sampled by the ADC is at a voltage level near Vrefp, the ADC input can be close to full scale, and the ADC output can represent a value close to the highest possible value. To fully utilize the dynamic range of the ADC (i.e., the range of signal amplitudes that the ADC can resolve), it is desirable for the input signal level to be more completely distributed between Vrefp and Vrefn, rather than bunched up within certain smaller ranges. For an 8-bit ADC, if the input signal level is between 0 V and 1 V, Vrefp can be set to 1 V and Vrefn can be set to 0 V; and the ADC can differentiate two signal levels with a difference greater than about 4 mV. If the input signal level is between 0.25 V and 0.5 V, Vrefp can be set to 0.5 V and Vrefn can be set to 0.25 V; and the ADC can differentiate two signal levels with a difference greater than about 1 mV.

However, as shown in FIG. 11 or 13, in some cases, the voltage levels of the integrating capacitors to be sampled by the ADC may not be distributed over the full range between the low voltage level and the high voltage level of the V<pre> signals. Therefore, with fixed reference levels (V<refp> and Vrefn) of the ADC, the dynamic range of the ADC may not be fully utilized since the output codes may include only a portion of all possible codes (e.g., 256 different codes for an 8-bit ADC), or in other words, the signal levels may not be resolved to the maximum possible resolution of the ADC.

FIG. 14A shows fixed reference levels for an ADC on a nanopore sensor chip. As shown in FIG. 14A, the voltage levels 1430 of the integrating capacitors to be sampled by the ADC may be near the low voltage level 1410 of V<pre> or the high voltage level 1420 of V<pre>. Thus, to include all of these voltage levels in the input range of the ADC, V<refp> for the ADC may be set to a level slightly above the high voltage level 1420 of V<pre> to avoid saturation (e.g., caused by overshoot) and/or distortion near the full scale input. Vrefn for the a Dc may be set to a level slightly below the low voltage level 1410 of V<pre>. However, no voltage levels of the integrating capacitors are located in the middle portion (shown as the stamped region 1440) of the input range. Therefore, the middle range of the ADC's full-scale input range may not be used at all, and the ADC's dynamic range may not be fully utilized. To fully utilize the ADC's dynamic range, the ADC reference levels can be dynamically changed so that the ADC input range does not include the stamped region 1440.

FIG. 14B illustrates variable reference levels for an ADC on a nanopore sensor chip. The reference levels include reference levels Vrefp and Vrefn, which determine the full-scale input range and common-mode voltage of the ADC. The reference levels Vrefp and Vrefn may change with the V signal, which causes the nanopore cell to enter bright and dark periods. Therefore, the full-scale input range and/or common mode of the ADC may be different during the bright and dark periods. In this way, the output voltage signals of the nanopore cells can be better fit within the full-scale input range of the ADC, rather than being distributed only within certain narrow ranges of the ADC's full-scale input range.

For example, as shown in FIG. 14B, to capture a data sample 1430 in the dark period, Vrefp may be set to a level 1450 below V<liq>. Vrefn may be set to a level 1460 below the low voltage level 1455 of V<pre>, such that the ADC input range (shown as the shaded region) only includes regions below V<liq> and between the level 1450 and 1460, but does not include the region above the level 1450 where no voltage levels of the integrating capacitors lie within. To capture data samples in the bright period, Vrefp may be set to a level 1470 above the high voltage level 1475 of V<pre>, and Vrefn may be set to a level 1480 above V<liq>. Therefore, the ADC input range (shown as the shaded region) can only include the regions above V<líq> and between the 1470 and 1480 levels, but does not include the region below the 1480 level where no voltage level of the integrating capacitors lies within. The same reference configuration can be used during the dark period 1490 of a cluster when no data samples are being collected from nanopore cells in the cluster, and data samples are being collected from nanopore cells in other clusters that are in the bright period.

In this way, the input range (and common-mode input) of the ADC can be dynamically changed to include only the ranges within which the voltage levels of the integrating capacitors can be found. Thus, voltage levels within the input range can be resolved with the highest possible resolution of the ADC.

VI. Example procedure for increasing the sampling rate per cell

FIG. 15 is a flowchart 1500 illustrating an exemplary method of nucleic acid sequencing using a sensor including an array of cells, in accordance with certain aspects of the present disclosure. The method illustrated by flowchart 1500 may apply AC signals with different phases to different groups of nanopore cells in a nanopore sensor chip. As a result, when some nanopore cells are in the dark period, other nanopore cells are in the bright period and are being sampled by a shared sampling and conversion circuit. Therefore, the method may reduce the number of cells served by the sampling and conversion circuit at any instant in time and therefore increase the sampling rate per cell without using a faster sampling and data conversion circuit.

At block 1510, a first circuit, such as circuit 622 of FIG. 6, may apply a first AC signal to a first group of cells of a cell array in a nanopore sensor chip. As described above with respect to FIG. 10, the array of cells in the nanopore sensor chip may be organized into multiple groups, where each group may be independent of another group and have a corresponding circuit for applying an AC signal to the first group of nanopore cells. The AC signal may be a rectangular wave and may have a selected duty cycle. The AC signal may be applied to a working electrode of each nanopore cell in the group, for example, working electrode 402 of nanopore cell 400 in FIG. 4 or working electrode 602 in FIG. 6.

At block 1520, a second circuit may apply a second AC signal to a second group of cells in the cell array. In some embodiments, the first AC signal and the second AC signal may have different phases and may be derived from the same signal source by different delays. In some embodiments, the first AC signal and the second AC signal may also differ in at least one of amplitude, duty cycle, or frequency.

At block 1530, during a first portion of the first AC signal, the first group of cells may be in the bright period, and an analog-to-digital converter may sample the output signals from the first group of cells. During the same time period, the second group of cells may be in the dark period due to the phase difference between the first AC signal and the second AC signal, and the output signals from the second group of cells may not be sampled by the analog-to-digital converter. Therefore, during the first portion of the first AC signal, the analog-to-digital converter may only serve the first groups of cells.

At block 1540, during a second portion of the first AC signal, the first group of cells may be in the dark period and the analog-to-digital converter may not sample the output signals from the first group of cells. During the same time period, the second group of cells may be in the bright period and the output signals from the second group of cells may be sampled by the analog-to-digital converter. Thus, during the second portion of the first AC signal, the analog-to-digital converter may only serve the second groups of cells. In some embodiments as shown in FIG. 11 , there may be no overlap between the bright period of the first group of cells and the bright period of the second group of cells. In other embodiments as shown in FIG. 13, the bright period of the first group of cells and the bright period of the second group of cells may partially overlap, and different schemes may be used to determine how the output signals of the two groups of cells may be sampled by the analog-to-digital converter, as described above with respect to FIG.

13.

It should be noted that although FIG. 15 depicts data processing as a sequential procedure, many of the operations can be performed in parallel or simultaneously. Furthermore, the order of the operations can be rearranged. An operation may have additional steps not shown in the figure. Some operations may be optional and therefore omitted in various embodiments. Some operations described in one block may be performed in conjunction with operations in another block. For example, some operations may be performed in parallel. Furthermore, the embodiments of the procedures may be implemented in hardware, computer software, firmware, middleware, microcode, hardware description languages, or any combination thereof.

VII. Computer system

Any of the computing systems mentioned herein may utilize any suitable number of subsystems. Examples of such subsystems are shown in FIG. 16 in computing system 10. In some embodiments, a computing system includes a single computing apparatus, where the subsystems may be the components of the computing apparatus. In other embodiments, a computing system may include multiple computing apparatuses, each being a subsystem, with internal components. A computing system may include desktop and laptop computers, tablets, mobile phones, and other mobile devices.

The subsystems shown in FIG. 16 are interconnected by a system bus 75. Additional subsystems are shown, such as a printer 74, keyboard 78, storage device(s) 79, monitor 76, which couples to the display adapter 82, and others. Peripherals and input/output (I/O) devices, which couple to the I/O controller 71, may be connected to the computer system by any number of means known in the art, such as the input/output (I/O) port 77 (e.g., USB, FireWire®). For example, the I/O port 77 or the external interface 81 (e.g., Ethernet, Wi-Fi, etc.) may be used to connect the computer system 10 to a wide area network such as the Internet, a mouse input device, or a scanner. Interconnection via system bus 75 allows central processor 73 to communicate with each subsystem and control the execution of a plurality of instructions from system memory 72 or storage device(s) 79 (e.g., a fixed disk, such as a hard drive, or optical disk), as well as the exchange of information between subsystems. System memory 72 and/or storage device(s) 79 may incorporate a computer-readable medium. Another subsystem is a data collection device 85, such as a camera, microphone, accelerometer, and the like. Any of the data mentioned herein may be sent from one component to another component and may be sent to the user.

A computer system may include a plurality of the same components or subsystems, for example, connected to one another by the external interface 81, by an internal interface, or by removable storage devices that can be connected and removed from one component to another. In some embodiments, the computer systems, subsystems, or apparatus may communicate over a network. In such cases, one computer may be considered a client and another computer a server, each of which may be part of a single computer system. A client and a server may each include multiple systems, subsystems, or components.

Aspects of the embodiments may be implemented in the form of control logic using hardware (e.g., an application-specific integrated circuit or field-programmable gate array) and/or using computer software with a processor generally programmable in a modular or integrated manner. As used herein, a processor includes a single-core processor, a multi-core processor on a single integrated chip, or multiple processing units on a single circuit board or in a network. Based on the disclosure and teachings provided herein, one of skill in the art will know and appreciate other ways and/or methods of implementing embodiments of the present invention using hardware and a combination of hardware and software.

Any of the computer program components or functions described in this application may be implemented as computer program code for execution by a processor using any suitable computer language such as, for example, Java, C, C++, C#, Objective-C, Swift, or a programming language such as Perl or Python using, for example, conventional or object-oriented techniques. The computer program code may be stored as a series of instructions or commands on a computer-readable medium for storage and/or transmission. A suitable non-transitory computer-readable medium may include random access memory (RAM), read-only memory (ROM), a magnetic medium, such as a hard drive or a floppy disk, or an optical medium, such as a compact disc (CD) or DVD (digital versatile disc), flash memory, and the like. The computer-readable medium may be any combination of such storage or transmission devices.

Such programs may also be encoded and transmitted using carrier signals adapted for transmission over wired, optical, and/or wireless networks conforming to a variety of protocols, including the Internet. As such, a computer-readable medium may be created using a data signal encoded with such programs. Computer-readable media encoded with the program code may be packaged in a compatible device or may be provided separately from other devices (e.g., via an Internet download). Any such computer-readable medium may reside on or within a single computer product (e.g., a hard drive, a CD, or an entire computer system) and may be present on or within different computer products within a system or network. A computer system may include a monitor, printer, or other display suitable for providing any of the output mentioned herein to a user.

Any of the methods described herein can be performed in whole or in part by a computer system including one or more processors, which can be configured to perform the steps. Thus, embodiments useful for understanding the invention can relate to computer systems configured to perform the steps of any of the methods described herein, with different components potentially performing a respective step or group of steps. Although presented as numbered steps, the steps of the methods herein can be performed concurrently or in a different order. Additionally, portions of these steps can be combined with portions of other steps of other methods. Furthermore, all or portions of a step can be optional. Additionally, any of the steps of any of the methods can be performed with modules, units, circuits, or other means for performing these steps.

The specific details of particular embodiments may be combined in any suitable manner without departing from the scope of the embodiments of the invention. However, other embodiments of the invention may relate to specific embodiments related to each individual aspect, or specific combinations of these individual aspects.

The foregoing description of exemplary embodiments of the invention has been presented for purposes of illustration and description. It is not intended to be exhaustive or to limit the invention to the precise form described, and many modifications and variations are possible in light of the foregoing teaching.

A reference to "a," "an," or "the" is intended to mean "one or more," unless specifically stated otherwise. The use of "or" is intended to mean "inclusive or," not "exclusive or," unless specifically stated otherwise. Reference to a "first" component does not necessarily require the provision of a second component. Furthermore, reference to a "first" or "second" component does not limit the component referenced to a particular location unless expressly stated.

Claims (12)

1. A sensor chip for nucleic acid sequencing, the sensor chip comprising: a first set of cells suitable for containing a nanopore arranged in N groups, N being an integer of two or more, each cell having a cell electrode configured to provide an AC signal to the cell for characterizing a nucleotide of a nucleic acid molecule; and at least N circuits, each of the at least N circuits configured to provide a separately configurable AC signal to one or more cell electrodes of a respective group of one or more cells of the N groups, wherein the N circuits are configured to provide AC signals with different phases to different groups of one or more cells in the N groups. 2. The sensor chip of claim 1, wherein each cell of the first set of cells includes: a common electrode configured to provide a second signal to the cell, the common electrode being shared by two or more cells of the first set of cells. 3. The sensor chip of claim 2, wherein each cell of the first set of cells further includes a nanopore positioned between the cell electrode and the common electrode, wherein the nanopore is configured to receive a label connected to a nucleotide and act as a variable resistor between the cell electrode and the common electrode. 4. The sensor chip of claim 2, wherein: Each cell of the first set of cells includes an integrating capacitor coupled to the cell electrode; and Each circuit of the at least N circuits is configured to precharge the integrating capacitors of a respective group of one or more cells of the N groups with the AC signal. 5. The sensor chip of claim 4, wherein the pre-charged integrating capacitors of a group of one or more cells are configured to be charged or discharged by the second signal. 6. The sensor chip of claim 2, further comprising a sampling circuit coupled to the first set of cells, wherein: The N circuits are configured to provide different AC signals to the N groups; and The sampling circuit is configured to selectively sample voltage signals from one or more groups of one or more cells of the N groups based on the AC signals provided to the N groups. 7. The sensor chip of claim 1, further comprising: a second set of cells arranged in N groups, each cell of the second set of cells having a cell electrode configured to provide an AC signal to the cell to characterize a nucleotide of a nucleic acid molecule, wherein each of the at least N circuits is configured to provide a separately configurable AC signal to one or more cell electrodes of a respective group of the N groups of the first set of cells and to one or more cell electrodes of a respective group of the N groups of the second set of cells. 8. The sensor chip of claim 1 further comprising two or more fluidic channels, wherein the cells in different fluidic channels are arranged in different groups of the N groups. 9. The sensor chip of claim 1, wherein: Each circuit of the at least N circuits includes a switch, the switch configured to alternately connect a cell electrode to two voltage levels; and Each switch is controlled by an AC control signal. 10. The sensor chip of claim 1, wherein: Each cell of the first set of cells includes a switch, the switch configured to alternately connect a cell electrode to two voltage levels; Each switch is controlled by an AC control signal; Each circuit of the at least N circuits includes one or more switches of the one or more cells of the respective group; and the one or more switches of the one or more cells in the respective group receive the same AC control signal. 11. A sensor chip for nucleic acid sequencing comprising: a first set of cells suitable for containing a nanopore arranged in N groups, N being an integer of two or more, each cell having a cell electrode configured to provide an AC signal to the cell to characterize a nucleotide of a nucleic acid molecule; an analog-to-digital converter (ADC) coupled to the first set of cells and configured to convert the output signals of the first set of cells; and a control circuit configured to: applying a first AC signal to a first group of cells of the N cell groups; applying a second AC signal to a second group of cells of the N cell groups, wherein the first AC signal and the second AC signal have different phases; and during a first portion of the first AC signal, causing the ADC to convert the output signals of the first group of cells and not convert the output signals of the second group of cells. 12. A nucleic acid sequencing method using a sensor chip including an array of nanopore cells, the method comprising: applying a first AC signal to a first group of cells of the cell array; applying a second AC signal to a second group of cells of the cell array, wherein the first AC signal and the second AC signal have different phases; during a first portion of the first AC signal, sampling, using an analog-to-digital converter (ADC), the output signals of the first group of cells and not sampling the output signals of the second group of cells; and during a second portion of the first AC signal, sampling, using the ADC, the output signals of the second group of cells and not sampling the output signals of the first group of cells.