EP4172874A4 - NEURON USING POSTULATES - Google Patents
NEURON USING POSTULATES Download PDFInfo
- Publication number
- EP4172874A4 EP4172874A4 EP21833644.4A EP21833644A EP4172874A4 EP 4172874 A4 EP4172874 A4 EP 4172874A4 EP 21833644 A EP21833644 A EP 21833644A EP 4172874 A4 EP4172874 A4 EP 4172874A4
- Authority
- EP
- European Patent Office
- Prior art keywords
- postulates
- neuron
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/544—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation
- G06F7/5443—Sum of products
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N20/00—Machine learning
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N3/00—Computing arrangements based on biological models
- G06N3/02—Neural networks
- G06N3/04—Architecture, e.g. interconnection topology
- G06N3/049—Temporal neural networks, e.g. delay elements, oscillating neurons or pulsed inputs
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N3/00—Computing arrangements based on biological models
- G06N3/02—Neural networks
- G06N3/06—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
- G06N3/063—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/54—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using elements simulating biological cells, e.g. neuron
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Life Sciences & Earth Sciences (AREA)
- Biomedical Technology (AREA)
- Health & Medical Sciences (AREA)
- General Engineering & Computer Science (AREA)
- Computing Systems (AREA)
- Biophysics (AREA)
- Software Systems (AREA)
- General Health & Medical Sciences (AREA)
- Molecular Biology (AREA)
- Artificial Intelligence (AREA)
- Evolutionary Computation (AREA)
- Mathematical Physics (AREA)
- Data Mining & Analysis (AREA)
- Neurology (AREA)
- Computational Linguistics (AREA)
- Computer Hardware Design (AREA)
- Computational Mathematics (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- Computer Vision & Pattern Recognition (AREA)
- Medical Informatics (AREA)
- Memory System (AREA)
- Advance Control (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Compression, Expansion, Code Conversion, And Decoders (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US16/915,039 US11636323B2 (en) | 2020-06-29 | 2020-06-29 | Neuromorphic operations using posits |
| US16/997,599 US12159219B2 (en) | 2020-08-19 | 2020-08-19 | Neuron using posits |
| PCT/US2021/039326 WO2022005944A1 (en) | 2020-06-29 | 2021-06-28 | Neuron using posits |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| EP4172874A1 EP4172874A1 (en) | 2023-05-03 |
| EP4172874A4 true EP4172874A4 (en) | 2024-07-17 |
Family
ID=79314886
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| EP21833816.8A Pending EP4172875A4 (en) | 2020-06-29 | 2021-06-01 | NEUROMORPHIC SURGERIES WITH LOCATIONS |
| EP21833644.4A Pending EP4172874A4 (en) | 2020-06-29 | 2021-06-28 | NEURON USING POSTULATES |
Family Applications Before (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| EP21833816.8A Pending EP4172875A4 (en) | 2020-06-29 | 2021-06-01 | NEUROMORPHIC SURGERIES WITH LOCATIONS |
Country Status (4)
| Country | Link |
|---|---|
| EP (2) | EP4172875A4 (en) |
| KR (2) | KR102813842B1 (en) |
| CN (2) | CN115668224B (en) |
| WO (2) | WO2022005673A1 (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US12079733B2 (en) * | 2020-06-23 | 2024-09-03 | Sandisk Technologies Llc | Multi-precision digital compute-in-memory deep neural network engine for flexible and energy efficient inferencing |
| CN116432711B (en) * | 2023-02-13 | 2023-12-05 | 杭州菲数科技有限公司 | Hardware implementation method and device of SiLU activation function and computing equipment |
| KR102840183B1 (en) * | 2024-03-21 | 2025-08-01 | 경희대학교 산학협력단 | Ann computing apparatus and ann computing method for processing data format for ann |
| CN120670371B (en) * | 2025-08-14 | 2025-11-04 | 西安电子科技大学杭州研究院 | A POSIT-based in-memory processor and processing method |
Family Cites Families (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6795117B2 (en) * | 2001-11-06 | 2004-09-21 | Candela Microsystems, Inc. | CMOS image sensor with noise cancellation |
| FR2983664B1 (en) * | 2011-12-05 | 2013-12-20 | Commissariat Energie Atomique | ANALOG-DIGITAL CONVERTER AND NEUROMORPHIC CIRCUIT USING SUCH CONVERTER |
| US9830999B2 (en) * | 2014-06-05 | 2017-11-28 | Micron Technology, Inc. | Comparison operations in memory |
| US10169701B2 (en) * | 2015-05-26 | 2019-01-01 | International Business Machines Corporation | Neuron peripheral circuits for neuromorphic synaptic memory array based on neuron models |
| US10885429B2 (en) * | 2015-07-06 | 2021-01-05 | University Of Dayton | On-chip training of memristor crossbar neuromorphic processing systems |
| US10552370B2 (en) * | 2015-10-08 | 2020-02-04 | Via Alliance Semiconductor Co., Ltd. | Neural network unit with output buffer feedback for performing recurrent neural network computations |
| US10360971B1 (en) | 2015-11-02 | 2019-07-23 | Green Mountain Semiconductor, Inc. | Artificial neural network functionality within dynamic random-access memory |
| US10180808B2 (en) | 2016-10-27 | 2019-01-15 | Samsung Electronics Co., Ltd. | Software stack and programming for DPU operations |
| US11222260B2 (en) * | 2017-03-22 | 2022-01-11 | Micron Technology, Inc. | Apparatuses and methods for operating neural networks |
| KR20180111156A (en) * | 2017-03-31 | 2018-10-11 | 에스케이하이닉스 주식회사 | Neuromorphic Device Including a Post-Synaptic Neuron Having a Feed-back Line and A Method for Operating the Neuromorphic Device |
| KR101965850B1 (en) * | 2017-04-26 | 2019-04-05 | 광주과학기술원 | A stochastic implementation method of an activation function for an artificial neural network and a system including the same |
| US11354568B2 (en) * | 2017-06-30 | 2022-06-07 | Intel Corporation | In-memory spiking neural networks for memory array architectures |
| US10956811B2 (en) * | 2017-07-31 | 2021-03-23 | Intel Corporation | Variable epoch spike train filtering |
| JP2019057053A (en) * | 2017-09-20 | 2019-04-11 | 東芝メモリ株式会社 | Semiconductor memory device |
| KR102141385B1 (en) * | 2018-03-08 | 2020-08-05 | 포항공과대학교 산학협력단 | An neuromorphic system with transposable memory and virtual look-up table |
| KR102675781B1 (en) * | 2018-06-27 | 2024-06-18 | 삼성전자주식회사 | Neuromorphic processor and operating method thereof |
| CN111310909B (en) * | 2020-02-24 | 2024-02-13 | 南京大学 | A floating point number conversion circuit |
-
2021
- 2021-06-01 WO PCT/US2021/035125 patent/WO2022005673A1/en not_active Ceased
- 2021-06-01 EP EP21833816.8A patent/EP4172875A4/en active Pending
- 2021-06-01 CN CN202180035602.9A patent/CN115668224B/en active Active
- 2021-06-01 KR KR1020237002393A patent/KR102813842B1/en active Active
- 2021-06-28 KR KR1020237000890A patent/KR102813843B1/en active Active
- 2021-06-28 EP EP21833644.4A patent/EP4172874A4/en active Pending
- 2021-06-28 WO PCT/US2021/039326 patent/WO2022005944A1/en not_active Ceased
- 2021-06-28 CN CN202180034045.9A patent/CN115516463A/en active Pending
Non-Patent Citations (5)
| Title |
|---|
| CHI PING ET AL: "PRIME: A Novel Processing-in-Memory Architecture for Neural Network Computation in ReRAM-Based Main Memory", 2013 21ST INTERNATIONAL CONFERENCE ON PROGRAM COMPREHENSION (ICPC); [INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE.(ISCA)], IEEE, US, 18 June 2016 (2016-06-18), pages 27 - 39, XP032950646, ISSN: 1063-6897, ISBN: 978-0-7695-3174-8, [retrieved on 20160824], DOI: 10.1109/ISCA.2016.13 * |
| HASAN GENC ET AL: "Gemmini: An Agile Systolic Array Generator Enabling Systematic Evaluations of Deep-Learning Architectures", ARXIV.ORG, CORNELL UNIVERSITY LIBRARY, 201 OLIN LIBRARY CORNELL UNIVERSITY ITHACA, NY 14853, 22 November 2019 (2019-11-22), XP081547212 * |
| MIN CHUHAN ET AL: "NeuralHMC: An Efficient HMC-Based Accelerator for Deep Neural Networks", 2019 24TH ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC), ACM, 21 January 2019 (2019-01-21), pages 1 - 6, XP034592916, DOI: 10.1145/3287624.3287642 * |
| See also references of WO2022005944A1 * |
| ZACHARIAH CARMICHAEL ET AL: "Deep Positron: A Deep Neural Network Using the Posit Number System", ARXIV.ORG, CORNELL UNIVERSITY LIBRARY, 201 OLIN LIBRARY CORNELL UNIVERSITY ITHACA, NY 14853, 5 December 2018 (2018-12-05), XP080989217 * |
Also Published As
| Publication number | Publication date |
|---|---|
| EP4172875A1 (en) | 2023-05-03 |
| KR102813842B1 (en) | 2025-05-28 |
| KR20230021140A (en) | 2023-02-13 |
| WO2022005944A1 (en) | 2022-01-06 |
| EP4172875A4 (en) | 2024-08-14 |
| CN115668224A (en) | 2023-01-31 |
| WO2022005673A1 (en) | 2022-01-06 |
| CN115668224B (en) | 2024-06-11 |
| KR102813843B1 (en) | 2025-05-28 |
| EP4172874A1 (en) | 2023-05-03 |
| KR20230027250A (en) | 2023-02-27 |
| CN115516463A (en) | 2022-12-23 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: THE INTERNATIONAL PUBLICATION HAS BEEN MADE |
|
| PUAI | Public reference made under article 153(3) epc to a published international application that has entered the european phase |
Free format text: ORIGINAL CODE: 0009012 |
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| STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: REQUEST FOR EXAMINATION WAS MADE |
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| 17P | Request for examination filed |
Effective date: 20221004 |
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| AK | Designated contracting states |
Kind code of ref document: A1 Designated state(s): AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR |
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| DAV | Request for validation of the european patent (deleted) | ||
| DAX | Request for extension of the european patent (deleted) | ||
| A4 | Supplementary search report drawn up and despatched |
Effective date: 20240619 |
|
| RIC1 | Information provided on ipc code assigned before grant |
Ipc: G06N 3/049 20230101ALN20240613BHEP Ipc: G11C 11/54 20060101ALI20240613BHEP Ipc: G06F 7/544 20060101ALI20240613BHEP Ipc: G06N 3/063 20230101AFI20240613BHEP |