EP2737543A2 - Method for producing a solar cell and solar cell - Google Patents

Abstract

The invention relates to a method for producing a solar cell and to such a cell itself. The solar cell comprises a silicon substrate with a front side, facing the radiation, and a rear side, a first dielectric layer, running along the rear side, a second dielectric layer, running along the side of the first dielectric layer that is facing away from the substrate and consisting of a material from the group comprising silicon nitride, silicon oxide, silicon oxynitride, and a metal layer, extending along the side of the second dielectric layer that is facing away from the substrate. In order to be able to produce the solar cell reproducibly with particularly high efficiency and few process steps, it is proposed that the rear side of the substrate has a gloss value at a 60° irradiation angle of below 80 GU and that the first dielectric layer contains localized negative charges.

Description

 description

Process for producing a solar cell and solar cell

The invention relates to a solar cell, comprising a silicon substrate with the radiation-facing front, which is textured and has an n-doped region, a back having a p-doped region, along the back extending first dielectric layer, a substrate along facing away Side of the first dielectric layer extending second dielectric layer consisting of or containing a material selected from the group consisting of silicon nitride, silicon oxide, silicon oxynitride and a side facing away from the substrate side of the second dielectric layer extending metal layer.

In recent years, a number of attempts have been made and methods developed to improve the efficiency of solar cells, in particular of silicon-based solar cells.

WO 2009/071561 A discloses a MWT (Metal Wrap-Through) PERC (Passivated Emitter Rear Cell), in which a first layer of an oxide such as aluminum oxide is applied to the rear side and a SiNx: H layer as the second layer.

In order to produce a solar cell with consistent passivation, DE 10 2010 017 155 A provides at least one dielectric layer on the back side of the substrate of the solar cell, which consists of aluminum oxide, aluminum nitride or aluminum oxynitride and a further element. From EP 1489667 A2 and EP 1763086 AI one obtains knowledge about the possibility of increasing the time until the recombination of the free charge carriers and thus the recombination rate and thus again the efficiency, in the side facing away from the light, a dielectric layer between the silicon substrate and the metallization is applied.

EP 1763086 A1 describes the use of a dielectric layer system consisting of Si0 ₂ and an SiN layer deposited thereon for electrical passivation of the solar cell rear side.

One embodiment of the teachings disclosed in EP 1489667 A2 uses a compound comprising Al ₂ O 3 and SiO ₂ for the dielectric passivation of the solar cell backside.

DE 3815 512 A 1 discloses a solar cell comprising a doped semiconductor body containing an n + p junction, which is covered over its entire surface with a contact layer on the rear side. On the back of the semiconductor body, an oxide layer is additionally applied over the entire surface.

The literature on highly efficient solar cell structures based on crystalline silicon has, as an essential feature for achieving high efficiencies, a dielectric passivation of the surfaces, wherein only at defined locations a connection between a metal contact and silicon is produced (see MA Green, Silicon Solar Cells, 1995).

While metallization is necessarily always patterned on the front side, in industrial solar cells the backs are often made with a full-surface connection of silicon and metal to form a back surface field (BSF) to reduce recombination. Major obstacles in the industrial implementation of processes to increase the efficiency by dielectric passivation of the cell backside are the high cost of the additional manufacturing steps required for this, as well as the difficulty in industrial processes to achieve a sufficient electronic quality of the resulting layers and contacts.

Suppression of surface recombination in silicon solar cells occurs through two mechanisms. By chemical saturation of electronic bonds of silicon, they are passivated, i. they do not cause electronic recombination. For this purpose, layers that have an electronic band gap, ie semiconductors or dielectrics, are suitable.

By applying electrically charged layers, the concentration of a charge carrier type on the surface can also be greatly reduced due to their field effect. This also suppresses recombination (field effect passivation). As known in the literature, various dielectrics in contact with silicon form a surface charge, particularly silicon oxide (weak positive), silicon nitride (positive), and aluminum oxide (negative). Depending on the chosen deposition process, this charge may be formed after an annealing step.

In order to be able to passivate the surface, it is first necessary to remove the surface damage resulting from the production process of the wafer. For this purpose, the wafer surface can be etched in an acidic or alkaline solution.

Depending on the method, the etching solution can be adjusted to be polishing or roughening. A particularly smoothly etched surface offers the advantage of a lower recombination, rough surfaces, however, prove to be advantageous for the solar cell front side, since the reflection is reduced.

For monocrystalline silicon, it is advisable to etch the surface of <100> oriented wafers alkaline in such a way that <ll> -oriented facets are formed. This leads to a structure of the surface in the form of pyramids. For multicrystalline silicon, this is also possible, but the grains are then textured unevenly due to their different crystal orientation. Therefore, an acidic isotope is generally used which leads to a more uniform roughening.

The texturing of the front side in combination with the smooth etching of the back side represents the optimum with regard to the solar cell efficiency. However, this combination requires that at least one of the two processes is applied on one side. This represents a considerable investment effort. In general, only one of the two processes will be applied unilaterally; This is also because a mere one-sided removal of the stresses induced by the surface damage leads to a strong bending of the wafer.

In order to produce a back-passivated solar cell, it is necessary that an emitter be formed only on one of the two sides, generally the front side. In the application of dopants from the gas phase, however, this happens initially on both sides. If solid or liquid doping sources are used, this is unilaterally, but it is also to be expected that the doping on the wafer backside will be somewhat bypassed.

To avoid this, the wafer backside can be provided with a protective layer before doping. Mostly, however, in industrial processes, after doping, a layer is removed from the wafer backside, the thickness of which is slightly larger than the penetration depth of the dopant, ie typically between 0.5 and a few μιη.

For electronically passivating the back of the solar cell, a layer is found that offers a favorable combination between field effect passivation and bond saturation. As known from the literature, very good passivation can be produced with silicon oxide, which can be produced by thermal oxidation of the silicon or deposited by CVD methods. However, SiO _x offers little resistance to sintering of the back metal layer in the annealing step required for contact formation. Silicon nitride is much more stable in connection with metals, but due to its high positive charge density it produces an n-type influential n-type inversion layer. In this layer, minority carriers of the base are collected and conducted to the metal contacts, where they are lost by recombination (lit .: Dauwe). Since it contains negative charges, A10 _{x is} a good alternative, but it can not be economically deposited in layer thicknesses that would ensure a sufficient temperature stability. Due to the difficulties described, combinations of these materials appear to be very advantageous, often using SiO _x or A10 _x as the first layer and SiO _x or SiN as the second layer.

WO 2006/097303 A1 describes that a sufficient quality of the surface passivation is achieved only when using very thick layers; Further, the formation of contacts by locally introducing holes into the layers and applying a conductive material to the back surface will be described. Only the front side of the wafer is textured.

DE 100 46 170 A describes a method for contact formation between the back metal layer and silicon, after the application of the metal layer and, if necessary, sintering with metal paste, wherein the designated contact region is locally e.g. is heated by laser radiation, so that the metal penetrates the dielectric layer and connects to the silicon.

Unintentional "parasitic" contacts between Si and the backside metal layer often form in industrial practice, which increase the carrier losses on the back of the cell and thus reduce the efficiency. This happens mainly through the following mechanisms: 1. holes ("punches") in the deposited layers by particles adhering or resting during the coating,

 2. variations in the layer thickness up to holes due to the uneven structure of the surface itself in connection with the chosen deposition method, in particular points with very small thickness in directional deposition,

3. Point-wise or planar detachment of the layers during the deposition or in the subsequent processing, in particular in thermal processes such as contact sintering ("blistering").

At the corresponding points, the parasitic contacts are formed on sintering of a layer of metal on the back of the cell deposited on the passivi. The avoidance of these loss mechanisms takes place according to the classical teaching by the following measures:

Polishing or blank etching the wafer backside by subjecting the wafer to a one-sided etch after a texture step or by masking the back side after a two-sided smooth etch and texturing only the front side,

Application of very thick layers of more than e.g. l O nm or stacking of several layers

The opening of the layer for forming local contacts can be done by the following techniques:

Ablation by laser,

 Masking the surface and local etching,

 Local application of an etching medium followed by thermal activation.

The methods known from the prior art have a large number of necessary process steps. This results in high process costs and fluctuation margins (error propagation) of the efficiency of the solar cells produced. Based on this, the present invention has the object, a method for producing a solar cell and a solar cell in such a way that the solar cells with consistently high efficiency can be reproducibly made with fewer process steps.

To solve the problem, it is essentially, but not by way of limitation, proposed that the back side of the substrate has a gloss value at 60 ° irradiation angle less than 80 GU (gloss units), in particular between 2 GU and 80 GU, preferably in the range between 20 GU and 80 GU and that the first dielectric layer contains fixed negative charges.

According to the invention, a combination of bilateral (substantially) symmetrical texture is provided (characteristic: roughness on the back remains) with deposition of the following layer sequence: {therm. Si0 ₂ (optional)}, Al ₂ 0 ₃ , SiN _x or SiO _x .

Examples:

A. loss of insufficient etch in combination with SiO / SiN layers,

 B. AlO does not avoid parasitic contact (unopened cells),

C. AlO improves rough surface efficiency compared to SiO _x .

A10 _x must be designed in such a way that no "blistering" occurs in combination with the subsequent processing.

The process is carried out in such a way that substantially no increased recombination occurs despite the increased surface area. Roughness reducing etching of the entire back surface occurs exclusively after diffusion, regardless of whether the diffusion is performed on one or both sides. The removal is as high as necessary to remove the diffused layer, so typically greater than 0.5 μπι, but less than, for example, 5 μηι. Due to the contained negative charges, the losses are minimized by parasitic contacts. The layer structure also helps ensure that even on a rough surface as possible no parasitic contacts are formed. Preferred process sequences are the following, where appropriate, process steps can be omitted, replaced or changed in order.

Method I:

A. Provision of silicon wafers with p-doping, multi- or monocrystalline.

B. etching of both surfaces for Sägeschadenentfernung and or texture without separate etching of the back, i.e., the etch-off eliminates.

 C. Diffusion of an n-type dopant at least into the anterior surface.

 D. preferably removal of the phosphorus glass before or after step E.

 E. Removal of Diflfusionsschicht on the wafer back, doing removal between preferably 0.5 μηι and 5 μηι. The etching is carried out such that a gloss value at 60 ° incidence angle is in the range between 20% and 80%. Gloss value is the relationship between direct and diffuse diffusion.

 F. deposition of a negative charge containing dielectric layer on the back in a layer thickness preferably between 5 nm and 100 nm

 G. deposition of a dielectric layer, preferably silicon nitride, on the dielectric layer after step F. in a layer thickness of preferably 40 to 400 nm

 H. Local opening of the layers according to step F. and G.

 I. Applying an aluminum layer to the back by vapor deposition or screen printing

 J. Preparation of the metal-semiconductor contact by annealing at temperatures of preferably more than 550 ° C.

Method II:

 Process steps A.-F. according to process I:

G. deposition of silicon nitride or silicon oxide in a layer thickness of preferably 40 to 400 nm H. Applying an aluminum layer on the reverse side by vapor deposition or screen printing

 I. Making local metal-semiconductor contacts by locally heating the backside metal by means of laser radiation such that the metal penetrates the dielectric layers and bonds to the silicon

In a development of the invention, it is provided that the first dielectric layer consists of a material or contains one of the group of aluminum oxide, doped silicon oxide.

Preferably, the invention provides that the first dielectric layer has a layer thickness D 1 with 5 nm <Dl <100 nm.

Furthermore, the second dielectric layer should preferably have a layer thickness D2 with 40 nm <D2 <400 nm.

In a further development, the invention proposes that between the first dielectric layer and the substrate extends a silicon oxide or silicon oxide containing layer having a thickness D3 preferably 1 nm <D3 <10 nm.

The invention is in particular characterized by a method for producing a solar cell, comprising the method steps

 Etching of both surfaces of the substrate

 Diffusion of an n-doped material, at least in the radiation-facing front of the silicon substrate

 • Etch the back of the substrate while avoiding a bright etch

Substrate-back-depositing a first dielectric layer of a material containing fixed negative charges after deposition

Depositing a second dielectric layer of a material or a material comprising the group of silicon nitride, silicon oxide, silicon oxynitride along the first dielectric layer Depositing a metal layer along the second dielectric layer.

In this case, provision is made in particular for the metal layer to be contacted in regions with the substrate.

Advantageous embodiments:

The negatively charged layer is A10 _x

Deposition of A10 _x with ALD (Atomic Laser Deposition) or PECVD (Plasma Enhanced Chemical Vapor Deposition)

 Thermal oxidation of the wafer surface prior to deposition of the layers, i. between step E. and F. of methods I and II, respectively

 Execution of the contacts as lines

 Substrate temperature at SiN deposition preferably> 320 ° C.

 Boron doping of the contact areas before the layer deposition (step G.) Version with selective emitter

In particular, it is provided that the rear side of the substrate is textured.

In one embodiment, between the first dielectric layer and the substrate is a silicon oxide or silicon oxide containing layer having a thickness D3 of preferably 1 nm <D3 <10 nm. In this layer thickness region, the formation of the negative charges in the first dielectric layer does not become with special needs. The layer having the thickness D3 may be e.g. be generated by thermal oxidation.

Further details, advantages and features of the invention will become apparent not only from the claims, the features to be taken from them-alone and / or in combination-but also from the following description of a preferred embodiment. The single FIGURE shows an embodiment of a solar cell whose rear side RS is passivated by means of an at least double-layered dielectric layer 23, 24 in such a way that parasitic contact losses are substantially avoided. This is achieved by the combination of bilateral (substantially) symmetrical texture T, wherein the roughness is retained on the back RS and with deposition of the following layer sequence: {therm. Si0 ₂ (optional)}, Al ₂ O 3, SiN _x or SiO _x , viewed from the back RS.

In other words, the first dielectric layer 23, which contains stationary negative charges after deposition, is first applied to the rear side RS after optionally depositing a silicon oxide layer having a thickness of preferably between 1 m and 10 nm.

On this preferably consisting of alumina first layer 23 or other after application of stationary negative charges containing layer such. a fluorine doped silicon oxide layer is applied to the second dielectric layer 24, which may be silicon nitride, silicon oxide or silicon oxynitride. A backside metal layer 25, in particular an aluminum layer, is then applied to the second dielectric layer 24 and contacted with the silicon substrate 21 at desired locations through the first and second dielectric layers 23, 24.

On the front OS a front side contact 27 is applied in the usual way.

Furthermore, it can be seen from the schematic representation that the rear side RS is not smoothly etched, but rather can be termed textured, since during etching of the front or top side OS, which faces the incident radiation, the rear side RS is also etched.

In other words, the prior art smooth etching is not performed. This results in an enlarged rear side surface in comparison to known solar cells. The ΑΙΟχ-layer 23 is designed so that no "blistering" occurs in combination with the subsequent processing.

The process control is carried out in such a way that substantially no increased recombination occurs despite the increased surface area of the rear side RS. Roughness-reducing etching of the entire backside surface occurs exclusively after the diffusion of the dopant to form a pn junction in the silicon substrate 21, regardless of whether the diffusion is performed on one or both sides. The removal is as high as necessary to remove the layer formed by diffusion of the dopant layer, so typically greater than 0.5 μπι, but less than. 5 μηι. Due to the contained negative charges in the first dielectric layer 23, the losses due to parasitic contacts are minimized. The layer structure also helps ensure that even on a rough surface as possible no parasitic contacts are formed.

Hereinafter, the production of a solar cell will be described in more detail.

The sole FIGURE shows a solar cell produced by the method previously described as method II., Which has a non-brightly etched reverse side RS. The solar cell has a silicon wafer 21 with p-doping, in which a multi- or monocrystalline formation can be present. First, the surfaces, ie the front side OS and back RS are etched in order to remove sawing damage or to form a texture T. An otherwise performed according to the prior art separate Glanzätzen the back RS omitted. Then, at least in the surface of the front side 18, an n-doping substance such as phosphorus is diffused (layer 22).

Subsequently, formed Phosphorsilikatglas (PSG) is removed. Finally, the backside (RS) is etched to remove diffused dopant. The removal amounts to between preferably 0.5 μιη and 5 μηι. According to the exemplary embodiment, a first dielectric layer 23 of a layer thickness of preferably between 5 nm and 100 nm, which is deposited after deposition, is then deposited on the rear side RS contains negative charges. Optionally, a silicon oxide layer may be previously applied directly to the back RS, with a thickness between 1 nm and 10 nm being preferred. On the first dielectric layer 23, a second dielectric layer 24 is then deposited from a material such as silicon nitride, silicon oxide or silicon oxynitride, wherein the thickness is preferably between 40 nm and 400 nm. The second dielectric layer 24 may also be referred to as a capping layer. Finally, a metal layer, in particular an aluminum layer 25, is applied to the free outer side of the second dielectric layer 24. This can be done by vapor deposition or screen printing. Then, a preferably punctiform contacting takes place between the metal layer 25 and the substrate 21.

For this purpose, local metal-semiconductor contacts 26 can be produced by local heating of the backside metal by means of laser radiation such that the metal penetrates the dielectric layers 23, 24 and connects to the silicon.

The front side OS has a front side contact 27 in the usual way.

The inventive method allows the production of an improved Si solar cell with as few manufacturing steps, in particular in addition to the standard process (1 diffusion step, screen printing contacts).

In this case, known technologies, such as modified emitter profiles, selective emitters and passivated backside are combined according to the invention. Surface roughness on the back surface leads to parasitic bonding and, in combination with conventional coating techniques and bonding techniques, electrical losses. These losses are avoided according to the invention, without having to etch the back especially smooth.

Claims

Paten tansprü che process for the production of a solar cell and solar cell A solar cell (10) comprising a silicon substrate (21)  radiopaque front (OS) which is textured and has an n-doped region (22),  a backside (RS) having a p-doped region,  a first dielectric layer (23) running along the rear side, a second dielectric layer (24) running along the substrate side of the first dielectric layer and consisting of or containing a material from the group of silicon nitride, silicon oxide, Siliciumoxmitrid  and a metal layer (25) extending along the side of the second dielectric layer that faces away from the substrate,  characterized,  in that the back side (RS) of the substrate (21) has a gloss value at 60 ° irradiation angle less than 80 GU and that the first dielectric layer (23) contains stationary negative charges. 2. Solar cell according to claim 1,  characterized, that the gloss value at OO ⁰ irradiation angle is between 2 GU and 80 GU, in particular between 20 GU and 80 GU. 3. Solar cell according to claim 1 or 2,  characterized, in that the first dielectric layer (23) consists of or contains a material from the group of aluminum oxide, doped silicon oxide. 4. Solar cell according to at least one of the preceding claims,  characterized,  the first dielectric layer (23) has a layer thickness D1 with 5 nm <D1 <100 nm. 5. solar cell according to claim 1,  characterized,  the second dielectric layer (24) has a layer thickness D2 with 40 nm <D2 <400 nm. 6. Solar cell according to at least one of the preceding claims,  characterized draws,  the back side (RS) of the substrate (21) is textured. 7. Solar cell according to at least one of the preceding claims,  characterized,  in that between the first dielectric layer (23) and the substrate (21) extends a silicon oxide or silicon oxide containing layer having a thickness D3 of preferably 1 nm <D3 <10 nm. 8. A method for producing a solar cell (10), in particular according to claim 1, comprising the method steps:  Etching both surfaces of the substrate (21)  Diffusion of an n-doped material at least in the radiation-facing front side (OS) of the silicon substrate  • Etch the back (RS) of the substrate while avoiding a bright etch Substrate-back-depositing a first dielectric layer (23) of a material containing fixed negative charges after deposition Depositing a second dielectric layer (24) of a material or a material comprising the group silicon nitride, silicon oxide, silicon oxynitride along the first dielectric layer Depositing a metal layer (25) along the second dielectric layer. 9. The method according to claim 8,  characterized,  in that a silicon oxide layer or a silicon oxide-containing layer is deposited between the substrate (21) and the first dielectric layer (23). Method according to claim 8,  characterized.  in that, in order to obtain the stationary negative charges, the first dielectric layer, such as silicon oxide layer, is doped with fluorine and / or phosphorus. 11. The method of claim 8 _s  characterized,  the metal layer (25) is contacted with the substrate in certain areas, such as at points. Method according to claim 8,  characterized,  in that both the front side (OS) and the back side (RS) of the substrate (21) are textured in a first etching step.