EP2485258A3 - Procédé de formation d'une cellule de mémoire utilisant un élément de commutation de résistance réversible déposée de manière sélective - Google Patents

Procédé de formation d'une cellule de mémoire utilisant un élément de commutation de résistance réversible déposée de manière sélective Download PDF

Info

Publication number: EP2485258A3
Authority: EP; European Patent Office
Prior art keywords: forming; switching element; memory cell; reversible resistance; employs
Prior art date: 2007-06-29
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Granted

Application number

EP12166461A

Other languages

German (de)

English (en)

Other versions

EP2485258B1 (fr

EP2485258A2 (fr

Inventor

April Schricker

S. Brad Herner

Michael W. Konevecki

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

SanDisk 3D LLC

Original Assignee

SanDisk 3D LLC

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

2007-06-29

Filing date

2008-06-27

Publication date

2012-08-22

2007-06-29 Priority claimed from US11/772,090 external-priority patent/US7846785B2/en

2007-06-29 Priority claimed from US11/772,084 external-priority patent/US8233308B2/en

2008-06-27 Application filed by SanDisk 3D LLC filed Critical SanDisk 3D LLC

2012-08-08 Publication of EP2485258A2 publication Critical patent/EP2485258A2/fr

2012-08-22 Publication of EP2485258A3 publication Critical patent/EP2485258A3/fr

2014-03-26 Application granted granted Critical

2014-03-26 Publication of EP2485258B1 publication Critical patent/EP2485258B1/fr

Status Active legal-status Critical Current

2028-06-27 Anticipated expiration legal-status Critical

Classifications

- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
- H10B53/20—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the three-dimensional arrangements, e.g. with cells on different height levels
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
- H10B63/20—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices comprising selection components having two electrodes, e.g. diodes
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
- H10B63/30—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices comprising selection components having three or more electrodes, e.g. transistors
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
- H10B63/80—Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays
- H10B63/84—Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays arranged in a direction perpendicular to the substrate, e.g. 3D cell arrays
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/011—Manufacture or treatment of multistable switching devices
- H10N70/021—Formation of switching materials, e.g. deposition of layers
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/20—Multistable switching devices, e.g. memristors
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/821—Device geometry
- H10N70/826—Device geometry adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/881—Switching materials
- H10N70/883—Oxides or nitrides
- H10N70/8833—Binary metal oxides, e.g. TaOx

Landscapes

Semiconductor Memories (AREA)

EP12166461.9A 2007-06-29 2008-06-27 Procédé de formation d'une cellule de mémoire utilisant un élément de commutation de résistance réversible déposée de manière sélective Active EP2485258B1 (fr)

Applications Claiming Priority (3)

Application Number	Priority Date	Filing Date	Title
US11/772,090 US7846785B2 (en)	2007-06-29	2007-06-29	Memory cell that employs a selectively deposited reversible resistance-switching element and methods of forming the same
US11/772,084 US8233308B2 (en)	2007-06-29	2007-06-29	Memory cell that employs a selectively deposited reversible resistance-switching element and methods of forming the same
EP08779800A EP2162916B1 (fr)	2007-06-29	2008-06-27	Procédé de formation d'une cellule de mémoire utilisant un élément de commutation de résistance réversible déposé de manière sélective

Related Parent Applications (2)

Application Number	Title	Priority Date	Filing Date
EP08779800.5 Division		2008-06-27
EP08779800A Division EP2162916B1 (fr)	2007-06-29	2008-06-27	Procédé de formation d'une cellule de mémoire utilisant un élément de commutation de résistance réversible déposé de manière sélective

Publications (3)

Publication Number	Publication Date
EP2485258A2 EP2485258A2 (fr)	2012-08-08
EP2485258A3 true EP2485258A3 (fr)	2012-08-22
EP2485258B1 EP2485258B1 (fr)	2014-03-26

Family

ID=39791399

Family Applications (2)

Application Number	Title	Priority Date	Filing Date
EP12166461.9A Active EP2485258B1 (fr)	2007-06-29	2008-06-27	Procédé de formation d'une cellule de mémoire utilisant un élément de commutation de résistance réversible déposée de manière sélective
EP08779800A Active EP2162916B1 (fr)	2007-06-29	2008-06-27	Procédé de formation d'une cellule de mémoire utilisant un élément de commutation de résistance réversible déposé de manière sélective

Family Applications After (1)

Application Number	Title	Priority Date	Filing Date
EP08779800A Active EP2162916B1 (fr)	2007-06-29	2008-06-27	Procédé de formation d'une cellule de mémoire utilisant un élément de commutation de résistance réversible déposé de manière sélective

Country Status (6)

Country	Link
EP (2)	EP2485258B1 (fr)
JP (1)	JP5624463B2 (fr)
KR (3)	KR20140061468A (fr)
CN (1)	CN101720506B (fr)
TW (1)	TWI433276B (fr)
WO (1)	WO2009005700A2 (fr)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
JP4829320B2 (ja) *	2009-03-17	2011-12-07	株式会社東芝	不揮発性半導体記憶装置の製造方法
JP2010225741A (ja) *	2009-03-23	2010-10-07	Toshiba Corp	不揮発性半導体記憶装置
JP4875118B2 (ja) *	2009-03-24	2012-02-15	株式会社東芝	不揮発性記憶装置の製造方法
US7927977B2 (en) *	2009-07-15	2011-04-19	Sandisk 3D Llc	Method of making damascene diodes using sacrificial material
JP5161911B2 (ja) *	2010-03-25	2013-03-13	株式会社東芝	抵抗変化メモリ
CN102314940B (zh) *	2010-07-07	2014-04-23	旺宏电子股份有限公司	具有晶体管与电阻值切换装置并联的非挥发性存储器装置
JP5279879B2 (ja) *	2011-08-09	2013-09-04	株式会社東芝	不揮発性半導体記憶装置
JP5611903B2 (ja) *	2011-08-09	2014-10-22	株式会社東芝	抵抗変化メモリ
JP2013069922A (ja)	2011-09-22	2013-04-18	Toshiba Corp	不揮発性半導体記憶装置の製造方法及び不揮発性半導体記憶装置
JP5818679B2 (ja)	2011-12-27	2015-11-18	株式会社東芝	半導体装置の製造方法
JP5606478B2 (ja) *	2012-03-22	2014-10-15	株式会社東芝	半導体記憶装置
US9905757B2 (en)	2013-11-12	2018-02-27	Hewlett Packard Enterprise Development Lp	Nonlinear memristor devices with three-layer selectors
CN111106238B (zh) *	2019-11-19	2023-08-29	中山大学	一种基于金属掺杂的双向阈值选通器及其制备方法

Citations (5)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US20020168852A1 (en) *	2001-05-11	2002-11-14	Harshfield Steven T.	PCRAM memory cell and method of making same
US20030052330A1 (en) *	2001-09-20	2003-03-20	Klein Rita J.	Electro-and electroless plating of metal in the manufacture of PCRAM devices
WO2006052394A1 (fr) *	2004-11-03	2006-05-18	Micron Technology, Inc.	Placage autocatalytique de capuchons de métal pour dispositifs de mémoire à base de chalcogénure
KR100717286B1 (ko) *	2006-04-21	2007-05-15	삼성전자주식회사	상변화 물질층의 형성 방법과, 그 방법을 이용한 상변화기억 소자의 형성 방법 및 상변화 기억 소자
WO2008097742A1 (fr) *	2007-02-05	2008-08-14	Interolecular, Inc.	Procédés pour former des éléments de mémoire à commutation résistive

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US5915167A (en)	1997-04-04	1999-06-22	Elm Technology Corporation	Three dimensional structure memory
US6034882A (en) *	1998-11-16	2000-03-07	Matrix Semiconductor, Inc.	Vertically stacked field programmable nonvolatile memory and method of fabrication
US6545287B2 (en) *	2001-09-07	2003-04-08	Intel Corporation	Using selective deposition to form phase-change memory cells
US7176064B2 (en)	2003-12-03	2007-02-13	Sandisk 3D Llc	Memory cell comprising a semiconductor junction diode crystallized adjacent to a silicide
AU2003296988A1 (en)	2002-12-19	2004-07-29	Matrix Semiconductor, Inc	An improved method for making high-density nonvolatile memory
KR100773537B1 (ko)	2003-06-03	2007-11-07	삼성전자주식회사	한 개의 스위칭 소자와 한 개의 저항체를 포함하는비휘발성 메모리 장치 및 그 제조 방법
JP2008060091A (ja) *	2005-01-14	2008-03-13	Matsushita Electric Ind Co Ltd	抵抗変化素子
US7812404B2 (en) *	2005-05-09	2010-10-12	Sandisk 3D Llc	Nonvolatile memory cell comprising a diode and a resistance-switching material
JP4364180B2 (ja) *	2005-08-17	2009-11-11	株式会社東芝	集積回路装置の製造方法
US20070132049A1 (en) *	2005-12-12	2007-06-14	Stipe Barry C	Unipolar resistance random access memory (RRAM) device and vertically stacked architecture
US7728319B2 (en) *	2005-12-20	2010-06-01	Nxp B.V.	Vertical phase change memory cell and methods for manufacturing thereof
TW200915543A (en) *	2007-06-29	2009-04-01	Sandisk 3D Llc	Memory cell that employs a selectively grown reversible resistance-switching element and methods of forming the same

2008
- 2008-06-27 CN CN200880022647.7A patent/CN101720506B/zh active Active
- 2008-06-27 TW TW097124473A patent/TWI433276B/zh not_active IP Right Cessation
- 2008-06-27 EP EP12166461.9A patent/EP2485258B1/fr active Active
- 2008-06-27 JP JP2010514824A patent/JP5624463B2/ja not_active Expired - Fee Related
- 2008-06-27 KR KR1020147008191A patent/KR20140061468A/ko not_active Ceased
- 2008-06-27 EP EP08779800A patent/EP2162916B1/fr active Active
- 2008-06-27 WO PCT/US2008/007986 patent/WO2009005700A2/fr not_active Ceased
- 2008-06-27 KR KR1020147008185A patent/KR101494335B1/ko not_active Expired - Fee Related
- 2008-06-27 KR KR1020097027303A patent/KR101447176B1/ko not_active Expired - Fee Related

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US20020168852A1 (en) *	2001-05-11	2002-11-14	Harshfield Steven T.	PCRAM memory cell and method of making same
US20030052330A1 (en) *	2001-09-20	2003-03-20	Klein Rita J.	Electro-and electroless plating of metal in the manufacture of PCRAM devices
WO2006052394A1 (fr) *	2004-11-03	2006-05-18	Micron Technology, Inc.	Placage autocatalytique de capuchons de métal pour dispositifs de mémoire à base de chalcogénure
KR100717286B1 (ko) *	2006-04-21	2007-05-15	삼성전자주식회사	상변화 물질층의 형성 방법과, 그 방법을 이용한 상변화기억 소자의 형성 방법 및 상변화 기억 소자
US20070246743A1 (en) *	2006-04-21	2007-10-25	Sung-Lae Cho	Method of forming a phase change material layer, method of forming a phase change memory device using the same, and a phase change memory device so formed
WO2008097742A1 (fr) *	2007-02-05	2008-08-14	Interolecular, Inc.	Procédés pour former des éléments de mémoire à commutation résistive

Also Published As

Publication number	Publication date
CN101720506B (zh)	2012-05-16
WO2009005700A2 (fr)	2009-01-08
TW200913171A (en)	2009-03-16
EP2485258B1 (fr)	2014-03-26
TWI433276B (zh)	2014-04-01
EP2485258A2 (fr)	2012-08-08
KR20100038317A (ko)	2010-04-14
JP2010532569A (ja)	2010-10-07
EP2162916A2 (fr)	2010-03-17
CN101720506A (zh)	2010-06-02
JP5624463B2 (ja)	2014-11-12
KR101447176B1 (ko)	2014-10-08
EP2162916B1 (fr)	2013-03-20
KR101494335B1 (ko)	2015-02-23
WO2009005700A3 (fr)	2009-02-26
KR20140061468A (ko)	2014-05-21
KR20140061467A (ko)	2014-05-21

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