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EP2266147A2 - Procédé de fabrication de cellules solaires monocristallines à structure de contact arrière - Google Patents

Procédé de fabrication de cellules solaires monocristallines à structure de contact arrière

Info

Publication number
EP2266147A2
EP2266147A2 EP09720605A EP09720605A EP2266147A2 EP 2266147 A2 EP2266147 A2 EP 2266147A2 EP 09720605 A EP09720605 A EP 09720605A EP 09720605 A EP09720605 A EP 09720605A EP 2266147 A2 EP2266147 A2 EP 2266147A2
Authority
EP
European Patent Office
Prior art keywords
cell
emitter
wafer
strip
regions
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP09720605A
Other languages
German (de)
English (en)
Inventor
Hans-Joachim Krokoszinski
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Robert Bosch GmbH
Original Assignee
Robert Bosch GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Robert Bosch GmbH filed Critical Robert Bosch GmbH
Publication of EP2266147A2 publication Critical patent/EP2266147A2/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10FINORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F10/00Individual photovoltaic cells, e.g. solar cells
    • H10F10/10Individual photovoltaic cells, e.g. solar cells having potential barriers
    • H10F10/14Photovoltaic cells having only PN homojunction potential barriers
    • H10F10/146Back-junction photovoltaic cells, e.g. having interdigitated base-emitter regions on the back side
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10FINORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F19/00Integrated devices, or assemblies of multiple devices, comprising at least one photovoltaic cell covered by group H10F10/00, e.g. photovoltaic modules
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10FINORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F19/00Integrated devices, or assemblies of multiple devices, comprising at least one photovoltaic cell covered by group H10F10/00, e.g. photovoltaic modules
    • H10F19/90Structures for connecting between photovoltaic cells, e.g. interconnections or insulating spacers
    • H10F19/902Structures for connecting between photovoltaic cells, e.g. interconnections or insulating spacers for series or parallel connection of photovoltaic cells
    • H10F19/908Structures for connecting between photovoltaic cells, e.g. interconnections or insulating spacers for series or parallel connection of photovoltaic cells for back-contact photovoltaic cells
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10FINORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F77/00Constructional details of devices covered by this subclass
    • H10F77/20Electrodes
    • H10F77/206Electrodes for devices having potential barriers
    • H10F77/211Electrodes for devices having potential barriers for photovoltaic cells
    • H10F77/219Arrangements for electrodes of back-contact photovoltaic cells
    • H10F77/223Arrangements for electrodes of back-contact photovoltaic cells for metallisation wrap-through [MWT] photovoltaic cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/547Monocrystalline silicon PV cells

Definitions

  • the invention relates to a method for producing monocrystalline solar cells with back contact structure and a present in the wafer composite plurality of approximately planar same sub-cell diodes with local pn junctions, which are connected to obtain an increased output voltage in series, wherein between adjacent sub-cell diodes with a slit or strip-shaped material removal resulting insulation isolation is made and a connection of the sub-cell diodes for series connection, according to the preamble of claim 1.
  • IBC Interdigitated Back Contact Cell
  • FIG. 2 An IBC cell according to FIG. 2 with the active area Fo, which corresponds to the wafer area minus a narrow marginal strip, is shown in FIG first contact comb 1 with current collecting path 5 and with a second interdigitated contact comb 2 equipped with current collecting path 6.
  • the resulting surface is electrically a single diode having base contact pads 3 at one wafer edge and emitter contact pads 4 at the opposite wafer edge.
  • a z. Example, from JP 58-039071, JP 63-211773 or EP 0 985 233 Bl known rear-side contact solar cell has an emitter on the front, d. H. the light-facing side of the wafer and is contacted by a number of parallel tracks.
  • Such a known cell is shown in FIG. 3A in a basic front view and in FIG. 3B shown in principle rear view.
  • the parallel conductor tracks here have the reference numeral 11 and the Emittersammeibahnen the reference numeral 12.
  • Each trace is electrically connected via the aforementioned emitter-trace 12 to at least one via hole 13 provided with emitter doping and conductively lined with screen printing paste, which allows further connection to one of the solderable emitter busbars 14 on the back side.
  • each front panel is connected to the back by at least two holes. Also on the back are solderable base busbars 15 which connect the mostly non-solderable backside metallization to a solderable base contact, and further there is a soldered ribbon connecting to the emitter busbars of the neighboring cell.
  • the front-side emitter region is designated by the reference numeral 3, the rear-side base metallization by the reference numeral 4.
  • a solar cell which has a plurality of series-connected single cells and which explains a method for the isolation of the individual sub-cell diodes.
  • this method of isolation trenches are introduced in a surface side between the cells and then there is a targeted cracking from these trenches to the opposite surface side.
  • the trenches can be formed before the cell processing, but also after these process steps.
  • the problem with such trained trenches with targeted cracking is the preservation of permanent insulation, so that at least in the region of the trenches due to their larger spatial dimensions there is a need to apply or produce an oxidation layer.
  • the inventive method for isolation should be suitable both for back contact systems of IBC cells and for MWT cells with front emitter and backside base areas.
  • the basic idea of the invention is that the wafer is connected on one side, in a materially bonded manner, to an expansion plate, in particular a metal plate, by the cell processing carried out predominantly in a known manner.
  • insulation cracking is performed from the wafer side opposite to the expansion plate.
  • This Isolierriss Struktur can be done for example by the so-called TLS method.
  • the surface is locally heated with a laser beam and then cooled, which causes local stresses near the surface, which then lead to a targeted material crack.
  • the expansion plate is heated, which increases due to the expansion of the crack or gap.
  • a preferably liquid insulator material is then introduced to obtain a permanent electrical insulation.
  • a soldering process for connecting the sub-cell diodes can be carried out simultaneously during the heating of the expansion plate.
  • the expansion plate has integrated solder strips for the electrical connection of the sub-cell diodes.
  • the expansion plate may, as already mentioned, consist of a metallic material and comprise recesses for the insulating reception of solder strips or solder strips.
  • the solder strips or solder strips are preferably mounted flush with the surface in the recesses by an insulating adhesive.
  • the insulating material can be applied as a liquid from a nozzle along the crack or the gap and drawn into the respective crack or gap by capillary forces.
  • Doping material-free zones are formed in the regions between adjacent sub-cell diodes in order to form higher-resistance separation sections with respect to the environment.
  • the solar cell structuring according to the invention makes it possible in a simple and advantageous manner to produce subareas of the solar cell which lie next to one another and are separated by gaps or zones, and subsequently their secure electrical separation.
  • each cell may be applied to a metallic expansion or cooling plate by gluing.
  • the inventively proposed separation and isolation methodology for adjacent wafer regions has the following advantages.
  • the method is suitable both for IBC cells and for MWT cells and makes it possible to adjust the cell voltage by selecting the number of strips with which the output voltage of the solar cell can be predetermined.
  • the number of sub-cells and thus the increased output voltage is in principle not limited to the top.
  • a typical number of cells will range between 4 and 18 for 6-ZoI I wafers and 8 to 25 for 8-ZoII wafers, resulting in open clamping voltages of up to leads to 12V or 15V.
  • the high Stzellenanarra, z. For example,> 6 at 6-inch page length and> 8 at 8-inch page length, achieved by one or more cross-sections of the wafer, d. H. by means of a matrix arrangement of the sub-cells so as not to make the strip width itself too small.
  • the matrix arrangement can here z. 3x4 or 3x6 sub-cells or for larger wafers 3x8 or 5x5 sub-cells.
  • the presented solar cell realized in the method according to the invention is especially suitable for use in so-called concentrators. Because of the higher cell power generated in accordance with the concentration factor with the same power loss compared with a single sun, a higher efficiency is to be expected for concentrator cells in each case if a cell of the type according to the invention is used.
  • Fig. 1 to 3A and 3B cells or structures according to the prior art
  • 4c is a representation according to that of FIG. 4a and b, but with a segmentation in the form of a matrix arrangement of the sub-cells, which lead to a further increase in the output voltage in a meandering successive electrical interconnection;
  • FIG. 5 shows the structure according to the invention of a cell area on
  • Example of a rear contact cell schematically with two crests, which are connected to each other on a double Busbarline, so that the diode regions of both halves poled in series, but separated by a gap or zone;
  • FIG. 6 a shows an isolation of adjacent regions according to the invention by a crack induced in the crystal structure between the two busbars by thermal laser separation
  • FIG. 6b shows a cross section according to the illustration of FIG. 6a along the line A-B with recognizable induced crack
  • FIG. 7 shows a cell structure according to the invention of a complete
  • Fig. Fig. 8A illustrates the emitter regions with contact tracks on the front side and Fig. 8B the BSF regions and the busbars on the back side;
  • FIG. 8c shows a section along the line PQ according to FIG. 8a and 8b by front fingers and a via hole, these provided with emitter doping and screen-printed metallized vias, as known from the prior art, the front emitter with the Connect back emitter to the next solar cell, but according to the invention takes place a connection of the front emitter busbars on the back emitter busbars with the back BSF metallization of each directly in the figure right adjacent cell area instead, and
  • FIG. 9 is an illustration of the separation of the MWT cell strips by laser-induced (TLS) cracking after application to an expansion or cooling plate with integrated solder strips bridging the busbar breaks.
  • TLS laser-induced
  • This contact system may include either rear emitter and backside base regions (IBC cells) or front emitter and backside base regions (MWT cells).
  • These areas are advantageous strip-shaped, z. As shown in the figures, formed from top to bottom of a wafer edge to the opposite wafer edge.
  • the Fig. Figure 4a shows a square wafer with six strip-shaped areas. Of course, the shape may also be quasi-square or circular (FIG. 4b).
  • the open terminal voltage V ⁇ of the solar cell which is divided into series-connected diode regions D 1 to D n , as a value of n-times the open circuit voltage (V o c), ie n.Voc have.
  • V o c open circuit voltage
  • FIG. 4c shows a possibility of segmenting solar cells which, in addition to quasi-parallel strips, also has transverse gaps in the sense of a matrix arrangement of the sub-cells. These sub-cells can meander one behind the other electrically concatenated provide even higher output voltages.
  • FIG. 5 shows a possible embodiment of the cell structure of an IBC rear-side contact cell with a high output voltage in a schematic manner, ie. H. not to scale.
  • the base unit 30 consists of two interdigitated so-called interdigital contact combs 31 and 32, wherein one contact comb contacts the base regions of the solar cell and the other contact comb contacts the emitter regions of the cell, which can have different widths.
  • the fingers and the collecting tracks can be of different widths.
  • the finger shape may also assume a conical shape.
  • the base sheets 31 are deposited with collecting track 33 and the Emitterkammbahnen 32 with collecting track 35 on an insulating layer and only locally through small holes in the oxide layer with the doped base regions 42 and the emitter regions 43 are in contact.
  • the passivation layer is identified by reference numeral 44.
  • the isolation of adjacent diode regions on the wafer is based on the technique of local non-doping and the method of thermal laser separation.
  • the Fig. Fig. 6a illustrates, in the middle of the gap or zone 34 produced by local non-doping, that the laser separation line 36 is flanked by two parallel collection paths 33 and 35, the first 33 of which on the left side is flanked with the Base webs 31 and the second 35 are connected on their right side with the emitter paths 32.
  • 6b shows schematically in cross-section that the crack 36 extends through the entire wafer thickness from the light-remote processed surface 50 to the opposite light-facing surface 51 of the wafer.
  • wafer regions 40 and 41 are physically and thus electrically separated from each other so that the minority carriers can not migrate over the low-lying wafer regions into the adjacent regions.
  • the proposed structure and the described technique of the isolation of adjacent sub-cells by local non-doping and thermal laser separation can advantageously be applied both to IBC cells and to MWT structures.
  • FIG. 7 shows how, by quasi-stacking of area elements of the basic type 30 according to FIG. 5 long strip-shaped diode regions are produced by the series connection then a complete wafer surface is covered.
  • the Fig. Figure 8 shows the cell structure according to the invention for MWT cells.
  • the front emitter is subdivided by the structuring according to the invention into independent regions, in the configuration chosen here, in strips 90 from one wafer edge to the other with gaps or zones 34. Within these emitter strips are parallel tracks 91, z. B. of silver paste, applied to the emitter, which open into narrow, perpendicular thereto busbars 92, which also z. B. consist of silver paste.
  • busbars 92 run along the right edge of the emitter regions 90. They can either pass through from one wafer edge to the other and connect all interconnects leading from the left to a selectable number of via holes 93 or be interrupted several times and then only two, three, four at a time or five interconnects 91 with each other and at least one via-hole 93 connect.
  • the via holes 93 are made by laser bombardment, as known in the art, while the emitter diffusion is n + + emitter doped on its walls and around its back edge, and then doped with e.g. As silver paste metallized. Likewise, these holes are interconnected on the rear side by metallic busbars 95 either continuously or also piecemeal (FIG. 8b), wherein the conductive paste penetrates from below into the holes and establishes the connection to the paste coming from above.
  • the backside busbars 95 are in a suitable distance 96 from the BSF field lying to the left just below the front side busbars 92, see Fig. 8c.
  • the entire cell has on the left wafer edge shown in the figures a base contact 3 and on the opposite right wafer edge at least one emitter contact 4, by connecting to the running on the right wafer edge behind Emitterbusbar 97 and thus on the vias contained therein with the last front emitter area is connected.
  • These large contact pads are used together with the back emitter busbars 95 and 97 with solderable material, e.g. As silver paste coated.
  • the large-area BSF metallization 94 of the back can with a low-cost paste, for. B. made of aluminum.
  • An exemplary method of realizing a higher output voltage MWT cell comprises, for p-doped silicon and for more than one n + + striped emitter region, the following steps:
  • Untextured, saw damage etched p-type silicon wafers are used as starting material.
  • a two-sided thermal oxidation of the wafer takes place in a so-called batch process.
  • via holes 93 are formed in the regions of the later front and rear emitter busbars 92 and 95 and 97, respectively. Appropriate bombardment may be performed from the backside after a strip of oxide has previously been ablated along the later emitter-feeding path 95 connecting the holes.
  • the oxide is removed in the later emitter regions 90 of the front side by wet-chemical etching with etching paste or plasma etching.
  • the oxide remains in the later gaps or zones 34 by shading with a metal bar or by covering obtained with an organic lacquer layer.
  • a texturing of the emitter regions 90, z. By KOH + IPA or an acidic texture.
  • the surface damage is also etched away in the via holes.
  • phosphorus diffusion takes place in the emitter regions 90, in the via holes and in the backside stripes connecting the holes, by means of POCl 3 .
  • a phosphosilicate glass etch of the emitter surfaces 90 is made on the front side and in the via holes 93, while also removing the remaining thermal oxide from the front side gap regions 34 and the entire backside.
  • a passivation of the front side with SiNx is realized, for example, and preferably by PECVD.
  • the eighth process step is followed by screen-printing metallization of the solder contacts 3 and 4, the emitter bus bars 95 and 97 and filling of the via holes 93 with conductive paste.
  • the metal paste is sucked into the laser-drilled holes 93.
  • the backside metallization is dried and the wafers are rotated.
  • front-side fingers 91 and collecting paths 92 are formed by over-printing the through-holes 93 with silver paste by screen printing.
  • the silver paste is dried and the wafers are re-turned.
  • the sub-cells are connected to the desired series connection (see FIG. 9).
  • a metallic cooling plate 100 is first prepared, the z. B. made of copper or aluminum and the isolated embedded Lötbitzchen 103, which have been fixed flush with insulating adhesive 102 in a recess or recess of the cooling plate 100.
  • the wafer is adhesively bonded to the rear side of the expansion or cooling plate 100 via an adhesive layer 101, so that the two busbars 95 and 96 come to rest on the ribbon 103 coated with solder or with conductive adhesive 102.
  • a thermal laser separation is realized from the front side, ie. H.
  • the cracks 35 are produced in all gaps or zones 34.
  • the fourth sub-step is characterized by heating the cooling plate from below, preferably to a temperature above the melting temperature of the used solder 102, at least to 200 0 C.
  • the thermal expansion of the cooling plate 100 the sub-cells are removed at their cracks by a few microns apart. This is used to separate a liquid insulator along the cracks from a fine nozzle. The liquid is then distributed via the capillary forces in the widened gap and is drawn in there. Due to the still prevailing high temperatures, a solidification of the insulating liquid. When cooling the arrangement, the sub-cells remain isolated from each other and are simultaneously connected electrically in series via the surface soldered ribbon 103.

Landscapes

  • Photovoltaic Devices (AREA)

Abstract

L'invention concerne un procédé de fabrication de cellules solaires monocristallines pourvues d'une structure de contact arrière et d'une pluralité de diodes de cellules partielles à surface approximativement égale, à jonctions p-n locales et présentes dans la tranche composite, lesquelles diodes sont montées en série pour permettre l'obtention d'une tension de sortie accrue. Une fente est formée à travers la tranche entre des diodes de cellules partielles adjacentes dans une zone sous forme de bande pouvant rester sans dopage et un pontage avec des bandelettes métalliques brasées ou collées permet la connexion en série des diodes de cellules partielles. Selon l'invention, la tranche est reliée unilatéralement à une plaque de dilatation par liaison de matière après un traitement de cellule réalisé d'une manière connue en soi. Ensuite, une fente d'isolation est formée dans la face de la tranche opposée à la plaque de dilatation. De plus, la plaque de dilatation est chauffée avec la tranche puis une matière isolante permettant d'obtenir une isolation électrique permanente est introduite dans la fente s'élargissant par dilatation.
EP09720605A 2008-03-14 2009-03-12 Procédé de fabrication de cellules solaires monocristallines à structure de contact arrière Withdrawn EP2266147A2 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE102008014418 2008-03-14
DE102008021355.1A DE102008021355B4 (de) 2008-03-14 2008-04-29 Verfahren zur Herstellung monokristalliner Solarzellen mit rückseitiger Kontaktstruktur
PCT/EP2009/052908 WO2009112544A2 (fr) 2008-03-14 2009-03-12 Procédé de fabrication de cellules solaires monocristallines à structure de contact arrière

Publications (1)

Publication Number Publication Date
EP2266147A2 true EP2266147A2 (fr) 2010-12-29

Family

ID=41011256

Family Applications (1)

Application Number Title Priority Date Filing Date
EP09720605A Withdrawn EP2266147A2 (fr) 2008-03-14 2009-03-12 Procédé de fabrication de cellules solaires monocristallines à structure de contact arrière

Country Status (3)

Country Link
EP (1) EP2266147A2 (fr)
DE (1) DE102008021355B4 (fr)
WO (1) WO2009112544A2 (fr)

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DE102011012275A1 (de) * 2011-02-24 2012-08-30 Ritek Corp. Verfahren zum Schneiden eines Solarzellenpanels und Ausrüstung dafür
DE102011077696A1 (de) * 2011-06-17 2012-12-20 Robert Bosch Gmbh Solarzellenanordnung und Verfahren zu deren Herstellung
DE102012220221B4 (de) 2012-11-07 2024-03-07 Meyer Burger (Germany) Gmbh Solarzellenanordnung und Verfahren zu deren Herstellung
DE112014004468B4 (de) 2013-09-25 2022-02-03 Panasonic Intellectual Property Management Co., Ltd. Solarzelle, Solarzellenmodul und Solarzellen-Herstellungsverfahren
US11502213B2 (en) 2016-12-30 2022-11-15 Sunpower Corporation Solar cell having a plurality of sub-cells coupled by cell level interconnection

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Also Published As

Publication number Publication date
WO2009112544A2 (fr) 2009-09-17
DE102008021355B4 (de) 2020-08-20
WO2009112544A3 (fr) 2009-12-23
DE102008021355A1 (de) 2009-10-01

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