EP1908121A4 - DRAIN-ADVANCED MOSFETS WITH DIODE CLAMPING - Google Patents
DRAIN-ADVANCED MOSFETS WITH DIODE CLAMPINGInfo
- Publication number
- EP1908121A4 EP1908121A4 EP05772304A EP05772304A EP1908121A4 EP 1908121 A4 EP1908121 A4 EP 1908121A4 EP 05772304 A EP05772304 A EP 05772304A EP 05772304 A EP05772304 A EP 05772304A EP 1908121 A4 EP1908121 A4 EP 1908121A4
- Authority
- EP
- European Patent Office
- Prior art keywords
- drain
- diode clamping
- mosfets
- advanced
- advanced mosfets
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/101—Integrated devices comprising main components and built-in components, e.g. IGBT having built-in freewheel diode
- H10D84/151—LDMOS having built-in components
- H10D84/153—LDMOS having built-in components the built-in component being PN junction diodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D1/00—Resistors, capacitors or inductors
- H10D1/60—Capacitors
- H10D1/62—Capacitors having potential barriers
- H10D1/66—Conductor-insulator-semiconductor capacitors, e.g. MOS capacitors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/028—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs
- H10D30/0281—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of lateral DMOS [LDMOS] FETs
- H10D30/0285—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of lateral DMOS [LDMOS] FETs using formation of insulating sidewall spacers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
- H10D62/351—Substrate regions of field-effect devices
- H10D62/357—Substrate regions of field-effect devices of FETs
- H10D62/364—Substrate regions of field-effect devices of FETs of IGFETs
- H10D62/371—Inactive supplementary semiconductor regions, e.g. for preventing punch-through, improving capacity effect or leakage current
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions
- H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
- H10D64/311—Gate electrodes for field-effect devices
- H10D64/411—Gate electrodes for field-effect devices for FETs
- H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
- H10D64/514—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the insulating layers
- H10D64/516—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the insulating layers the thicknesses being non-uniform
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/US2005/025396 WO2007011354A1 (en) | 2005-07-18 | 2005-07-18 | Drain-extended mosfets with diode clamp |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| EP1908121A1 EP1908121A1 (en) | 2008-04-09 |
| EP1908121A4 true EP1908121A4 (en) | 2009-09-30 |
Family
ID=37669121
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| EP05772304A Ceased EP1908121A4 (en) | 2005-07-18 | 2005-07-18 | DRAIN-ADVANCED MOSFETS WITH DIODE CLAMPING |
Country Status (4)
| Country | Link |
|---|---|
| EP (1) | EP1908121A4 (en) |
| JP (1) | JP2009502041A (en) |
| KR (1) | KR100985373B1 (en) |
| WO (1) | WO2007011354A1 (en) |
Families Citing this family (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009059949A (en) * | 2007-08-31 | 2009-03-19 | Sharp Corp | Semiconductor device and method for manufacturing semiconductor device |
| US7838940B2 (en) | 2007-12-04 | 2010-11-23 | Infineon Technologies Ag | Drain-extended field effect transistor |
| KR100943504B1 (en) | 2007-12-31 | 2010-02-22 | 주식회사 동부하이텍 | Method of manufacturing MOSPF |
| JP5534298B2 (en) * | 2009-06-16 | 2014-06-25 | ルネサスエレクトロニクス株式会社 | Semiconductor device |
| US8344472B2 (en) * | 2010-03-30 | 2013-01-01 | Freescale Semiconductor, Inc. | Semiconductor device and method |
| KR101302108B1 (en) * | 2011-12-30 | 2013-08-30 | 주식회사 동부하이텍 | Drain exteneded mos transistor and method for fabricating the same |
| JP5960445B2 (en) * | 2012-02-23 | 2016-08-02 | ラピスセミコンダクタ株式会社 | Semiconductor device |
| JP2013247188A (en) * | 2012-05-24 | 2013-12-09 | Toshiba Corp | Semiconductor device |
| US9129990B2 (en) * | 2012-06-29 | 2015-09-08 | Freescale Semiconductor, Inc. | Semiconductor device and driver circuit with drain and isolation structure interconnected through a diode circuit, and method of manufacture thereof |
| KR101694091B1 (en) * | 2016-03-03 | 2017-01-17 | 강희복 | A power supply circuit system using a negative threshold five-terminal NMOS FET device for Flyback inductor schematic application |
| KR101694092B1 (en) * | 2016-03-03 | 2017-01-17 | 강희복 | A power supply circuit system using a negative threshold five-terminal NMOS FET device for three-phase Flyback inductor schematic application |
| JP6920137B2 (en) * | 2017-08-31 | 2021-08-18 | ルネサスエレクトロニクス株式会社 | Semiconductor devices and their manufacturing methods |
| CN112713182B (en) * | 2020-12-29 | 2022-06-28 | 浙大城市学院 | A silicon carbide cell-level power integrated chip structure |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20030173624A1 (en) * | 2002-02-23 | 2003-09-18 | Fairchild Korea Semiconductor Ltd. | High breakdown voltage low on-resistance lateral DMOS transistor |
| US20040159891A1 (en) * | 2003-02-18 | 2004-08-19 | Kabushiki Kaisha Toshiba | Semiconductor device |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0936674B1 (en) * | 1998-02-10 | 2006-04-26 | STMicroelectronics S.r.l. | Integrated circuit comprising a VDMOS transistor protected against overvoltages between source and gate |
| US6924531B2 (en) * | 2003-10-01 | 2005-08-02 | Taiwan Semiconductor Manufacturing Company, Ltd. | LDMOS device with isolation guard rings |
-
2005
- 2005-07-18 KR KR1020087003859A patent/KR100985373B1/en not_active Expired - Fee Related
- 2005-07-18 EP EP05772304A patent/EP1908121A4/en not_active Ceased
- 2005-07-18 WO PCT/US2005/025396 patent/WO2007011354A1/en not_active Ceased
- 2005-07-18 JP JP2008522752A patent/JP2009502041A/en not_active Abandoned
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20030173624A1 (en) * | 2002-02-23 | 2003-09-18 | Fairchild Korea Semiconductor Ltd. | High breakdown voltage low on-resistance lateral DMOS transistor |
| US20040159891A1 (en) * | 2003-02-18 | 2004-08-19 | Kabushiki Kaisha Toshiba | Semiconductor device |
Non-Patent Citations (2)
| Title |
|---|
| PARTHASARATHY V ET AL: "Drain profile engineering of resurf LDMOS devices for ESD ruggedness", PROCEEDINGS OF THE 14TH. INTERNATIONAL SYMPOSIUM ON POWER SEMICONDUCTOR DEVICES & ICS. ISPSD'02. SANTA FE, NM, JUNE 4 - 7, 2002; [INTERNATIONAL SYMPOSIUM ON POWER SEMICONDUCTOR DEVICES & IC'S], NEW YORK, NY : IEEE, US, 4 June 2002 (2002-06-04), pages 265 - 268, XP010591617, ISBN: 978-0-7803-7318-1 * |
| See also references of WO2007011354A1 * |
Also Published As
| Publication number | Publication date |
|---|---|
| EP1908121A1 (en) | 2008-04-09 |
| KR20080033423A (en) | 2008-04-16 |
| JP2009502041A (en) | 2009-01-22 |
| WO2007011354A1 (en) | 2007-01-25 |
| KR100985373B1 (en) | 2010-10-04 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PUAI | Public reference made under article 153(3) epc to a published international application that has entered the european phase |
Free format text: ORIGINAL CODE: 0009012 |
|
| 17P | Request for examination filed |
Effective date: 20080218 |
|
| AK | Designated contracting states |
Kind code of ref document: A1 Designated state(s): DE FR GB |
|
| RBV | Designated contracting states (corrected) |
Designated state(s): DE FR GB |
|
| A4 | Supplementary search report drawn up and despatched |
Effective date: 20090827 |
|
| 17Q | First examination report despatched |
Effective date: 20091029 |
|
| DAX | Request for extension of the european patent (deleted) | ||
| REG | Reference to a national code |
Ref country code: DE Ref legal event code: R003 |
|
| STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: THE APPLICATION HAS BEEN REFUSED |
|
| 18R | Application refused |
Effective date: 20170925 |