EP1690286A2 - Field effect transistor with enhanced insulator structure - Google Patents
Field effect transistor with enhanced insulator structureInfo
- Publication number
- EP1690286A2 EP1690286A2 EP04817951A EP04817951A EP1690286A2 EP 1690286 A2 EP1690286 A2 EP 1690286A2 EP 04817951 A EP04817951 A EP 04817951A EP 04817951 A EP04817951 A EP 04817951A EP 1690286 A2 EP1690286 A2 EP 1690286A2
- Authority
- EP
- European Patent Office
- Prior art keywords
- nitride
- layer
- interface
- materials
- nitride material
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
- H10D62/85—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group III-V materials, e.g. GaAs
- H10D62/8503—Nitride Group III-V materials, e.g. AlN or GaN
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/40—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels
- H10D30/47—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having 2D charge carrier gas channels, e.g. nanoribbon FETs or high electron mobility transistors [HEMT]
- H10D30/471—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT]
- H10D30/475—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT] having wider bandgap layer formed on top of lower bandgap active layer, e.g. undoped barrier HEMTs such as i-AlGaN/GaN HEMTs
- H10D30/4755—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT] having wider bandgap layer formed on top of lower bandgap active layer, e.g. undoped barrier HEMTs such as i-AlGaN/GaN HEMTs having wide bandgap charge-carrier supplying layers, e.g. modulation doped HEMTs such as n-AlGaAs/GaAs HEMTs
Definitions
- the present invention relates generally to a class of field effect transistors based on Ill-nitride materials, and relates more particularly to a field effect transistor that uses spontaneous polarization fields to provide enhanced conductivity while providing improved electrical insulation under the gate structure.
- Hi-nitride materials have generally been aimed at high power-high frequency applications such as emitters for cell phone base stations.
- the devices fabricated for these types of applications are based on general device structures that exhibit high electron mobility and are referred to variously as heteroj unction field effect transistors (HFETs), high electron mobility transistors (HEMTs) or modulation doped field effect transistors (MODFETs).
- HFETs heteroj unction field effect transistors
- HEMTs high electron mobility transistors
- MODFETs modulation doped field effect transistors
- These types of devices maybe modified for a number of types of applications, but typically operate through the use of piezoelectric polarization fields to generate a two dimensional electron gas (2DEG) that allows transport of very high current densities with very low resistive losses.
- the 2DEG is formed at an interface of AlGaN and GaN materials in these conventional Ill-nitride HFETs.
- a drawback of these types of devices is the limited thickness that can be achieved in the strained AlGaN/GaN system. The difference in the lattice structures of these types of materials produces a strain that can result in dislocation of films grown to produce the different layers. This results in high levels of leakage through a barrier layer, for example.
- an insulator layer can reduce the leakage through the barrier, and typical layers used for this purpose are silicon oxide, silicon nitride, sapphire, or other insulators, disposed between the AlGaN and metal gate layers.
- This type of device is often referred to as a MISHFET and has some advantages over the traditional devices that do not have an insulator layer.
- MISHFET MISHFET
- the additional interface between the AlGaN layer and the insulator results in the production of interface trap states that slow the response of the device.
- the additional thickness of the oxide, plus the additional interfaces between the two layers results in the use of larger gate drive voltages to switch the device.
- planar devices have been fabricated with GaN and InAlGaN alloys through a number of techniques, including MOCVD (metal organic chemical vapor deposition) as well as molecular beam epitaxy (MBE) and hydride vapor phase epitaxy (HNPE).
- MOCVD metal organic chemical vapor deposition
- MBE molecular beam epitaxy
- HNPE hydride vapor phase epitaxy
- Materials in the gallium nitride material system may include gallium nitride (GaN) and its alloys such as aluminum gallium nitride (AlGaN), indium gallium nitride (InGaN) and indium aluminum gallium nitride (InAlGaN). These materials are semiconductor compounds that have a relatively wide direct bandgap that permits highly energetic electronic transitions to occur.
- Gallium nitride materials have been formed on a number of different substrates including silicon carbide (SiC), saphire and silicon. Silicon substrates are readily available and relatively inexpensive, and silicon processing technology has been well developed.
- gallium nitride materials on silicon substrates presents challenges that arise from differences in the lattice constant, thermal expansion and bandgap between silicon and gallium nitride. Differences in the properties between gallium nitride materials and substrates can lead to difficulties in growing layers suitable for many applications.
- GaN has a different thermal expansion coefficient, i.e., thermal expansion rate, than many substrate materials including saphire, SiC and silicon. The thermal expansion differences can lead to cracking of the GaN layer deposited on such substrates when the structure is cool, for example during processing.
- GaN also has a different lattice structure than most substrate materials. The difference in lattice constant may lead to the formation of defects in gallium nitride material layers deposited on substrates. Such defects can impair the performance of devices formed using the gallium nitride material layers.
- GaN and AlGaN materials have lattice structures that differ significantly enough to produce interface strain between the layers. This strain contributes to the piezoelectric polarization that in turn produces the high levels of electron charge at the interface, resulting in high current carrying capacity.
- the fields generated by the piezoelectric polarization are maximized through increasing the strain to improve the characteristics of the devices.
- the device is composed of layers of gallium nitride material, such as InAlGaN grown on GaN, such that the in-plane lattice constant of the InAlGaN is substantially for the same as devices, or is much larger than, for nominally off devices, that of GaN.
- This technique takes advantage of a relatively unused characteristic of gallium nitride material involving spontaneous polarization fields, where previous devices focus on the development of piezoelectric polarization fields to obtain a high density 2DEG.
- the device according to the present invention is operable with two primary layers.
- the first layer is a base layer composed of a Ill-nitride material with a lattice constant A and a bandgap Eb, typically GaN.
- the second layer on top of the first layer is another composition of Ill-nitride material with lattice constant B and bandgap Et, typically InAlGaN.
- One defining character of the device and the material composition is that Et is greater than Eb, and that B is greater than or equal to A.
- cladding and contact layers may be grown above or below this two-layer active region.
- the device according to the present invention obtains spontaneous polarization fields to produce and control a high-density 2DEG at the GaN/InAlGaN interface. Control of the density of the 2DEG can be accomplished by varying the alloy percentage of In to Al. The interplay of spontaneous and piezoelectric fields leads to unique attributes for this design. In particular, spontaneous polarization and piezoelectric polarization can be balanced to cancel each other, leading to zero charge accumulation at the interface. This results in nominally off HFET devices.
- a FET device with a gate, source and drain area are defined upon the two layer hiAlGaN/GaN material to produce a Ill-nitride HFET device.
- the source and drain regions may be formed according to known methods including ion implantation, etching to remove the barrier region over the source and drain regions and application of a low resistance ohmic contact formation process.
- the resulting device features a near zero interface density of state, control of strain state of the barrier layer and a resulting lack of relaxation generated defects.
- the device is also characterized by low leakage in the gate contact and a high breakdown field from the barrier layer.
- a larger dielectric constant compared to conventional insulators such as SiO 2 and SiN is provided.
- the device also provides a degree of control over the density of the resulting 2DEG, permitting an increase in sheet charge by a factor of up to 2-4 times. Alternately, the device provides a control over the density of the 2DEG to produce a nominally off device.
- a larger bandgap from the barrier region results in a larger confinement barrier for the electrons in the 2DEG. The larger bandgap reduces the scattering cross-section of the electrons, and adds to their mobility.
- the density of the 2DEG in relation to layer thickness with a lattice matched InAlGaN barrier layer is greatly improved over conventional devices.
- the large bandgaps are obtained without strain relaxation and thus result in better confinement of electrons and higher mobility of those electrons.
- the large bandgaps permit lower leakage through the gate due to the large Schottky barrier height of the metals used in conjunction with the GaN material.
- the high critical fields of the GaN material allow thin layers to withstand large voltages without dielectric breakdown.
- the dielectric constant of GaN materials is approximately 10, which is a factor of 2.5 times better than SiO .
- Figure 1 is a schematic diagram of a device according to the present invention.
- Figure 2 is a graph illustrating bandgap and critical field in relation to h material content.
- Figure 3 is a graph illustrating density of 2DEG related to InAlGaN layer thickness.
- GaN material devices In the construction of GaN material devices, a number of factors impact the functionality and capability of the devices. A large lattice mismatch between GaN, A1N and InN and the strong piezoelectric and polarization effects in these materials significantly impact the electrical properties of Ill-nitride heteroj unction devices. Nearly all reported GaN-based HEMTs to date use strained GaN- AlGaN junctions with alloy compositions that are designed to maximize the strain in the AlGaN layer, while simultaneously trying to avoid dislocations that may be responsible for long term instabilities in the devices. Various devices and systems for building heteroj unction devices have been proposed to control the lattice mismatch and the strain of the GaN- AlGaN junctions. These devices are particularly designed to take advantage of piezoelectric and spontaneous polarization effects and to minimize long term instabilities.
- HFETs typically have three terminals including a gate, a drain and a source terminal for controlling electrical power flow.
- An electrical potential applied to the gate terminal controls the flow of current from the drain terminal to the source terminal via an electrically conductive channel.
- the electrically conductive channel is defined by at least one heterointerface between two different semiconductor materials.
- HFETs formed with GaN materials typically include a barrier layer of AlGaN that is disposed on the channel layer to induce a high concentration of electrons in the channel and thereby enhance the electrically conductive properties of the channel.
- the AlGaN barrier disposed on top of the channel can make ohmic contact with the channel difficult.
- the polarized nature of the AlGaN layer disposed on top of the channel results in the formation of surface charges that adversely affect the operation of the HFET.
- HFETs formed with an AlGaN layer on top of the channel layers exhibit trapping effects where electrons migrate from the channel to the AlGaN layer and become trapped.
- One solution to the above drawbacks is to provide a barrier layer disposed between a buffer layer and a channel layer in a GaN-based HFET.
- the polarization charges associated with the barrier layer create a potential barrier that prevents electrons from flowing out of the channel and into the buffer.
- this solution realized with AlGaN/GaN interfaces produces the same difficulties discussed above with respect to AlGaN/GaN materials for high current capacity, for example.
- InGaN alloys in the channel layer of HEMT devices is also known to permit the use of lower concentrations of Al in AlGaN layers to obtain equivalent levels of strain and piezoelectric characteristics for AlGaN/GaN heterostructures.
- InGaN provides a large a-lattice constant in relation to GaN, and low Al and In content layers may be used to produce AlGaN/ftiGaN heterostructures with comparable strain to AlGaN/GaN.
- High density 2DEGs may be generated based on the strain characteristics of the interface resulting in piezoelectric polarization that could be used to form and control the 2DEG with piezoelectric polarization fields.
- the density of the 2DEG can be controlled by varying the alloy percentage of Al. Accordingly, AlGaN/InGaN heterostructures with reduced Al content AlGaN layers may be provided without significant reductions in piezoelectric properties of the channel layer.
- the properties of a strained Hi-nitride material system prevent the realization of a high current carrying device with good insulator qualities.
- the device according to the present invention produces an inversion or elimination of the strain generated fields that are the focus of study and control in traditional HFET technology, as discussed above.
- the devices of the present invention also incorporate useful characteristics of the spontaneous polarization fields present in the Ill-nitride materials.
- the devices according to the present invention improve the conduction characteristics of the device, while enhancing the insulator qualities permitted by the materials. These results are achieved by controlling the in-plane lattice constant of the materials forming an interface in the Ill-nitride material system to produce devices that can be either nominally on or nominally off.
- a GaN layer or substrate is provided as a basis, over which a layer of InAlGaN is grown with a particular relationship for the in-plane lattice constant of the two materials. So, for example, a nominally on HFET has an in-plane lattice constant for the material interface that is substantially the same in the GaN layer as in the InAlGaN layer. For nominally off devices, the in-plane lattice constant of the InAlGaN is larger than that of the GaN material.
- a base layer is formed that is composed of a Ill-nitride material with a lattice constant A and a bandgap Eb, typically associated with GaN.
- a second layer is formed over the first layer, and is composed of a Hi-nitride material with a lattice constant B and bandgap Et, such as an alloy typified by InAlGaN.
- bandgap Et may be made greater than bandgap Eb and lattice constant B may be made greater than or equal to lattice constant A.
- a device provided in accordance with these relationships controls the spontaneous polarization produced in the materials to generate spontaneous polarization fields that can produce and control the 2DEG at the GaN/InAlGaN interface. Narying the alloy percentage of In to Al can control the density of the 2DEG.
- the spontaneous and piezoelectric polarization fields can be balanced to cancel each other, leading to zero charge accumulation at the interface, resulting in a nominally off HFET device.
- a semiconductor structure 10 illustrates the use of an InAlGa ⁇ /Ga ⁇ interface in accordance with the present invention.
- Semiconductor structure 10 incorporates a quaternary barrier design with a source 12 and a drain 14.
- a gate 16 controls the formation and density of the high mobility 2DEG between source 12 and drain 14 to permit or prevent conduction.
- Source 12, drain 14 and gate 16 may be defined and metallized according to known Ill-nitride HFET methodologies.
- the formative methodologies may include ion implantation of impurities to form source 12 and drain 14, in addition to etching to remove barrier regions over source 12 and drain 14.
- Other methodologies applicable to the present invention may include the process of forming a low resistive ohmic contact 18 for source 12 and drain 14.
- semiconductor structure 10 By providing a matching in-plane lattice constant between InAlGaN layer 11 and GaN layer 15, semiconductor structure 10 achieves a near zero interface density of state.
- the characteristics of the HFET layer structure permits control of the strain state of the barrier layer, reducing or eliminating relaxation generated defects and providing low leakage in the gate contact.
- the HFET produced according to semiconductor structure 10 exhibits a high breakdown field resulting from the barrier layer and the large dielectric constant achieved as an improvement over traditional insulator materials.
- semiconductor structure 10 provides an increase in sheet charge by a factor of 2-4 times that of conventional devices. With respect to a nominally off device arranged according to semiconductor structure 10, control of the density of the 2DEG permits a large withstand capability.
- the barrier region of semiconductor structure 10 has a large bandgap, which results in a large confinement barrier for electrons in the 2DEG This phenomena reduces the scattering cross-section of the electrons and increases their mobility, leading to higher current densities and reduced ON resistance.
- the thickness of layer 11 can vary in semiconductor structure 10, so that layer 11 has a different thickness under source 12 or drain 14 than under gate 16, for example.
- the different thickness of layer 11 can contribute to reducing leakage and assist in forming a good ohmic contact 18.
- bandgap and critical field values of semiconductor structure 10 in relation to In content are graphically illustrated in graph 20.
- the plotted bandgaps reflect the lattice matched barrier layer stoichiometry of the InAlGaN barrier layers and GaN layer.
- the large bandgaps illustrated are obtained without strain relaxation, resulting in better confinement of electrons and higher mobility of the confined electrons.
- the large bandgaps permits lower leakage through the gate electrode due to the large Schottky barrier height of the metals on InAlGaN.
- Graph 20 also illustrates the high critical fields of the InAlGaN material, permitting thin layers of material to stand off large voltages without dielectric breakdown.
- InAlGaN provides a dielectric constant of approximately 10, a factor of 2.5 times better than that of silicon oxide.
- FIG. 30 illustrates the calculated 2DEG density versus layer thickness for the lattice matched InAlGaN barrier layers.
- the illustrated figures represent a marked improvement over conventional AlGaN devices.
- a 10% alloy with a thickness of 200 A has a 2DEG density of approximately 1.5 x 10 13 E/cm 2
- previously produced AlGaN devices achieve at best a density of 1 x 10 13 E/cm 2 .
Landscapes
- Junction Field-Effect Transistors (AREA)
Abstract
Description
Claims
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US52763103P | 2003-12-05 | 2003-12-05 | |
| PCT/US2004/040599 WO2005057623A2 (en) | 2003-12-05 | 2004-12-06 | Field effect transistor with enhanced insulator structure |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| EP1690286A2 true EP1690286A2 (en) | 2006-08-16 |
| EP1690286A4 EP1690286A4 (en) | 2009-07-08 |
Family
ID=36649355
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| EP04817951A Withdrawn EP1690286A4 (en) | 2003-12-05 | 2004-12-06 | Field effect transistor with enhanced insulator structure |
Country Status (1)
| Country | Link |
|---|---|
| EP (1) | EP1690286A4 (en) |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3209270B2 (en) * | 1999-01-29 | 2001-09-17 | 日本電気株式会社 | Heterojunction field effect transistor |
| JP4220683B2 (en) * | 2001-03-27 | 2009-02-04 | パナソニック株式会社 | Semiconductor device |
-
2004
- 2004-12-06 EP EP04817951A patent/EP1690286A4/en not_active Withdrawn
Also Published As
| Publication number | Publication date |
|---|---|
| EP1690286A4 (en) | 2009-07-08 |
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| RIC1 | Information provided on ipc code assigned before grant |
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