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EP1652229A1 - Method of detaching a semiconductor layer - Google Patents

Method of detaching a semiconductor layer

Info

Publication number
EP1652229A1
EP1652229A1 EP04744304A EP04744304A EP1652229A1 EP 1652229 A1 EP1652229 A1 EP 1652229A1 EP 04744304 A EP04744304 A EP 04744304A EP 04744304 A EP04744304 A EP 04744304A EP 1652229 A1 EP1652229 A1 EP 1652229A1
Authority
EP
European Patent Office
Prior art keywords
wafer
zone
detachment
embrittlement
embrittlement zone
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP04744304A
Other languages
German (de)
French (fr)
Inventor
Walter Schwarzenbach
Christophe Maleville
Nadia Ben Mohamed
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Soitec SA
Original Assignee
Soitec SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from FR0309597A external-priority patent/FR2858715B1/en
Application filed by Soitec SA filed Critical Soitec SA
Publication of EP1652229A1 publication Critical patent/EP1652229A1/en
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering

Definitions

  • the present invention relates to a method of detaching a layer from a wafer of material chosen from among semiconductor materials, the method comprising the steps consisting of: - creating an embrittlement zone in the thickness of the wafer, the said embrittlement zone defining the layer to be detached in the thickness of the wafer, subjecting the wafer to a treatment for effecting the detachment of the layer, at the level of the embrittlement zone.
  • Methods of this type are already known. These methods permit thin layers to be obtained with a possible thickness of the order of a micron or less.
  • the layer may be of a semiconductor material such as silicon.
  • the SMARTCUT® method is an example of a method making use of such steps.
  • the surface of the thus created layers should generally conform to very strict surface state specifications. It is thus common to find roughness specifications which should not exceed 5 angstroms in rms (root mean square) value.
  • Roughness measurements are generally performed using an atomic force microscope (AFM) . With this type of apparatus, roughness is measured on surfaces scanned by the point of the AFM microscope, from l x l ⁇ m 2 to 10 x 10 ⁇ m 2 , and more rarely, 50 x 50 ⁇ m 2 or even 100 x 100 ⁇ m 2 . It is likewise specified that it is possible to measure surface roughness by other methods, particularly using a measurement of haze".
  • This method has the particular advantage of permitting rapid characterization of the uniformity of roughness over the whole of a surface.
  • This haze arises from a method using the optical reflectivity properties of the surface to be characterized, and corresponds to an optical "background noise" given off by the surface due to its micro-roughness .
  • the surface state specifications of detached layers are very strict in the semiconductor field.
  • the roughness be as homogeneous as possible over the surface of the detached layer.
  • the invention aims at providing a distribution of roughness which is as homogeneous as possible over the surface of the detached layer.
  • the invention proposes a method of detachment of a layer from a wafer of material chosen from semiconductor materials, the method comprising the steps consisting of: - creating an embrittlement zone in the thickness of the wafer, the said embrittlement zone defining the layer to be detached in the thickness of the wafer, subjecting the wafer to a thermal treatment to perform detachment of the layer, at the level of the embrittlement zone, characterized in that : - during the creation of the embrittlement zone, a localized starting region of this zone is constituted, at the level of which the embrittlement zone locally has greater embrittlement, so that this starting region corresponds to a super-embrittled region of the embrittlement zone, and - the thermal treatment is performed so as to apply to the wafer a substantially homogeneous amount of heat over the whole embrittlement zone.
  • the embrittlement zone is created by atomic species implantation, and the starting zone is created during the implantation by local implantation of an overdose of atomic species
  • - the detachment treatment is thermal annealing
  • - the annealing is performed so as to apply to the wafer an amount of heat corresponding to the energy necessary for effecting the detachment
  • - different heating elements situated facing the wafer are selectively controlled during the annealing
  • detachment is initiated at the level of the starting region during annealing
  • - the detachment propagates from the starting zone over the whole extent of the embrittlement zone.
  • Figure 1 is a schematic assembly diagram of an annealing device which may be used in the invention, corresponding to a first embodiment of such a device
  • Figure 2 is a more detailed schematic diagram of a portion of this device
  • Figure 3 is a schematic diagram of an annealing device which may be used in the invention, corresponding to a second embodiment of such a device.
  • a first step of the method according to the invention consists of creating an embrittlement zone, defining a layer to be detached, within the thickness of a semiconductor material wafer.
  • the wafer may be, for example, of silicon.
  • this creation of the embrittlement zone may be effected by implantation of atomic species. According to the state of the art, such implantation is usually performed so as to define a uniform concentration of implanted atomic species in the embrittlement zone. To this end, the implantation dose is thus normally the same for all the regions of the embrittlement zone.
  • this implantation is on the contrary performed by locally creating an implantation overdose in a predetermined region of the wafer.
  • This region of the wafer will thus receive a greater dose of atomic species than the remainder of the wafer.
  • this local implantation overdose may be obtained by first implanting the wafer in a spatially homogeneous manner, then by later locally implanting an overdose into the desired region.
  • it may likewise be envisaged to displace the species beam of an implanter over the wafer surface, so as to sweep the surface of this wafer.
  • the kinematics of beam displacement over the wafer surface will be defined so as to perform a spatially homogeneous implantation on the wafer surface, except for the desired specific region into which it is desired to implant an overdose and above which the implanter is immobilized for a time sufficient to create this overdose.
  • the wafer is fixed and it is the implanter beam which is displaced. It is likewise possible to displace the wafer in a controlled manner, facing a fixed beam.
  • the embrittlement zone thus created will thus comprise a region having a locally greater concentration of implanted species.
  • this region (which corresponds to a starting region, as will be seen) is at a super-embrittled region of the embrittlement zone.
  • This super-embrittled region is preferably situated at the periphery of the wafer.
  • the step of constituting the embrittlement zone has thus been performed so as to create in this zone a localized region where the embrittlement zone has a greater embrittlement locally, so that this region corresponds to a super-embrittled region of the embrittlement zone.
  • This region of the embrittlement zone will conventionally be termed the "starting region"; the meaning of this term will become apparent hereinafter.
  • this region of the embrittlement zone is localized; it may for example be a region which covers an angular sector of the order of several degrees at the periphery of the embrittlement zone. It is likewise possible, according to an alternative, to constitute this specific region all around the periphery of the wafer. In this case, the angular sector covered by the starting region may be as much as 360°. And the width of this ' region having a crown shape is thus small, substantially less that one centimeter.
  • the wafer is subjected to a treatment for detachment of the layer at the level of the embrittlement zone from the remainder of the wafer.
  • the treatment makes use of an annealing.
  • This annealing permits causing coalescence of the micro-bubbles which are generated at the level of the embrittlement zone by implantation.
  • This annealing is preferably effected under conditions which permit applying to the wafer as homogeneous an amount of heat as possible.
  • An effect is sought, in the case of the invention, such that during the annealing, detachment is locally initiated at the level of the starting region, to then propagate over the whole of the embrittlement zone so as to effect complete detachment.
  • the Applicant has in fact observed that, when subjecting wafers to a "conventional" detachment annealing in which the wafers are disposed at the center of heating elements all providing the same heating energy, the detachment was initiated at the level of "hot points" or "hot regions". These hot regions correspond to places in the embrittlement zone receiving a locally greater amount of heat because of temperature inhomogeneities in the furnace. They are typically situated in the upper region (in the vertical direction) of the wafer. In the case of a conventional SMARTCUT® method, it may be advisable to use these hot regions for initiating detachment (e.g. exploit a non-homogeneous distribution of the amount of heat applied to the different regions of the wafer) .
  • Figure 1 shows a first embodiment of an annealing device which may be used in the invention.
  • the annealing applied to the wafers has the purpose, for each wafer, of favoring the detachment of the layer of material defined within the thickness of the wafer by its embrittlement zone.
  • the device 10 of Figure 1 comprises a heating enclosure 100 for receiving one or more wafers T in order to anneal them.
  • the longitudinal axis of the device 10 is vertical - this device is thus of the vertical oven type.
  • the wafers T are disposed vertically in this enclosure, and not horizontally as in the known art .
  • the wafers are received in a cage 110, which is itself supported by a support 111.
  • the support 111 rests on a cover 112 closing the throat 120 of the device.
  • Wafer retaining means 130 are furthermore provided for introducing the wafers into the device 10 and removing them after annealing.
  • the enclosure 100 is provided with an aperture 101 situated opposite the throat 120. A heat-conducting gas may be introduced into the enclosure through this aperture.
  • a plurality of heating elements 140 surround the enclosure 100. These heating elements are disposed one after the other in a substantially vertical direction.
  • heating elements may for example be electrodes capable of emitting heat when they are supplied with electricity.
  • Figure 2 gives a better view of the enclosure 100, the wafers T, and the heating elements 140 (their number being reduced in this figure for the sake of clarity) . Means not shown in the figures permit selective control of the supply of each heating element, so as to selectively control the heating power of each of these elements . In this manner, the vertical distribution is controlled of the amount of heat applied to the wafers during heating.
  • the Applicant has in fact observed that the use of a conventional vertical oven with the idea of disposing the wafers vertically therein, as shown in Figures 1 and 2, produced a vertical temperature gradient.
  • a spatially homogeneous amount of heat may be applied to the wafers T over the whole extent of the embrittlement zone of each wafer. This can be visualized, for example, by measurements of haze produced on the surface of the layers, after their detachment.
  • the lower heating elements will be supplied more than the upper elements, so as to compensate for the natural tendency of heat to rise in the enclosure and thus generate higher temperatures in the upper portion of this enclosure. It is thus ensured that the global amount of heat applied to the wafers is homogeneous over the entire embrittlement zone of each wafer.
  • the installation of Figures 1 and 2 corresponds to a preferred embodiment of an annealing device which may be used in the invention.
  • Figure 3 thus shows a device 20 capable of performing an annealing according to the invention on a wafer T, or on a plurality of wafers.
  • the wafer (s) extend substantially horizontally, in a heating enclosure 200.
  • the enclosure is provided with an aperture 201 for the introduction of a heat-conducting gas.
  • the device 20 has heating elements shown collectively by reference 240. These heating elements may be disposed solely above the wafers, but it is equally possible to duplicate them by similar heating elements situated below the wafers.
  • the heating elements 240 may be a series of individual heating elements (for example, electrodes or heating plates) extending in the same horizontal plane.
  • Each heating element can then be a circular ring placed concentrically to the others, the different elements having different diameters.
  • the elements are then likewise placed concentrically to the wafers when these are in the annealing position.
  • means (not shown) are provided for selective and individual control of each heating element. It is thus guaranteed that the global amount of heat applied to the wafers is homogeneous along the embrittlement zone of the wafers.
  • the heating elements 240 may likewise be a single electrode of the "heating plate” type in which it is possible to control the temperature distribution. It is likewise possible to replace the elements 240 by controlled infrared lamps, the respective supplies of which are individually controlled.
  • And elements 240 of electrode type may be combined with infrared lamps, which provide supplementary heating capable of locally adjusting the amount of heat applied to the embrittlement zone so as to constitute a homogeneous global amount of heat.
  • the heating device is capable of effecting homogeneous heating of the wafers, so as to apply a homogeneous amount of heat to the embrittlement zone of these wafers .
  • the annealing device thus applies a homogeneous amount of heat to the embrittlement zone of the wafers.
  • the amount of heat received by each wafer during this annealing corresponds to the amount of energy necessary to detach the layer from the wafer.
  • the annealing device there is obtained for each wafer a local detachment of the layer from the wafer at the level of the starting region. This initial detachment then spontaneously propagates over the whole embrittlement zone, due to the sufficient amount of heat applied to the wafer.
  • the Applicant has observed that by proceeding in this manner a particularly low surface roughness of the detached layer is obtained. This roughness is furthermore homogeneous, which is a specific benefit obtained by the invention.
  • the detachment is initiated during the annealing at the level of the hot regions mentioned above.
  • the local roughness of the detached layer is greater at the level of the hot regions than the general layer surface roughness . In the case of the preferred embodiment of the invention, this inhomogeneity of roughness is avoided.
  • the invention thus proposes, in its preferred embodiment, an alternative of a conventional version of the SMARTCUT® method: in the case of a conventional SMARTCUT® method, implantation is performed substantially uniformly over the surface of the wafer, and during the detachment annealing, the detachment is generally initiated by inhomogeneities of the amount of heat applied to the wafer, in the case of the alternative of SMARTCUT® corresponding to the preferred embodiment of the invention, on the contrary a non-uniform implantation is performed with localized overdose, and during the detachment annealing the application of as homogeneous an amount of heat as possible to the wafer is sought.
  • a starting region is likewise created at the level of the embrittlement zone of the wafer, and at the level of the starting region, the embrittlement zone between the layer to be detached and the remainder of the wafer is locally super-embrittled so as to define a starting region.
  • this starting region will in all cases permit initiating detachment, so that this then propagates over the whole surface of the embrittlement zone .

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
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Abstract

The invention relates to a method of detachment of a layer from a wafer of material chosen from semiconductor materials, the method comprising the steps consisting of: creating an embrittlement zone in the thickness of the wafer, the said embrittlement zone defining the layer to be detached in the thickness of the wafer;subjecting the wafer to a treatment to perform detachment of the layer, at the level of the embrittlement zone; characterized in that during the creation of the embrittlement zone, a localized starting region of this zone is constituted, at the level of which the embrittlement zone locally has greater embrittlement, so that this starting region corresponds to a super-embrittled region of the embrittlement zone.

Description

METHOD OF DETACHING A SEMICONDUCTOR LAYER
The present invention relates to a method of detaching a layer from a wafer of material chosen from among semiconductor materials, the method comprising the steps consisting of: - creating an embrittlement zone in the thickness of the wafer, the said embrittlement zone defining the layer to be detached in the thickness of the wafer, subjecting the wafer to a treatment for effecting the detachment of the layer, at the level of the embrittlement zone. Methods of this type are already known. These methods permit thin layers to be obtained with a possible thickness of the order of a micron or less. The layer may be of a semiconductor material such as silicon. The SMARTCUT® method is an example of a method making use of such steps. It is furthermore specified that the surface of the thus created layers should generally conform to very strict surface state specifications. It is thus common to find roughness specifications which should not exceed 5 angstroms in rms (root mean square) value. Roughness measurements are generally performed using an atomic force microscope (AFM) . With this type of apparatus, roughness is measured on surfaces scanned by the point of the AFM microscope, from l x l μm2 to 10 x 10 μm2 , and more rarely, 50 x 50 μm2 or even 100 x 100 μm2 . It is likewise specified that it is possible to measure surface roughness by other methods, particularly using a measurement of haze". This method has the particular advantage of permitting rapid characterization of the uniformity of roughness over the whole of a surface. This haze, measured in pp , arises from a method using the optical reflectivity properties of the surface to be characterized, and corresponds to an optical "background noise" given off by the surface due to its micro-roughness . As has been mentioned, the surface state specifications of detached layers are very strict in the semiconductor field. In addition, it is likewise desired according to these specifications that the roughness be as homogeneous as possible over the surface of the detached layer. And regarding this aspect the invention aims at providing a distribution of roughness which is as homogeneous as possible over the surface of the detached layer. It is to be noted that this specific aspect is not treated by existing methods, such as the ones disclosed in WO 02/05344 and EP 938 129 which do not address this aspect of homogeneous roughness over a detached layer of a wafer. Furthermore, equally strict specifications may be associated with the remainder of the wafer after detachment (this remainder being termed the "negative") . It is certainly possible to provide complementary surface treatment steps after the detachment to attain these specifications. These complementary treatments may for example make use of polishing, sacrificial oxidation, and/or supplementary annealing steps. However, it would be preferable to reduce recourse to such complementary treatments, so as to simplify and accelerate the layer manufacturing process. An object of the invention is to respond to this need. In order to attain this object, the invention proposes a method of detachment of a layer from a wafer of material chosen from semiconductor materials, the method comprising the steps consisting of: - creating an embrittlement zone in the thickness of the wafer, the said embrittlement zone defining the layer to be detached in the thickness of the wafer, subjecting the wafer to a thermal treatment to perform detachment of the layer, at the level of the embrittlement zone, characterized in that : - during the creation of the embrittlement zone, a localized starting region of this zone is constituted, at the level of which the embrittlement zone locally has greater embrittlement, so that this starting region corresponds to a super-embrittled region of the embrittlement zone, and - the thermal treatment is performed so as to apply to the wafer a substantially homogeneous amount of heat over the whole embrittlement zone. Preferred, but not limiting, aspects of this method are the following: the embrittlement zone is created by atomic species implantation, and the starting zone is created during the implantation by local implantation of an overdose of atomic species, - the detachment treatment is thermal annealing, - the annealing is performed so as to apply to the wafer an amount of heat corresponding to the energy necessary for effecting the detachment, - different heating elements situated facing the wafer are selectively controlled during the annealing, detachment is initiated at the level of the starting region during annealing, - the detachment propagates from the starting zone over the whole extent of the embrittlement zone. Other aspects, objects and advantages of the invention will become more apparent on reading the following description of a preferred embodiment of the invention, made with reference to the accompanying drawings, in which: Figure 1 is a schematic assembly diagram of an annealing device which may be used in the invention, corresponding to a first embodiment of such a device, - Figure 2 is a more detailed schematic diagram of a portion of this device. Figure 3 is a schematic diagram of an annealing device which may be used in the invention, corresponding to a second embodiment of such a device.
Creation of the Embrittlement Zone A first step of the method according to the invention consists of creating an embrittlement zone, defining a layer to be detached, within the thickness of a semiconductor material wafer. The wafer may be, for example, of silicon. In a preferred embodiment of the invention which corresponds to an alternative method of the SMARTCUT® type, this creation of the embrittlement zone may be effected by implantation of atomic species. According to the state of the art, such implantation is usually performed so as to define a uniform concentration of implanted atomic species in the embrittlement zone. To this end, the implantation dose is thus normally the same for all the regions of the embrittlement zone. In the case of the invention, this implantation is on the contrary performed by locally creating an implantation overdose in a predetermined region of the wafer. This region of the wafer will thus receive a greater dose of atomic species than the remainder of the wafer. It is specified that this local implantation overdose may be obtained by first implanting the wafer in a spatially homogeneous manner, then by later locally implanting an overdose into the desired region. As an alternative, it may likewise be envisaged to displace the species beam of an implanter over the wafer surface, so as to sweep the surface of this wafer. In this latter case, the kinematics of beam displacement over the wafer surface will be defined so as to perform a spatially homogeneous implantation on the wafer surface, except for the desired specific region into which it is desired to implant an overdose and above which the implanter is immobilized for a time sufficient to create this overdose. In this configuration, the wafer is fixed and it is the implanter beam which is displaced. It is likewise possible to displace the wafer in a controlled manner, facing a fixed beam. In all cases, the embrittlement zone thus created will thus comprise a region having a locally greater concentration of implanted species. This is locally manifested at the level of this region of the embrittlement zone by a greater embrittlement between the layer to be detached and the portion of the wafer corresponding to the remainder, so that this region (which corresponds to a starting region, as will be seen) is at a super-embrittled region of the embrittlement zone. This super-embrittled region is preferably situated at the periphery of the wafer. And because fine control is possible of the implantation characteristics, the creation of such a region with a greater concentration of implanted species is simple to perform. The step of constituting the embrittlement zone has thus been performed so as to create in this zone a localized region where the embrittlement zone has a greater embrittlement locally, so that this region corresponds to a super-embrittled region of the embrittlement zone. This region of the embrittlement zone will conventionally be termed the "starting region"; the meaning of this term will become apparent hereinafter. And this region of the embrittlement zone is localized; it may for example be a region which covers an angular sector of the order of several degrees at the periphery of the embrittlement zone. It is likewise possible, according to an alternative, to constitute this specific region all around the periphery of the wafer. In this case, the angular sector covered by the starting region may be as much as 360°. And the width of this ' region having a crown shape is thus small, substantially less that one centimeter.
Treatment for detachment Once the embrittlement zone has thus been constituted in the wafer with its starting region, the wafer is subjected to a treatment for detachment of the layer at the level of the embrittlement zone from the remainder of the wafer.
Preferred embodiment In the case of the preferred embodiment of the invention, wherein the embrittlement zone has been formed by implantation with a local overdose, the treatment makes use of an annealing. This annealing permits causing coalescence of the micro-bubbles which are generated at the level of the embrittlement zone by implantation. This annealing is preferably effected under conditions which permit applying to the wafer as homogeneous an amount of heat as possible. An effect is sought, in the case of the invention, such that during the annealing, detachment is locally initiated at the level of the starting region, to then propagate over the whole of the embrittlement zone so as to effect complete detachment. The Applicant has in fact observed that, when subjecting wafers to a "conventional" detachment annealing in which the wafers are disposed at the center of heating elements all providing the same heating energy, the detachment was initiated at the level of "hot points" or "hot regions". These hot regions correspond to places in the embrittlement zone receiving a locally greater amount of heat because of temperature inhomogeneities in the furnace. They are typically situated in the upper region (in the vertical direction) of the wafer. In the case of a conventional SMARTCUT® method, it may be advisable to use these hot regions for initiating detachment (e.g. exploit a non-homogeneous distribution of the amount of heat applied to the different regions of the wafer) . However, in the case of the invention, this initiation of detachment is already effected by the starting region, in particular permitting limiting the extent of the rough zone related to the detachment, and suppression of such hot regions can then be sought (this allowing among others to obtain an homogeneous roughness distribution over the detached layer) . Several solutions are possible for this purpose. Figure 1 shows a first embodiment of an annealing device which may be used in the invention. The annealing applied to the wafers has the purpose, for each wafer, of favoring the detachment of the layer of material defined within the thickness of the wafer by its embrittlement zone. The device 10 of Figure 1 comprises a heating enclosure 100 for receiving one or more wafers T in order to anneal them. The longitudinal axis of the device 10 is vertical - this device is thus of the vertical oven type. It will be noted that the wafers T are disposed vertically in this enclosure, and not horizontally as in the known art . The wafers are received in a cage 110, which is itself supported by a support 111. The support 111 rests on a cover 112 closing the throat 120 of the device. Wafer retaining means 130 are furthermore provided for introducing the wafers into the device 10 and removing them after annealing. The enclosure 100 is provided with an aperture 101 situated opposite the throat 120. A heat-conducting gas may be introduced into the enclosure through this aperture. A plurality of heating elements 140 surround the enclosure 100. These heating elements are disposed one after the other in a substantially vertical direction. These heating elements may for example be electrodes capable of emitting heat when they are supplied with electricity. Figure 2 gives a better view of the enclosure 100, the wafers T, and the heating elements 140 (their number being reduced in this figure for the sake of clarity) . Means not shown in the figures permit selective control of the supply of each heating element, so as to selectively control the heating power of each of these elements . In this manner, the vertical distribution is controlled of the amount of heat applied to the wafers during heating. The Applicant has in fact observed that the use of a conventional vertical oven with the idea of disposing the wafers vertically therein, as shown in Figures 1 and 2, produced a vertical temperature gradient. By selectively controlling the supply to the heating elements 140, a spatially homogeneous amount of heat may be applied to the wafers T over the whole extent of the embrittlement zone of each wafer. This can be visualized, for example, by measurements of haze produced on the surface of the layers, after their detachment. Typically, the lower heating elements will be supplied more than the upper elements, so as to compensate for the natural tendency of heat to rise in the enclosure and thus generate higher temperatures in the upper portion of this enclosure. It is thus ensured that the global amount of heat applied to the wafers is homogeneous over the entire embrittlement zone of each wafer. The installation of Figures 1 and 2 corresponds to a preferred embodiment of an annealing device which may be used in the invention. However, it is also possible to achieve such a homogeneous application of a global amount of heat using different installations. Figure 3 thus shows a device 20 capable of performing an annealing according to the invention on a wafer T, or on a plurality of wafers. The wafer (s) extend substantially horizontally, in a heating enclosure 200. The enclosure is provided with an aperture 201 for the introduction of a heat-conducting gas. The device 20 has heating elements shown collectively by reference 240. These heating elements may be disposed solely above the wafers, but it is equally possible to duplicate them by similar heating elements situated below the wafers. The heating elements 240 may be a series of individual heating elements (for example, electrodes or heating plates) extending in the same horizontal plane. Each heating element can then be a circular ring placed concentrically to the others, the different elements having different diameters. The elements are then likewise placed concentrically to the wafers when these are in the annealing position. Here again, means (not shown) are provided for selective and individual control of each heating element. It is thus guaranteed that the global amount of heat applied to the wafers is homogeneous along the embrittlement zone of the wafers. The heating elements 240 may likewise be a single electrode of the "heating plate" type in which it is possible to control the temperature distribution. It is likewise possible to replace the elements 240 by controlled infrared lamps, the respective supplies of which are individually controlled. And elements 240 of electrode type (for example, as concentric circular rings) may be combined with infrared lamps, which provide supplementary heating capable of locally adjusting the amount of heat applied to the embrittlement zone so as to constitute a homogeneous global amount of heat. In any case, in all embodiments of the invention, the heating device is capable of effecting homogeneous heating of the wafers, so as to apply a homogeneous amount of heat to the embrittlement zone of these wafers .
It is recalled that this specific aspect is ignored by previously disclosed methods, such as the ones of WO 02/05344 and EP 938 129. In operation, the annealing device according to the invention thus applies a homogeneous amount of heat to the embrittlement zone of the wafers. The amount of heat received by each wafer during this annealing corresponds to the amount of energy necessary to detach the layer from the wafer. Whatever the type of installation made use of for effecting this annealing, there is obtained for each wafer a local detachment of the layer from the wafer at the level of the starting region. This initial detachment then spontaneously propagates over the whole embrittlement zone, due to the sufficient amount of heat applied to the wafer. The Applicant has observed that by proceeding in this manner a particularly low surface roughness of the detached layer is obtained. This roughness is furthermore homogeneous, which is a specific benefit obtained by the invention. In contrast, in the case of using a conventional detachment annealing, on a wafer whose embrittlement zone comprises no starting region, the detachment is initiated during the annealing at the level of the hot regions mentioned above. In this case, it is generally observed that the local roughness of the detached layer is greater at the level of the hot regions than the general layer surface roughness . In the case of the preferred embodiment of the invention, this inhomogeneity of roughness is avoided. The invention thus proposes, in its preferred embodiment, an alternative of a conventional version of the SMARTCUT® method: in the case of a conventional SMARTCUT® method, implantation is performed substantially uniformly over the surface of the wafer, and during the detachment annealing, the detachment is generally initiated by inhomogeneities of the amount of heat applied to the wafer, in the case of the alternative of SMARTCUT® corresponding to the preferred embodiment of the invention, on the contrary a non-uniform implantation is performed with localized overdose, and during the detachment annealing the application of as homogeneous an amount of heat as possible to the wafer is sought.
Other embodiments As mentioned, it is possible to employ the invention according to embodiments different from the preferred embodiment corresponding to an alternative of a SMARTCUT® method. According to those embodiments, a starting region is likewise created at the level of the embrittlement zone of the wafer, and at the level of the starting region, the embrittlement zone between the layer to be detached and the remainder of the wafer is locally super-embrittled so as to define a starting region. During the treatment aimed at detaching the layer from the wafer, this starting region will in all cases permit initiating detachment, so that this then propagates over the whole surface of the embrittlement zone .

Claims

1. Method of detachment of a layer from a wafer (T) of material chosen from semiconductor materials, the method comprising the steps consisting of: creating an embrittlement zone in the thickness of the wafer, the said embrittlement zone defining the layer to be detached in the thickness of the wafer, subjecting the wafer to a thermal treatment to perform detachment of the layer, at the level of the embrittlement zone, characterized in that : - during the creation of the embrittlement zone, a localized starting region of this zone is constituted, at the level of which the embrittlement zone locally has greater embrittlement, so that this starting region corresponds to a super-embrittled region of the embrittlement zone, and - the thermal treatment is performed so as to apply to the wafer a substantially homogeneous amount of heat over the whole embrittlement zone.
2. Method according to the foregoing claim, characterized in that the ebrittlement zone is created by implantation of atomic species, and during the implantation the starting zone is created by local implantation of an overdose of atomic species.
3. Method according to the foregoing claim, characterized in that the detachment treatment is a thermal annealing.
4. Method according to the foregoing claim, characterized in that the annealing is performed so as to apply to the wafer an amount of heat corresponding to the energy necessary for effecting the detachment.
5. Method according to any of the foregoing claims, characterized in that different heating elements situated facing the wafer are selectively controlled.
6. Method according to one of the three foregoing claims, characterized in that detachment is initiated at the level of the starting zone during the annealing.
7. Method according to the foregoing claim, characterized in that the detachment propagates from the starting zone, over the whole extent of the embrittlement zone.
EP04744304A 2003-08-04 2004-08-04 Method of detaching a semiconductor layer Withdrawn EP1652229A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
FR0309597A FR2858715B1 (en) 2003-08-04 2003-08-04 METHOD FOR DETACHING SEMICONDUCTOR LAYER
US10/766,207 US7465645B2 (en) 2003-08-04 2004-01-29 Method of detaching a layer from a wafer using a localized starting area
PCT/IB2004/002693 WO2005013355A1 (en) 2003-08-04 2004-08-04 Method of detaching a semiconductor layer

Publications (1)

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EP1652229A1 true EP1652229A1 (en) 2006-05-03

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EP (1) EP1652229A1 (en)
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WO (1) WO2005013355A1 (en)

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Publication number Priority date Publication date Assignee Title
JP3293736B2 (en) * 1996-02-28 2002-06-17 キヤノン株式会社 Semiconductor substrate manufacturing method and bonded substrate
MY118019A (en) * 1998-02-18 2004-08-30 Canon Kk Composite member, its separation method, and preparation method of semiconductor substrate by utilization thereof
FR2811807B1 (en) * 2000-07-12 2003-07-04 Commissariat Energie Atomique METHOD OF CUTTING A BLOCK OF MATERIAL AND FORMING A THIN FILM

Non-Patent Citations (1)

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Title
See references of WO2005013355A1 *

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