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EP1027728A1 - Composant et procede de fabrication associe - Google Patents

Composant et procede de fabrication associe

Info

Publication number
EP1027728A1
EP1027728A1 EP98951490A EP98951490A EP1027728A1 EP 1027728 A1 EP1027728 A1 EP 1027728A1 EP 98951490 A EP98951490 A EP 98951490A EP 98951490 A EP98951490 A EP 98951490A EP 1027728 A1 EP1027728 A1 EP 1027728A1
Authority
EP
European Patent Office
Prior art keywords
layer
sub
component
elements
indium
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP98951490A
Other languages
German (de)
English (en)
Inventor
Xiaoming Xie
Zhongzhe Shen
Jürgen FREYTAG
Frank Stubhan
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shanghai Institute of Microsystem and Information Technology of CAS
Mercedes Benz Group AG
Original Assignee
Shanghai Institute of Metallurgy
DaimlerChrysler AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shanghai Institute of Metallurgy, DaimlerChrysler AG filed Critical Shanghai Institute of Metallurgy
Publication of EP1027728A1 publication Critical patent/EP1027728A1/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
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    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K20/00—Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating
    • B23K20/10—Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating making use of vibrations, e.g. ultrasonic welding
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    • H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body (electrodes)
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    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49503—Lead-frames or other flat leads characterised by the die pad
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    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
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Definitions

  • the invention relates to a component and a method for producing the component, in particular an electronic component with a microelectronic chip and a carrier.
  • the method of isothermal solidification is known for producing components, in particular the assembly of integrated microelectronic components on substrates, heat sinks, etc. Such a method is e.g. described in DE-A-195 31 158.
  • the microelectronic component and the heat sink are first coated with metals, at least one low-melting and one higher-melting metal being used.
  • the metallic coatings are brought into direct contact, heated with a predetermined temperature profile and pressed together during the reaction time until the reaction of the low-melting metal with the higher-melting metal is complete.
  • the low-melting component diffuses into the higher-melting component and leads to a connection layer that is stable at temperatures significantly higher than the melting temperature of the low-melting component.
  • the connection is only firm when this isothermal solidification reaction is complete.
  • the process can take up to 60 minutes at the temperatures applicable for electronic materials in the range of at most about 300 ° C. and is preferably carried out in a vacuum oven.
  • a relatively high pressure must be exerted on the connection point during the entire joining time, during which the two individual parts are being joined, so that the joining process is necessary.
  • the isothermal solidification process is a commercial manufacturing process for microelectronic components with typical throughput times of a few because of the several minutes of joining times The seconds cannot be used when the chip is placed on the carrier.
  • the invention is based on the object of specifying a method for producing a component by means of thermal solidification and a component which requires a joining time of less than one minute.
  • the invention is based on dividing the reaction time period into two time segments.
  • the first time period is characterized by the joining time period and the second time period by the remaining reaction time period.
  • the actual process of firmly joining sub-elements into a single component is carried out during a joining period within the reaction period in which the isothermal solidification takes place.
  • the joining time is preferably shorter than the reaction time.
  • a dynamic contact force in the form of vibration energy, in particular ultrasound energy, of a predetermined power acts on the component or the two sub-elements during the joining period.
  • vibrational energy is to apply frictional vibration to one of the sub-elements or both sub-elements, the abutting contact surfaces being moved against one another and mechanical and / or thermal support of the reaction process of the contact surface materials taking place.
  • the two sub-elements are particularly preferably pressed together at least at the beginning or during the exposure to vibration with a predetermined static contact pressure. It is favorable that the contact pressure acts on the component only during the joining period. It is particularly advantageous if the vibration energy and the contact force act simultaneously. It is preferred that the vibration energy is shorter than the joining time to the Allow sub-components to act, particularly preferably the vibration energy acts at the beginning of the joining period.
  • An advantageous period of exposure to vibration energy is between 50 ms and 600 ms. It is beneficial to allow the vibration energy to act for a maximum of 70% of the joining time. It is advisable to use the ultrasonic power (Pl) between 0.3 W / mm 2 and 3 W / mm 2 .
  • the static contact pressure (Fl) between 0.2 N / mm 2 and 1.5 N / mm 2 ; preferably the greatest possible contact pressure is used.
  • a preferred static contact pressure is at least 1.5 N / mm.
  • An advantageous reaction temperature is between 150 ° C and 400 ° C.
  • a favorable reaction time is between 10 s and 3 min.
  • the method is expediently carried out at least at a temperature which is higher than the room temperature in an inert gas environment.
  • the first metallic coating contains at least one layer of indium, preferably a layer sequence of gold and indium, and / or the second metallic coating contains at least one gold layer and / or a silver layer. It is particularly advantageous to bring an indium layer into contact with a gold layer at the contact point of the two sub-elements. In a further advantageous embodiment, two indium layers are brought into contact.
  • a favorable thickness of the diffusion barrier layer is less than 0.5 ⁇ m.
  • a favorable thickness of the first metallic coating is between 3 and 7 ⁇ m.
  • the thickness ratios of the two metallic coatings are expediently set approximately in the ratio of intermetallic phases that form.
  • a cheap choice is to choose the thickness of the gold layer at most about half as large as the thickness of the indium layer.
  • the indium layer is grown on a thinner gold layer, which protects any adhesion and barrier layer.
  • the first partial element is preferably formed from a microelectronic chip, in particular a silicon chip
  • the second partial element is formed from a heat-conducting body, in particular a silicon body, a ceramic body or a metal body, and has a connecting layer made of an alloy of the composition Auln and / or Auln between the sub-elements and / or a mixture thereof.
  • the connecting layer to one or both sub-elements has a diffusion barrier layer, in particular made of titanium and / or titanium, nickel and chromium. It is particularly advantageous that the connecting layer is stable at temperatures above 400 ° C.
  • FIG. 2 shows a component according to the invention after assembly according to the method according to the invention
  • FIG. 3 shows a temperature-time diagram according to the method according to the invention.
  • Isothermal solidification can be used to form very solid compounds at a relatively low temperature, these compounds being stable and resilient at much higher temperatures.
  • the underlying principle of this connection process according to the prior art is that an intermediate layer made of a low-melting point zenden metal is arranged as a film or thin coating between high-melting components. This arrangement is heated under pressure up to the reaction temperature, a liquid intermediate layer being formed. The melting point of the low-melting layer can either be exceeded or an eutectic reaction takes place between the high- and low-melting components.
  • the molten intermediate layer leads to a relatively rapid interdiffusion or reaction diffusion between the high and low melting components.
  • the following approximation to the thermodynamic equilibrium state results in an isothermal solidification.
  • a solid connection layer is formed.
  • a first sub-element 1 preferably a microelectronic chip, particularly preferably a silicon chip, carries on the contact side 1.1, which is provided for connection to the second sub-element 2, a first metallic coating with several, in particular three, sub-layers 1.2, 1.3 and 1.4.
  • the second sub-element 2 preferably a good heat-conducting substrate, which is to serve as a heat sink or heat spreader for the chip 1, likewise has a metallic coating of a plurality of sub-layers 2.2 and 2.3 on the contact side 2.1 provided for connection to the first sub-element 1.
  • the second sub-element 2 is preferably a silicon substrate or a heat-conducting ceramic or a metal substrate.
  • the partial layers 1.2, 1.3, 1.4, 2.2, 2.3 are preferably formed from different metals.
  • the outer layer of one partial element preferably has a lower melting point than the outer layer of the other partial element.
  • the outer layer 1.2 of the first partial element preferably consists of indium, preferably with a layer thickness of 3-7 ⁇ m.
  • This outer layer 1.2 is deposited on a second, preferably thinner layer 1.3, which preferably consists of the same material with which the isothermal solidification reaction then takes place during the joining process, in particular a gold layer.
  • the layer thickness of the gold layer 1.3 is expediently about 0.1 ⁇ m. It is advantageous if this second layer 1.3 is deposited on a third layer 1.4, which functions as an adhesion promoter layer and / or a diffusion barrier between the isothermally solidifying components and the chip 1.
  • the third layer 1.4 is preferably a layer combination of titanium with additives that is customary for such purposes of nickel and chrome or comparable materials.
  • An advantageous layer thickness for this diffusion barrier is approximately 0.1 ⁇ m.
  • the second layer 1.3 between the outer sub-layer 1.2 and the diffusion barrier 1.4 has the particularly advantageous consequence that when an isothermal solidification reaction sets in, the outer layer 1.2 both from the contact point and from the layer 1.3 and / or the interface to the sub-element body 1 the reaction begins, so that contamination of the reacting layer sequence out of the sub-element 1 is prevented.
  • the second sub-element 2 expediently likewise has an adhesion promoter and / or diffusion barrier layer 2.3, preferably with a composition and thickness comparable to that of the sub-element 1.
  • the outer sub-layer 2.2 of the second sub-element is advantageously formed from gold.
  • the layer thickness of the gold layer 2.2 is preferably chosen so that when the components of the outer two layers 1.2 and 2.2 of the two sub-elements 1 and 2 react completely, stable intermetallic compounds can form, preferably sockets and / or sockets 2 or a mixture thereof.
  • the gold layer thickness is only half as large as the indium layer thickness, the indium layer thickness is preferably between 4-7 ⁇ m and the gold layer thickness by 2 ⁇ m.
  • the thickness ratios of the higher-melting and the lower-melting metallic components are preferably selected so that the number of atoms contributing to the reaction is approximately in the ratio of the composition of the intermetallic phases that form.
  • the materials selected in this version have the advantage that they are compatible with one another.
  • the melting point of the indium is very low at approx. 160 ° C, so that the thermal load on the component when bonding to the heat sink is low; on the other hand, gold is often used as a protective layer for titanium layers in such processes.
  • the layer arrangement according to the invention is advantageously particularly simple because no barrier layers between gold and indium are necessary.
  • an advantage of this arrangement of the metallic layers is that the low-melting component indium only has to be deposited on a partial element. This eliminates a coating step with the low-melting component for the second sub-element.
  • an arrangement is not excluded, in which the two sub-elements are each provided with a layer of the low-melting component, in particular an indium layer, which are provided as a contact layer.
  • connection layers can be used up to about 450 ° C.
  • the two sub-elements 1 and 2 are placed one on top of the other so that the two outer layers 1.2 and 2.2, preferably an indium and a gold layer, are in direct contact and then heated to a reaction temperature T1 which preferably corresponds to at least the melting point of the low-melting component , particularly preferably between 200 ° C and 300 ° C. It is not necessary to apply contact pressure during the warm-up phase.
  • the reaction temperature Tl preferably does not reach the melting temperature of the higher-melting component.
  • a suitable inert gas flow is e.g. between 0.1 liters / min to 1 liter / min.
  • the inert gas environment is expedient, but is not decisive for the method according to the invention. In particular, the inert gas environment can be completely dispensed with in any automated method.
  • the partial elements are preferably kept at the reaction temperature T1 during the entire reaction time t1.
  • T1 reaction temperature
  • the low-melting component has melted and begins to diffuse into the higher-melting component and to react.
  • the two sub-elements 1 and 2 are subjected to vibration energy at the beginning of the reaction time tl, at least when the reaction temperature Tl is reached, and are moved against one another at their contact surfaces.
  • a favorable vibration energy is ultrasound energy.
  • Another favorable vibration energy is a frictional vibration, similar to the vibrations during a friction welding process, between the two sub-elements 1, 2, both or only one sub-element in Vibrations. This vibration energy is particularly favorable to use with large-area components and has the advantage that the load due to the lower frequency during friction welding is lower for the component compared to ultrasound.
  • the component is preferably located locally in a joining zone in which vibration energy is available.
  • the presence of the vibration energy is decisive, while the power Pl in a wide range between 0.3 W / mm 2 and 3 W / mm 2 , preferably between 0.5 W / mm 2 and 2.5 W / mm 2 , can be chosen.
  • the vibration energy Pl acts on the component at most over a joining time period t2.
  • the duration of the action of the vibration energy is preferably shorter than the joining time t2, in particular at most 70% of the joining time t2, particularly preferably the vibration energy acts on the sub-elements at the beginning of the joining time.
  • a contact pressure F1 is additionally exerted on the component in the joining zone, with which the two sub-elements 1, 2 are pressed against one another.
  • the component is preferably subjected to ultrasonic energy Pl and contact pressure F1 at the same time.
  • the contact pressure is preferably between 0.2 N / mm 2 and 1.5 N / mm 2 , particularly preferably between 0.25 N / mm 2 and 1.25 N / mm 2 .
  • a favorable contact pressure eg 1-5N. It is advantageous to select the contact pressure Fl as high as possible.
  • the joining time t2 is considerably shorter than the reaction time tl.
  • the action of the vibration energy is preferably shortened at a higher reactor temperature T1, in particular the vibration duration is between 50 ms and 600 ms, particularly preferably between 100 ms and 500 ms.
  • connection between the two sub-elements 1, 2 is already so firm that no further contact pressure and / or no further ultrasonic energy is required to move the two sub-elements 1, 2.
  • 2 stick together.
  • 2 shows a component according to the invention, which consists of two former partial elements 1, 2, which are firmly connected to a connecting layer 3, preferably indium and gold and / or sockets and / or sockets 2 or a mixture thereof.
  • the component can be removed, preferably at unchanged reaction temperature Tl, from the joining zone, the area affected by ultrasonic energy and contact pressure, and can react completely in another area, in the case of the indium-gold system, preferably for 2-4 minutes, and then on Cool down to room temperature.
  • the joining zone is immediately ready for another joining process after the joining period has ended.
  • the complete isothermal solidification reaction in the full reaction time t1 can then take place in zones of the bonding process that are less critical in terms of time.
  • the connection is so firm that normal shear tests with, for example, 0.6 kg / mm 2 are successfully passed.
  • a typical sequence of the method in a manufacturing process is that a sub-element of the structural element is placed on the second sub-element as a mounting surface, in particular a heat sink, with a conventional tool in a preferably heated joining zone, there for a joining period with the additional introduction of ultrasound or friction energy is held, and then held in a reaction zone for the remainder of the reaction period.
  • the so-called process critical The pick-and-place time of the component on the assembly surface in the process is preferably in the range of seconds, so that the joining zone can be released every second for the assembly with partial elements of a new component.
  • the isothermal solidification takes place at the reaction temperature Tl during the reaction time period tl, within which the joining time period t2 lies, preferably at the beginning of the reaction time period.
  • the joining time t2 is preferably only a fraction of the reaction time tl.
  • the method according to the invention can thus be integrated into a commercial manufacturing process in which cycle times of only a few seconds can be tolerated for such bonding processes.
  • the total time for installing, folding and connecting the sub-elements 1, 2 in the joining zone can be less than 5 seconds. This time can be optimized down to less than 1 second.
  • a component produced using the method according to the invention has a high thermal conductivity, a low electrical resistance of the connecting layer between the two sub-elements, and a high melting temperature of the connecting layer.
  • a microelectronic component produced in this way is preferably suitable for use at high powers.
  • indium and gold is particularly favorable as a low- or higher-melting metallic component, since microelectronic chips are often already supplied by the manufacturer with a gold contact on the back.
  • microelectronic chips are often already supplied by the manufacturer with a gold contact on the back.
  • Such a microle Electronic chip can then be very easily with a conventional lead frame, especially made of copper or an iron-nickel alloy, especially the so-called. Alloy 42, are connected by means of isothermal solidification.
  • An inexpensive alternative is to replace gold partially or entirely with silver.
  • an indium layer of appropriate thickness is applied at least to the chip landing area of the lead frame or chip carrier and the chip is then firmly connected to the lead frame in a method according to the invention. It is particularly cost-effective to apply an indium-containing paste to the chip landing area. It is favorable to provide the lead frame or the chip carrier with a silver layer, at least in some areas, on the area provided for receiving components.
  • an indium layer of appropriate thickness is applied to the back of the chip, which is provided as a contact surface with the carrier.
  • the indium layer is deposited on a layer sequence of thinner titanium and gold layers, while the region of the lead frame or the chip carrier, which is provided for receiving the chip, is covered with a gold layer, the thickness of which is adapted to the indium layer thickness according to the invention. It is expedient and cost-saving if only the immediate chip landing area is coated with gold.
  • contamination of the lead frame with indium is largely avoided. It is particularly favorable that no excess indium is left after the reaction. It is favorable to additionally provide the edge regions of the lead frame or chip carrier that are free of the gold layer with an indium-repellent coating.
  • the surface of the gold layer is only as large as the chip surface. It is particularly advantageous to cover the remaining chip landing area with a material that is not wetted by indium. This prevents contamination of the leadframe by molten indium during the connection process.
  • a silver layer is provided on the lead frame or chip carrier instead of a gold layer.
  • the indium layer on the back of the chip can expediently also be provided with a gold layer which is thinner than the silver layer.
  • the back of the chip provided for contacting a lead frame is coated with a layer sequence in which first a thin titanium layer, then a thin layer of gold and finally a thick layer of indium was deposited on the back of the chip.
  • the preferred layer thicknesses are approximately 100 nm titanium, approximately 100 nm gold and approximately 4 ⁇ m indium.
  • the lead frame is on the side with which the chip is to be connected according to the method according to the invention is coated with a thick gold layer which is approximately half as thick as the indium layer.
  • the lead frame is preferably made of Alloy 42.
  • a preferred gold layer thickness is approximately 2 ⁇ m.
  • the chip rear side provided for contacting a lead frame is coated with a layer sequence in which first a thin titanium layer and / or chrome layer, then a thick indium layer and finally a thin gold layer was deposited on the chip rear side.
  • the preferred layer thicknesses are approximately 100 nm titanium and or chromium, approximately 100 nm gold and approximately 4 ⁇ m indium.
  • the lead frame is on the side to which the chip is to be connected according to the method according to the invention is coated with a thick gold layer and / or a thick silver layer which is approximately half the thickness of the indium layer.
  • the lead frame is preferably made of Alloy 42.
  • a preferred gold layer thickness is approximately 2 ⁇ m.
  • the back of the chip provided for contacting a lead frame is coated with a layer sequence in which first a thin titanium layer, then a thick indium layer and finally a thick gold layer was deposited on the back of the chip.
  • the preferred layer thicknesses are approximately 100 nm titanium, approximately 2 ⁇ m gold and approximately 4 ⁇ m indium.
  • the lead frame is on the side to which the chip is to be connected according to the method according to the invention is coated with a thin silver layer which is approximately half as thick as the indium layer.
  • the lead frame is preferably made of Alloy 42.
  • a preferred silver layer thickness is approximately 2 ⁇ m.
  • the back of the chip provided for contacting a lead frame is coated with a layer sequence in which first a thin titanium layer, then a thick gold layer was deposited on the back of the chip.
  • the lead frame is on the side to which the OR chip is to be connected in accordance with the method according to the invention is coated with a thick layer of an indium-containing paste, in particular a screen printing paste, which is approximately twice as thick as the gold layer.
  • the preferred layer thicknesses are approximately 100 nm titanium, approximately 2 ⁇ m gold and approximately 4 ⁇ m indium paste.
  • the lead frame preferably consists of Alloy 42.

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Pressure Welding/Diffusion-Bonding (AREA)
  • Die Bonding (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

L'invention concerne un composant et un procédé permettant de fabriquer ledit composant. Elle concerne notamment un composant électronique, comportant une puce et un support, qui est fabriqué par coagulation isotherme.
EP98951490A 1997-10-30 1998-10-02 Composant et procede de fabrication associe Withdrawn EP1027728A1 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE19747846 1997-10-30
DE19747846A DE19747846A1 (de) 1997-10-30 1997-10-30 Bauelement und Verfahren zum Herstellen des Bauelements
PCT/EP1998/006295 WO1999023697A1 (fr) 1997-10-30 1998-10-02 Composant et procede de fabrication associe

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EP1027728A1 true EP1027728A1 (fr) 2000-08-16

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US (1) US6334567B1 (fr)
EP (1) EP1027728A1 (fr)
JP (1) JP2001522143A (fr)
KR (1) KR20010031563A (fr)
CN (1) CN1139974C (fr)
DE (1) DE19747846A1 (fr)
TW (1) TW411592B (fr)
WO (1) WO1999023697A1 (fr)

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Publication number Publication date
DE19747846A1 (de) 1999-05-06
TW411592B (en) 2000-11-11
KR20010031563A (ko) 2001-04-16
JP2001522143A (ja) 2001-11-13
US6334567B1 (en) 2002-01-01
WO1999023697A1 (fr) 1999-05-14
CN1278363A (zh) 2000-12-27
CN1139974C (zh) 2004-02-25

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