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EP0746033A3 - Improvements in or relating to semiconductor processing - Google Patents

Improvements in or relating to semiconductor processing Download PDF

Info

Publication number
EP0746033A3
EP0746033A3 EP96108739A EP96108739A EP0746033A3 EP 0746033 A3 EP0746033 A3 EP 0746033A3 EP 96108739 A EP96108739 A EP 96108739A EP 96108739 A EP96108739 A EP 96108739A EP 0746033 A3 EP0746033 A3 EP 0746033A3
Authority
EP
European Patent Office
Prior art keywords
devices
epitaxial layer
high frequency
power
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP96108739A
Other languages
German (de)
French (fr)
Other versions
EP0746033A2 (en
Inventor
Manuel L. Torreno
Michael C. Smayling
Ronald N. Parker
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Publication of EP0746033A2 publication Critical patent/EP0746033A2/en
Publication of EP0746033A3 publication Critical patent/EP0746033A3/en
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0135Manufacturing their gate conductors
    • H10D84/0142Manufacturing their gate conductors the gate conductors having different shapes or dimensions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/40Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00 with at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of IGFETs with BJTs
    • H10D84/401Combinations of FETs or IGBTs with BJTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Bipolar Transistors (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)

Abstract

A process flow which can be used to fabricate a high frequency bipolar transistor 147, a power transistor 146, and non-power MOS devices on a single substrate while maintaining superior performance. The process flow forms an initial high-voltage tank 170 in substrate 150. A thin epitaxial layer 156 is formed on the substrate which overlies the initial high voltage tank and Diffusion Under Film, DUF, region 154. The high voltage tank is extended through the epitaxial layer and power transistor 146 is formed in the high voltage tank and high frequency bipolar transistor 147 is formed in the epitaxial layer using the DUF region as a deep collector. Other types of low voltage devices 139 and 140 and mid voltage devices 141-145 and 148-149 are formed unaffected by the presence of epitaxial layer 156. A single chip transmitter 400 and a single chip receiver 410 is fabricated with high frequency transistors and power devices. A single chip disk controller 460 is fabricated with high frequency transistors and power devices.
EP96108739A 1995-06-02 1996-05-31 Improvements in or relating to semiconductor processing Withdrawn EP0746033A3 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US45989595A 1995-06-02 1995-06-02
US459895 1995-06-02

Publications (2)

Publication Number Publication Date
EP0746033A2 EP0746033A2 (en) 1996-12-04
EP0746033A3 true EP0746033A3 (en) 1999-06-02

Family

ID=23826565

Family Applications (1)

Application Number Title Priority Date Filing Date
EP96108739A Withdrawn EP0746033A3 (en) 1995-06-02 1996-05-31 Improvements in or relating to semiconductor processing

Country Status (3)

Country Link
US (2) US5767551A (en)
EP (1) EP0746033A3 (en)
JP (1) JPH09167809A (en)

Families Citing this family (37)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3575908B2 (en) * 1996-03-28 2004-10-13 株式会社東芝 Semiconductor device
JP3967440B2 (en) * 1997-12-09 2007-08-29 株式会社ルネサステクノロジ Manufacturing method of semiconductor integrated circuit device
JPH11307544A (en) * 1998-02-20 1999-11-05 Seiko Instruments Inc Bipolar transistor and semiconductor integrated circuit device
JP2000012553A (en) * 1998-06-26 2000-01-14 Mitsubishi Electric Corp Semiconductor device and manufacturing method thereof
US6306711B1 (en) * 1998-11-03 2001-10-23 United Microelectronics Corp. Method of fabricating a high-voltage lateral double diffused metal oxide semiconductor
US6091657A (en) * 1999-01-20 2000-07-18 Lucent Technologies Inc. Integrated circuit having protection of low voltage devices
US6127213A (en) * 1999-04-14 2000-10-03 United Microelectronics Corp. Method for simultaneously forming low voltage and high voltage devices
US6483131B1 (en) 2000-01-11 2002-11-19 Texas Instruments Incorporated High density and high speed cell array architecture
US6979908B1 (en) 2000-01-11 2005-12-27 Texas Instruments Incorporated Input/output architecture for integrated circuits with efficient positioning of integrated circuit elements
KR20020034561A (en) * 2000-11-02 2002-05-09 박종섭 Semiconductor device and fabricating method thereof
US6800902B2 (en) * 2001-02-16 2004-10-05 Canon Kabushiki Kaisha Semiconductor device, method of manufacturing the same and liquid jet apparatus
US6818494B1 (en) * 2001-03-26 2004-11-16 Hewlett-Packard Development Company, L.P. LDMOS and CMOS integrated circuit and method of making
US6541819B2 (en) 2001-05-24 2003-04-01 Agere Systems Inc. Semiconductor device having non-power enhanced and power enhanced metal oxide semiconductor devices and a method of manufacture therefor
US6911694B2 (en) * 2001-06-27 2005-06-28 Ricoh Company, Ltd. Semiconductor device and method for fabricating such device
JP2003197908A (en) * 2001-09-12 2003-07-11 Seiko Instruments Inc Semiconductor device and manufacturing method thereof
US6849491B2 (en) * 2001-09-28 2005-02-01 Dalsa Semiconductor Inc. Method of making high-voltage bipolar/CMOS/DMOS (BCD) devices
US20030102504A1 (en) * 2001-12-05 2003-06-05 Geeng-Chuan Chern Method of forming different oxide thickness for high voltage transistor and memory cell tunnel dielectric
JP4125153B2 (en) * 2002-02-20 2008-07-30 キヤノン株式会社 Semiconductor device and liquid ejection device using the same
JP2004214575A (en) * 2003-01-09 2004-07-29 Matsushita Electric Ind Co Ltd Semiconductor device
US20050110083A1 (en) * 2003-11-21 2005-05-26 Gammel Peter L. Metal-oxide-semiconductor device having improved gate arrangement
US7205201B2 (en) * 2004-08-09 2007-04-17 System General Corp. CMOS compatible process with different-voltage devices
KR100582374B1 (en) * 2004-09-08 2006-05-22 매그나칩 반도체 유한회사 High voltage transistor and method of manufacturing the same
JP4541902B2 (en) * 2005-01-06 2010-09-08 富士通セミコンダクター株式会社 Manufacturing method of semiconductor device
KR100652965B1 (en) * 2005-06-09 2006-12-01 삼성전자주식회사 Vertical Transmitter Transmitter
US7471570B2 (en) * 2005-09-19 2008-12-30 Texas Instruments Incorporated Embedded EEPROM array techniques for higher density
DE102006024121B4 (en) * 2006-05-22 2011-02-24 Telefunken Semiconductors Gmbh & Co. Kg Nonvolatile memory cell of a circuit integrated in a semiconductor chip, method for its production and use of a nonvolatile memory cell
US7868372B2 (en) * 2006-07-10 2011-01-11 United Microelectronics Corp. Depletion-mode single-poly EEPROM cell
DE102006038936A1 (en) * 2006-08-18 2008-02-28 Atmel Germany Gmbh Switching regulator, transceiver circuit and keyless access control system
KR100932137B1 (en) * 2007-06-08 2009-12-16 주식회사 동부하이텍 Structure of Horizontal DMOS Device and Manufacturing Method Thereof
US8264038B2 (en) * 2008-08-07 2012-09-11 Texas Instruments Incorporated Buried floating layer structure for improved breakdown
US8963241B1 (en) 2009-11-13 2015-02-24 Maxim Integrated Products, Inc. Integrated MOS power transistor with poly field plate extension for depletion assist
US20110115018A1 (en) * 2009-11-13 2011-05-19 Maxim Integrated Products, Inc. Mos power transistor
US8987818B1 (en) 2009-11-13 2015-03-24 Maxim Integrated Products, Inc. Integrated MOS power transistor with thin gate oxide and low gate charge
US8969958B1 (en) 2009-11-13 2015-03-03 Maxim Integrated Products, Inc. Integrated MOS power transistor with body extension region for poly field plate depletion assist
US20110115019A1 (en) * 2009-11-13 2011-05-19 Maxim Integrated Products, Inc. Cmos compatible low gate charge lateral mosfet
US8946851B1 (en) 2009-11-13 2015-02-03 Maxim Integrated Products, Inc. Integrated MOS power transistor with thin gate oxide and low gate charge
US20220068649A1 (en) * 2020-08-27 2022-03-03 Texas Instruments Incorporated Bcd ic with gate etch and self-aligned implant integration

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6427254A (en) * 1987-07-22 1989-01-30 Nec Corp Semiconductor integrated circuit device
JPH02112270A (en) * 1988-10-21 1990-04-24 Olympus Optical Co Ltd Bipolar/CMOS semiconductor device and its manufacturing method
EP0437939A1 (en) * 1989-12-19 1991-07-24 Texas Instruments Incorporated Integratable DMOS transistor and method of making the same
JPH03209864A (en) * 1990-01-12 1991-09-12 Nec Corp semiconductor equipment
US5348895A (en) * 1992-03-25 1994-09-20 Texas Instruments Incorporated LDMOS transistor with self-aligned source/backgate and photo-aligned gate

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4546370A (en) * 1979-02-15 1985-10-08 Texas Instruments Incorporated Monolithic integration of logic, control and high voltage interface circuitry
US4456370A (en) * 1982-11-08 1984-06-26 Xerox Corporation Charge control system
US5023690A (en) * 1986-10-24 1991-06-11 Texas Instruments Incorporated Merged bipolar and complementary metal oxide semiconductor transistor device
US4825275A (en) * 1987-05-28 1989-04-25 Texas Instruments Incorporated Integrated bipolar-CMOS circuit isolation for providing different backgate and substrate bias
US5181095A (en) * 1989-02-10 1993-01-19 Texas Instruments Incorporated Complementary bipolar and MOS transistor having power and logic structures on the same integrated circuit substrate
JP2950577B2 (en) * 1990-04-27 1999-09-20 沖電気工業株式会社 Method for manufacturing BiCMOS semiconductor integrated circuit
US5272098A (en) * 1990-11-21 1993-12-21 Texas Instruments Incorporated Vertical and lateral insulated-gate, field-effect transistors, systems and methods
US5355007A (en) * 1990-11-23 1994-10-11 Texas Instruments Incorporated Devices for non-volatile memory, systems and methods
US5296393A (en) * 1990-11-23 1994-03-22 Texas Instruments Incorporated Process for the simultaneous fabrication of high-and-low-voltage semiconductor devices, integrated circuit containing the same, systems and methods
EP0487022B1 (en) * 1990-11-23 1997-04-23 Texas Instruments Incorporated A method of simultaneously fabricating an insulated gate-field-effect transistor and a bipolar transistor
KR930008018B1 (en) * 1991-06-27 1993-08-25 삼성전자 주식회사 By CMOS device and its manufacturing method
US5204541A (en) * 1991-06-28 1993-04-20 Texas Instruments Incorporated Gated thyristor and process for its simultaneous fabrication with high- and low-voltage semiconductor devices
US5225700A (en) * 1991-06-28 1993-07-06 Texas Instruments Incorporated Circuit and method for forming a non-volatile memory cell
US5585294A (en) * 1994-10-14 1996-12-17 Texas Instruments Incorporated Method of fabricating lateral double diffused MOS (LDMOS) transistors

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6427254A (en) * 1987-07-22 1989-01-30 Nec Corp Semiconductor integrated circuit device
JPH02112270A (en) * 1988-10-21 1990-04-24 Olympus Optical Co Ltd Bipolar/CMOS semiconductor device and its manufacturing method
EP0437939A1 (en) * 1989-12-19 1991-07-24 Texas Instruments Incorporated Integratable DMOS transistor and method of making the same
JPH03209864A (en) * 1990-01-12 1991-09-12 Nec Corp semiconductor equipment
US5348895A (en) * 1992-03-25 1994-09-20 Texas Instruments Incorporated LDMOS transistor with self-aligned source/backgate and photo-aligned gate

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 013, no. 216 (E - 760) 19 May 1989 (1989-05-19) *
PATENT ABSTRACTS OF JAPAN vol. 014, no. 336 (E - 0953) 19 July 1990 (1990-07-19) *
PATENT ABSTRACTS OF JAPAN vol. 015, no. 482 (E - 1142) 6 December 1991 (1991-12-06) *

Also Published As

Publication number Publication date
JPH09167809A (en) 1997-06-24
US5917222A (en) 1999-06-29
EP0746033A2 (en) 1996-12-04
US5767551A (en) 1998-06-16

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