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DE69637117D1 - ELECTRONIC ARRANGEMENT WITH MEANS FOR COMPENSATING PARASITIC CAPACITIES - Google Patents

ELECTRONIC ARRANGEMENT WITH MEANS FOR COMPENSATING PARASITIC CAPACITIES

Info

Publication number
DE69637117D1
DE69637117D1 DE69637117T DE69637117T DE69637117D1 DE 69637117 D1 DE69637117 D1 DE 69637117D1 DE 69637117 T DE69637117 T DE 69637117T DE 69637117 T DE69637117 T DE 69637117T DE 69637117 D1 DE69637117 D1 DE 69637117D1
Authority
DE
Germany
Prior art keywords
electronic arrangement
parasitic capacities
compensating parasitic
compensating
capacities
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69637117T
Other languages
German (de)
Other versions
DE69637117T2 (en
Inventor
Godefridus Adrianus Hurkx
Petrus Gerardus Baltus
Marinus Petrus Knuvers
Cornelis Maria Hart
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NXP BV
Original Assignee
Koninklijke Philips Electronics NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninklijke Philips Electronics NV filed Critical Koninklijke Philips Electronics NV
Publication of DE69637117D1 publication Critical patent/DE69637117D1/en
Application granted granted Critical
Publication of DE69637117T2 publication Critical patent/DE69637117T2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/611Combinations of BJTs and one or more of diodes, resistors or capacitors
    • H10D84/613Combinations of vertical BJTs and one or more of diodes, resistors or capacitors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/58Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64Impedance arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Amplifiers (AREA)
  • Bipolar Integrated Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Logic Circuits (AREA)
  • Bipolar Transistors (AREA)
  • Semiconductor Integrated Circuits (AREA)
DE69637117T 1995-03-13 1996-02-15 ELECTRONIC ARRANGEMENT WITH MEANS FOR COMPENSATING PARASITIC CAPACITIES Expired - Lifetime DE69637117T2 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
EP95200600 1995-03-13
EP95200600 1995-03-13
PCT/IB1996/000112 WO1996028847A1 (en) 1995-03-13 1996-02-15 Electronic device comprising means for compensating an undesired capacitance

Publications (2)

Publication Number Publication Date
DE69637117D1 true DE69637117D1 (en) 2007-07-19
DE69637117T2 DE69637117T2 (en) 2008-02-07

Family

ID=8220085

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69637117T Expired - Lifetime DE69637117T2 (en) 1995-03-13 1996-02-15 ELECTRONIC ARRANGEMENT WITH MEANS FOR COMPENSATING PARASITIC CAPACITIES

Country Status (7)

Country Link
US (1) US5694071A (en)
EP (1) EP0760165B1 (en)
JP (1) JP4031032B2 (en)
KR (1) KR100369911B1 (en)
DE (1) DE69637117T2 (en)
TW (1) TW377518B (en)
WO (1) WO1996028847A1 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2301706A (en) * 1995-06-01 1996-12-11 Plessey Semiconductors Ltd Intergrated inductor arrangement
JP4930571B2 (en) * 2009-10-20 2012-05-16 サンケン電気株式会社 Capacitive load drive circuit

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS501635B1 (en) * 1969-10-06 1975-01-20
US3786321A (en) * 1973-03-08 1974-01-15 Bell Telephone Labor Inc Color camera tube target having integral indexing structure
US4158787A (en) * 1978-05-08 1979-06-19 Hughes Aircraft Company Electromechanical transducer-coupled mechanical structure with negative capacitance compensation circuit
US4360745A (en) * 1979-10-10 1982-11-23 Hughes Aircraft Company Depletion capacitance compensator
DE3121671A1 (en) * 1981-05-30 1982-12-16 Philips Patentverwaltung Gmbh, 2000 Hamburg "CIRCUIT ARRANGEMENT WITH AN INTEGRATED SEMICONDUCTOR CIRCUIT"

Also Published As

Publication number Publication date
US5694071A (en) 1997-12-02
EP0760165B1 (en) 2007-06-06
TW377518B (en) 1999-12-21
EP0760165A1 (en) 1997-03-05
DE69637117T2 (en) 2008-02-07
JPH10500554A (en) 1998-01-13
KR100369911B1 (en) 2003-06-19
JP4031032B2 (en) 2008-01-09
WO1996028847A1 (en) 1996-09-19
KR970703619A (en) 1997-07-03

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: NXP B.V., EINDHOVEN, NL

8328 Change in the person/name/address of the agent

Representative=s name: EISENFUEHR, SPEISER & PARTNER, 10178 BERLIN