DE60216119T2 - INTEGRATED ARRAYS OF MODULATORS AND LASERS ON ELECTRONIC SWITCHING - Google Patents

Abstract

A unit has an array of lasers having an emission surface through which beams can be emitted in a substantially vertical direction so as to define an emission side, drive electronics connected to a side opposite to the emission side of the array of lasers, and an array of modulators, located on the emission side of the array of lasers and connected to the drive electronics.

Description

The The invention relates to optical devices, and more particularly to optical ones Devices with lasers and modulators.

As indicated herein, items in the figures are designated in the form # ₁ , # ₂ , where # ₁ indicates the relevant figure and # ₂ indicates the item in that figure. For example, a reference number 7 means 218 the object 218 in 7 ,

at Some semiconductor laser systems in which one or a few edge emission lasers used in a linear array, one has external modulation used. Single-channel use of modulators with edge emission lasers in a pack is also possible. Present are however, two-dimensional arrays of edge emission semiconductor lasers not in the prior art, which is why in the prior art no integration of modulators with such lasers is possible. In addition, stand in the Prior art no modulators available with arrangements of Lasers in vertical emission format can be integrated, in particular vertically emitting cavity lasers, distributed feedback lasers (DFB) and distributed Bragg reflector (DBR) lasers.

The EP-0760544 discloses an integrated device with a monolithic formed light emitting element and an external modulator / light receiving element.

According to the invention becomes a unit according to claim 1 provided.

Further embodiments are in the dependent claims 2 to 10 defined.

As in 1 shown, we incorporate arrangements of vertical cavity modulators 1- 100 on top of an array of lasers 1- 102 which are on top of electronics parts 1- 104 (one or more chips) are integrated.

By Applying the teachings of the invention, we create large laser arrays, where each of the lasers operate with constant light output can be and the output by means of external modulation very fast can be switched on and off by integration of the modulator arrangement on top of the laser array. As a result, we can get a number of benefits achieve, including Switching lasers in a two-dimensional semiconductor laser array at rates both below and above 10 GB / s.

The Advantages and features described herein are some of the many Advantages and features arising from representative embodiments available are, and are only for support in understanding presented the invention. Of course, these are not as restrictions the one by the claims defined invention or limitations of equivalents to the claims to watch. For example, some of these benefits are mutually exclusive by: they can not be present simultaneously in a single embodiment. Are similar Some advantages are applicable to an aspect of the invention others not applicable. Therefore, this is a summary of features and advantages should not be regarded as dispositive in equivalency determination. Other features and advantages of the invention will become apparent in the following description, from the drawings and from the claims.

SHORT DESCRIPTION THE DRAWINGS

1 Figure 5 is a simplified illustration of an array of modulators on top of an array of lasers on top of an electronic integrated circuit;

2 shows a modulator with connections designed to mate with connections on a sample integrated laser device previously integrated with an electronic chip;

3 shows an alternative modulator with connections formed using a backside process to mate with connections on a laser device;

4 shows a modulator unit for use with discrete redundant lasers or a single laser with redundant active areas;

5A shows an edge emission DFB according to the prior art;

5B shows an edge emission DBR of the prior art;

6 shows the parallel transmitter-receivers produced by integrating the devices one after the other in a one-dimensional (ie, linear) arrangement;

7A shows a top or "top" emitting grating-coupled laser;

7B shows a downwardly or "down" emitting grating-coupled laser;

7C shows an upwardly or "upwardly" emitting micromirror coupled laser;

7D shows a downwardly or "down" emitting micromirror coupled laser;

8th shows a two-dimensional arrangement, which is intimately integrated with driver electronics, which are present in the integrated circuit on which they were mounted;

9 Fig. 12 is a side view of a portion of an integrated unit consisting of a two-dimensional array of lattice-coupled DBR lasers integrated by using the teachings of the invention with modulators and an electronic integrated circuit;

10 is a method according to the prior art to integrate a top side active device with electronic parts;

11 is an example of an example method of integrating a top side active device with electronics parts;

12 FIG. 10 is an example of a process for forming a topside active optical device in accordance with the teachings of the invention; FIG.

13A is a sectional side view of a portion of one in accordance with the variant of 12 of the invention processed device wafer;

13B shows an alternative variant of the process of 12 ;

14 FIG. 10 is an example of an alternative variant of a process for forming a top-side active optical device in accordance with the teachings of the invention; FIG.

15A to 15G Examples of configurations of units that can be made using devices produced in accordance with the teachings of the invention;

16 Fig. 12 illustrates methods used in the prior art to attach a plurality of down-emitting devices to form an integrated electro-optic chip;

17 Fig. 12 illustrates methods used in the prior art to attach a plurality of down-emitting devices to form an integrated electro-optic chip;

18 Figure 12 illustrates a single optical device with contact pads placed in the position specified by its manufacturer and a portion of an electronic wafer with contact pads placed in the position specified by its manufacturer;

19 Figure 12 illustrates a single optical device with contact pads placed in the position specified by its manufacturer and a portion of an electronic wafer with contact pads placed in the position specified by its manufacturer and not all aligned;

20 Figure 5 illustrates, in a simplified high-level overview, an example method in accordance with the teachings of the invention;

21 and 22 illustrate several different examples of access route variants;

23 Fig. 10 illustrates an optical arrangement in which fibers are carried from the substrate;

24 Fig. 11 illustrates an optical arrangement which accommodates an array of microlenses;

25 FIG. 12 illustrates an example process for generating a variant of an electro-optic chip in accordance with the described techniques; FIG.

26 FIG. 12 illustrates an example process for generating a variant of an electro-optic chip in accordance with the described techniques; FIG.

27 FIG. 12 illustrates an example process for generating a variant of an electro-optic chip in accordance with the described techniques; FIG.

28 FIG. 12 illustrates an example process for generating a variant of an electro-optic chip in accordance with the described techniques; FIG.

29 FIG. 12 illustrates another optoelectronic device that operates in a similar manner to the devices of FIG 25 to 27 is produced;

30 illustrates a process useful for bottom-active devices;

31A Figure 11 illustrates a process useful for top-side active devices;

31B illustrates the process by which the via holes are coated but not filled, and can aid in alignment;

31C shows an optical chip whose contacts are redirected by patterning tracks on the substrate to match the contacts on another chip;

31D Figure 11 shows the contacts on an optical chip, which are redirected by patterning tracks on the substrate to match the contacts on an optical chip;

32 illustrates a similar process as in 31A shown except that no carrier is used;

33 Figure 4 illustrates a connection chip or adapter chip used to connect various devices;

34 Fig. 12 illustrates another alternative implementation, which is another variant of the adapter or connection chip variant that is usable for top-side active devices;

35A Figure 4 illustrates the stacking of two or more devices using one of the techniques in accordance with the invention;

35B Figure 12 illustrates a modulator stacked on top of a laser using one of the techniques in accordance with the invention;

36 Fig. 10 illustrates an arrangement of, for example, one hundred lasers produced using one of the techniques in accordance with the invention;

37 Figure 12 illustrates the steps in creating an array for a DWDM application using one of the techniques in accordance with the invention;

38 illustrates the process of 37 from a plan view;

39 Fig. 10 is a flow chart for an example process in accordance with the invention;

40 shows the different components as they are in accordance with the process of 39 to be joined together;

41 Fig. 10 is a flowchart for another example process in accordance with the invention; and

42A to 42D show example compilations constructed in accordance with the invention in accordance with the teachings described therein.

DETAILED DESCRIPTION

The commonly transmitted U.S. Patent Application Serial Nos. 09 / 896,189, 09 / 897,160, 09 / 896,983, 09 / 897,158 and 09 / 896,665 and the provisional US patent applications Serial numbers 60 / 365,998 and 60 / 366,032 describe various Ways to integrate optical devices, including, but not limited on vertical cavity surface emitting lasers (VCSELs), distributed feedback lasers (DFB) and Distributed Bragg Reflector (DBR) Lasers, with Electronic Parts, independently of, whether they are top or bottom / back are emissive to big ones form optical varistor arrangements and to produce modules containing the resulting integrated optoelectronic chips.

at high data rates, for example, about 10 GB / s or more It is difficult to laser fast enough by direct modulation of the laser turn on and off to transfer data to accomplish. This is because with direct modulation a laser while of switching electrons are fed to the laser device have to, to generate light, and then pulled out of the laser device Need to become, to turn off the light. However, this process requires a minimal amount of time and performance to execute, due to fundamental physical properties of the laser such as. the capacity the device and the decay time constant of electrons in the active Area of the laser.

If the speed higher is approaching the necessary Switching rate of the minimum time required and exceeds she finally. As a result, the process becomes extremely difficult (and finally impossible) perform, when the speeds increase.

When Episode will be at higher Speeds optical data transmission often performed using it, what is called "external modulation" at a laser stays "on" and on for a while Laser external device controls the light output. With a guy from external modulation, a device known as a "modulator" becomes between the output part the laser and the outside world placed. The modulator turns the light on and off, causing The effect generated is that the laser is turned on and off becomes. A modulator can control the light relative to the outside world Turn on and off by a number of mechanisms. For example For example, one modulator can be transparent in one state and another in one state be absorbent, a modulator in a state transparent and be reflective in another, a modulator can make changes use the refractive index to get the resonance wavelength of the Lasers move so that the cavity resonance wavelength is not more in the reinforcement area lies, or a modulator may be irrelevant to and then disruptive to the optical Properties of the laser (for example, by change the effective reflectivity one of the laser mirrors in a switchable manner).

Our mentioned above Applications and the description herein describe processes that can also be used a big one Arrangement of modulators with an arrangement of active optical Devices (e.g., laser diodes and / or detectors) on an electronic device Integrate chip.

We specifically describe herein some modulator-specific aspects the former Methods to ensure that modulators with the ones described therein vertically emitting lasers are made compatible and ensure that modulators with an electronic chip already Contains laser, be made current contact compatible.

2 to 4 show example formats for integration of an individual modulator in an array of modulators, which of course can be performed in the same way on the basis of an individual device or wafer unit.

2 shows a modulator 2- 200 with connections 2- 202 , 2- 204 that are designed to work with connections 2- 206 , 2- 208 on an integrated example laser device 2- 210 fit together previously with an electronic chip 2- 212 integrated, in this case a VCSEL. In 2 For example, the compounds for the modulator were prepared using one of the topside processes described herein. In the lower half of 2 you can see the devices after the contacts together been joined and connected.

3 shows an alternative modulator 3 300 with connections 3- 302 , 3- 304 formed using a backside process described herein to be used with connections 3- 206 , 3- 208 on a laser device 3- 210 from 2 match, and in the lower half of the figure, the devices after the contacts have been joined together and connected.

4 shows a modulator unit 4- 400 for use with discrete redundant lasers 4- 402 , 4- 404 or a single laser with redundant active areas (not shown). In this configuration, separate stands 4- 406 , 4- 408 used to make the contacts 4- 410 of the electronic chip 4- 412 physically increase so that the contacts 4- 414 the modulator unit with the raised contacts 4- 416 can be joined together. The lower half of the figure shows the modulator unit 4- 400 after passing over the lasers 4- 402 , 4- 404 accommodated with the electronic chip 4- 412 are integrated. As in the lower half of 4 shown is also a lens 4- 418 mounted on top of the modulator to allow coupling of the beams emitted by the lasers to a common fiber or other element (not shown).

As herein and in the above-mentioned Applications, the preparatory and integration processes slightly different from each other, depending on whether the lasers (or detectors) and modulators for light to be optimized from the top of the respective devices or the bottom (i.e., back) the respective devices is emitted or therefore occurs, and whether through a substrate or not.

Three representative alternative implementations, made in accordance with one of the processes described herein or the above-mentioned applications, enable interconnection between a modulator and a laser. These representative realizations are in 2 to 4 although other implementations may be made in addition to those shown herein by employing these techniques.

The basic method includes:

Integrate of lasers in a big one Arrangement on an electronic chip. As in the sections below with the titles "Integration of opto-electronic devices "and" process and products in successive Integration of multiple devices ", this is done using of either a) down-emitting lasers, a funnel or another opening etched into the substrate is, wherein the substrate is partially or completely removed to optical To allow access or without substrate removal, when the substrate is at the wavelength of the Laser is optically transparent, or b) above emitting lasers (i.e., the emission of the laser is not toward the substrate).

To ensure, that the lasers have "continuity contacts" which it enable, an electrical connection between the top of the laser wafer piece and the underside of the modulator piece via contacts on the top of the laser wafer piece and the bottom of the modulator piece Without the electrical contacts the performance of the Influence Lasers themselves. In other words, the contacts allow it, the modulators over the intermediate laser wafer electrically with the electronic wafer connect to.

Produce an array of modulators which provide optical access to the and allow the device and all their electrical contacts on the same side of the wafer piece, the closest to the lasers has come to rest, and arranged in a configuration that matches the configuration of the "via contacts" on the laser piece.

Integrate the modulators with the laser wafer piece on a similar Way like the lasers on the electronic chip in the array to get integrated.

A Number of schemes for creating the passage areas and the Formatting the optical devices (either modulators or Lasers) are discussed later in the section titled "Apparatus and Procedures for one top-side active optical device "described.

Of course, the modulators may also have a substrate attached thereto. Depending on In certain implementation, using one of our techniques (or other technique) one can make a funnel or other opening in the substrate, the substrate can be removed, or the substrate can be left alone if it is optically transparent to the laser underneath , Depending on the particular modulator and its substrate position (ie, top or back), the funnel or other opening may be directed toward the lasers or to the outside world.

While others have suggested using DFB lasers in parallel transmitters / receivers, they have typically thought and made use of edge emitting devices (ie, output parallel to the plane of the wafer). 5A shows an edge emission DFB according to the prior art, and 5B shows an edge emission DBR of the prior art. Therefore, the parallel transceivers using these edge emission devices have been produced by integrating the devices one after the other in a one-dimensional (ie, linear) arrangement. This is in 6 shown. In 6 has a printed circuit board 6 600 the individual edge emission arrangement of lasers 6 602 up along its edge 6 604 are mounted. An integrated circuit chip 6 606 containing the driver circuits for the lasers 6 602 is through a series of wire connections 6- 608 over the circuit board 6 600 with the lasers 6 602 connected.

As noted above, since our techniques are employable with any up or down emitting (or receiving) devices, we have recognized that our invention was also useful with lattice-coupled or angular-mirror coupled DFBs or DBRs, for example, because the grating or micromirror cause their emitted beams to move perpendicular to the plane of the wafer so that prior art "top" or "bottom" emitting devices have been created to facilitate testing of these devices on the wafer. 7A shows a top or "top" emitting grating-coupled laser according to the prior art, and 7B Figure 4 shows a prior art downlink or "down" emitting grating-coupled laser. Similar shows 7C a top or "top" emitting micromirror coupled laser of the prior art and shows 7D a downwardly or "downwardly" emitting micromirror coupled laser of the prior art.

As a result, our method has made it possible to configure and intimately integrate those perpendicularly emitting DFBs or DBRs in a two-dimensional array with driver electronics resident in the integrated circuit on which they are mounted, such as in 8th shown.

As we have described is the integration of modulators with lasers advantageous for a variety of lasers equally effective, provided that the light from these lasers finally emits vertically. Therefore For example, a surface emitting DFB or DBR, e.g. a latticed DFB or one with a Mirror coupled DBR with equal (or greater) success and / or advantage can be used as reachable with VCSELs.

As described herein and the above applications can by Application of the teachings of our invention described therein large two-dimensional Transmitter or transmitter / receiver arrangements produced, the VCSEL, DFB or DBR lasers and electronic parts contain.

VCSELs Although they have the advantage that they are a more mature and more available technology but VCSELs have certain limitations. The output power, they can deliver is limited. Product maturity of longer wavelength VCSELs, for Example with wavelength of 1.3 microns and above in addition, is less than shorter Wavelengths, and the chirp parameters (indicated by the wavelength span or the phase change the output shaft during switching) tend to be high. Limit these properties the usefulness of VCSELs for transmission over greater distances at ultra-high speeds. DFB lasers have excellent Features that allow fast data transfer over long distances. Accordingly are for Data transmission over long distances At speeds of more than 10 GB / s, DFB lasers are superior to VCSELs.

Unlike using VCSELs, using our method with DFBs or DBRs allows large numbers of high-power, narrow-line, low-chirp, and long-wavelength lasers to be integrated together on an electronic chip. As a result, extremely large bandwidths can be achieved (relative to the bandwidth achievable with VCSELs) because resistance losses and / or capacity slowdowns are minimized. Therefore, highly parallel (in space or wavelength), low cost, intelligent transmitters or transceivers can be made which can transmit data over several tens of kilometers, which is wider than other laser techniques such as VCSELs can happen.

As With VCSELs, there is a desire for even faster transfer rates However, in a sense, that the time it takes the DFB laser to switch, longer as the data bit rate transmission period becomes. Therefore, you can we also uncomplicated big ones Arrangements of DFB lasers with densely integrated modulators on top generate more benefits across from to reach those who use VCSELs.

About view is the process of integrating the DFBs or DBRs with the electronics parts the same as for the specific VCSEL examples are described below. The process starts with a laser wafer or wafer piece, the big numbers of surface emitting Contains DFBs or DBRs. These lasers are surface emitting, since they have an element close to their exit, for example, a Grid or a micromirror to direct the light perpendicular to the surface of the Wafers (either away from the substrate or into the substrate) couple.

ever after the device is configured to move away from the substrate emit (i.e., "emit" above), or toward (i.e., "down") the appropriate process is carried out as described in detail herein.

If the devices on the upper side emitting devices are: Laser is attached to a carrier attached; if necessary, the laser wafer substrate is removed; on the back side of the laser wafer, contacts are pattern-etched in a pattern such that they with the contacts of the electronic wafer, which drives the drivers contains match; if desired, An encapsulant is optionally placed between the laser and electronic wafers flow calmly; and the laser and electronics wafers are at the contacts attached to each other.

If the devices below are emitting devices Contacts etched on the top of the laser wafer so that they contact the contacts the electronic wafer containing the driver circuits match; and the laser wafer is then attached to the electronics wafer. Optionally, as with the process for top emitting devices sandwich an encapsulant flow to the wafers are left and / or the laser substrate made thinner if necessary or desired.

These Processes result in integrated devices which are the different ones integrated with electronic parts integrated lattice-coupled DFB laser. Although the method can be carried out without this, for commercial Mass production, however, is advantageous in conforming to semiconductor and etching techniques make these edge emission laser structures so that they etch layers and etch stop layers included in the preparation of the contact layers and possibly help with the substrate removal process.

8th Figure 3 shows in a summary manner the process steps and the end result of the process which serves as the starting point for the similar process of integrating modulators or detectors on top of the lasers in the array.

9 shows a side view of part of an integrated unit 9- 900 consisting of a two-dimensional arrangement of lattice-coupled DBR lasers 9- 902 obtained by applying the teachings of the invention described herein to modulators 9- 904 and an electronic integrated circuit 9- 906 are integrated.

In another in accordance The variant produced by the teachings of the invention may Modulators are replaced by detectors that are largely responsible for the laser wavelength are optically transparent and in a similar way on top of the Lasers are integrated. Alternatively, the modulators can be used as detectors operated to absorb a quantity of light from the lasers, when the light passes through them. In other variants both a modulator as well as a detector or two modulators below Using the same procedures over the laser are stacked.

In these cases, the detector or modulator would then provide a sample of the output power of the lasers. The absorbed light then generates a current which can be conducted and measured to the integrated circuit. If the power of the lasers changes, for example due to temperature changes or deterioration of the laser over time, the absorbed current will become proportional countries. As a result, the electronic chip could feed more current into the laser to keep the output constant or, if redundancy is provided and a laser either could not output enough power (ie, it is effectively dead) or dies, a backup Laser can be switched in its place.

ever according to the specific realization and needs, the fixed detector would be used be to absorb a small amount of light and the vast majority of the light, in which case the laser directly modulates would become.

In In other realizations, the laser is externally modulated by the upper device is used as a modulator and then a lower one Modulator is used to measure the output power by absorption of to sample some of the light, either in the "on" state or in the "off" state, or a weighted one Mean of both, for example when a modulator is in the "on" state and absorbed in the "off" state; this means that the modulator in the "on" light passes and in the "off" state blocks light. in the actual However, operation is also in the "on" state the laws of physics and the properties of devices normally absorbed a certain amount of light. As a result, in the actual Operation of the generated power in the state "on" or "off" or an average value can be used, depending on what is in the particular design Best works.

In yet other realizations become the devices in others Sequences arranged in a stack, for example: a) electronic parts, Detectors, lasers, modulators; b) electronic parts, lasers, detectors, modulators; or c) electronic parts, lasers, modulators, detectors.

contraption and methods for a top side active optical device

On the upper side emitting / processed devices are those in which the optical devices from the substrate of the wafer on which the devices have been formed (i.e., containing the optical devices) are oriented away. Subside (or back) emitting / processed Devices have their optical devices toward the substrate oriented.

On the upper side Emitting / receiving devices are the usual ones used by industry and are thus easier available, more readily available and widely understood and characterized.

Also, top side emitting lasers, receiving detectors or reflective or absorbing Modulators can easily be made at wavelengths work where the substrate for the optical devices is opaque because in these types of devices the light is not has to go through the substrate.

Besides, they are topside emitting / receiving / processed devices Integration with electronic parts easier to test than lower side devices, because contacts and optical access on the same side (top) of the Wafers are lying.

Of the Driver and control circuit part for this device is on most widely produced from silicon circuits. The electrical Contacts are also on the front (i.e., top) of the driver and control circuit part silicon wafer. Are the electrical contacts on top of the optical devices and the driver and control circuit chip, it is difficult to connect them together. The top side turning over optical devices would make electrical interconnection with the driver and control circuit part, but prevents correct optical functionality in the absence of one produced in the electronic driver chip Hole.

Others have tried other ways to integrate top emitting devices with electronics. One method is in 10 shown. In the process of 10 does the process start with a wafer 10 100 , One or more separator holes, grooves or trenches 10- 102 are formed in the epitaxial layers 10-04, and contacts 10- 106 , 10- 108 will be on top of the surface 10- 110 educated. For strength, an over-substrate 10 112 on the upper surface 10 110 attached. The substrate 10 114 of the wafer 10 100 will be completely removed. The optical devices are then placed in the epitaxial layers 10 104 Are defined. Passages or other openings 10 116 are then called from the bottom (also the "back") 118 through the epitaxial layers 10 104 to the underside contacts 10- 106 , 10- 108 produced. After an insulator (not shown) on the passageways 10 116 has been applied as neces so that no electrical short circuit occurs, conductors 10- 120 , 10- 122 on the side of the passageways 10- 116 designed to actually provide the ability to communicate with the electrical contacts. 106 , 10- 108 on the bottom 10 118 over the ladder 10 120 , 10- 122 and those on the bottom 10 118 trained contacts 10- 124 , 10- 126 connect to. For connection of the top emitting device with other electrical contacts 130 , for example on a printed circuit board 10 132 or another wafer, then solder can be applied.

The Complexity of this method, the difficulty of having an over-substrate to attach and this over-substrate over operating temperature cycles to keep it rugged, and the difficulty of reasonable yields To achieve this method make it undesirable for commercial application.

Therefore There is a need for a process that is top-sided optical Devices that integrate with electronic parts can be and do not suffer from the above problems.

However, to avoid the prior art thermal problems associated with the over-substrate, one could consider adapting the prior art method by an analogous method, not using an over-substrate, and etching through the substrate, as in US Pat 11 shown.

In the process of 11 is a wafer 11- 200 etched and doped to form the optical device 11- 202 train. Contacts 11- 204 , 11- 206 are formed on the device. The substrate 11- 208 is removed to allow the etching of passages. Passages 11- 210 are then passed through the substrate 11- 208 etched until the contacts 11- 204 , 11- 206 reached on top of the device. A dielectric (not shown) coating is made on the via wall and a conductor material is placed in the hole, on top of the dielectric, to form contacts 11-13. 212 , 11- 214 forming from the back to the contacts 11- 204 , 11- 206 extend on top. Thereafter, solder or other electrically connecting material 11- 216 be given to the contacts to connect the device with another device.

The process of 11 While addressing the problems of the prior art, particularly those caused by the over-substrate, this process does not address the other problems of the prior art. For example, alignment between the features on the two sides of the wafer still needs to be done correctly, so there is still a risk of damaging the optical devices, especially as the device densities per chip become larger.

Therefore we have a manufacturing technique for generating top emitting / receiving modulating structures such as e.g. VCSELs, detectors or modulators designed to be tightly integrated with electronic circuits can be. It allows it, orientation-dependent Processing only on the top of the optical devices take place so that the need for backward alignment machining, at the precision elements to align on two sides of a wafer relative to each other, diminished if not eliminated.

There new VCSEL developments first in top emitting devices be realized possible our method using the latest techniques, for example the current one VCSELs with 1310 microns or 1500 microns wavelength.

In addition, will by applying the teachings of the invention, the costs are reduced since The devices can be produced by many suppliers as "off-the-shelf" items instead To manufacture special purpose devices.

Our Method can also result in improved product lifetimes and overall yields result in the individual manufacturing steps industry standard semiconductor processing techniques be used.

By Application of the teachings of the invention is a higher density of interconnections possible. As a result allows in some implementations, the invention seals interconnect distance, such as. as dense as a 20-micron distance in current techniques and smaller in the future.

By Formation of interconnections through the substrate are Furthermore Interconnection points are not limited to the periphery of the chip. The entire otherwise unused surface represents potential interconnections to disposal.

By Application of the teachings of the invention may provide more direct interconnections between driver circuits and optical devices become. This lowers the resistance, capacitance and inductance of the interconnection. As a result, parasitic sizes are reduced, resulting in lower power and drive requirements and increased device speed aims.

In addition, will the manufacturability improves as the interconnections are made can be when the optical device is in either platelet or wafer form. In addition, in both cases the interconnections all at once in platelets or wafers made become. Alternatively, in alternative variants, a similar Technique used in which both the optical devices as well as the electronic chips are individual platelets, wherein the optical devices are on platelets and on a driver circuit wafer or the optical devices and driver circuits both are still in wafer form.

One Another advantage is that the passages used to form the Compounds are used while the manufacture of an optical device can be made. Besides that is substrate removal is easy, and the process does not require any additional Processing as soon as substrate removal takes place.

One Another advantage is that the process is straightforward for integration different combinations of acoustic, thermal, optical, mechanical sensors and active devices with each other or for combination of two, three or more devices / wafers / chips with each other can be used.

One Another advantage achievable by applying the teachings of the invention is, is better thermal management From the top emitting VCSELs, as they heat dissipation to the driver and Get control circuit part.

Yet an advantage obtainable by applying the teachings of the invention is, that the installation of an optocoupler, a front panel, MEMS detectors, optical combiners, beam splitters, lenses, Microlenses or other optical or electrical devices can be accommodated in the manufacturing process.

Of course it is Another advantage of the invention is its applicability to both light-emitting as well as light-detecting devices.

Of the completeness Herein, specific details with respect to various will be described herein Aspects and variants of the current invention are given.

We have developed a process where the top emitting Lasers, detectors on the upper side or machined on the upper side Modulators (hereinafter referred to collectively as "top-side optical devices") are generated will be easily integrated on electronic chips can.

Overview includes in accordance with the invention the process of forming top-side devices, which can be integrated with electronic parts and not with the problems of the prior art, the etching of deep trenches of down the top into the substrate of the device containing the device Wafers and patterns of dielectrics and conductors on the walls of the ditches, so that the ladder extends all the way to the bottom of the trenches. The substrate is then removed, either straight down to the point where the bottom of the ladder area is exposed in the trench, or until a small hole with the worn side of the substrate the moat connects while enough residual substrate is left, around the top optical devices from damaging To protect levels of stress.

With this overview, an entire example process for forming a top-side optical device in accordance with the teachings of the invention will now be described with reference to FIG 12 presented in detail.

As in 12 shown is an optical wafer 12- 300 , the epitaxial layers 12- 302 on a substrate 12- 304 contains a meaningful starting point (step 12- 3000 ) for this example.

The optical devices 12- 306 (only one of them is shown) are defined, for example with a combination of doping, patterning, etching, oxidation and metallization (steps 12- 3002 , 13- 3004 ).

Deep trenches 12- 308 are etched into the substrate from the top of the wafer, for example between about 20 microns and about 150 microns, or slightly more into the substrate, which ensures that the profile of the trenches is acceptable to maintain good coverage of a later deposited conductor (For example, by making the slope of the wall either vertically or diagonally inwards (seen from above) instead of diagonally outwards).

Dielectric material (not shown), if short-circuiting is to be feared, and conductor 12- 310 , 12- 312 are deposited to provide positive and negative device contacts 12- 314 , 12- 316 (one of them is in the view of 3 hidden) for the top-side optical devices. In an alternative variant, the substrate may be used as one of the contacts, in which case only a deep trench must be made. Similarly, if a device with three or four ports, for example, a combined laser detector device, a laser modulator, or a laser modulator detector, is generated, then enough passages or trenches will be created. 308 For example, a four-terminal structure would require four or fewer trenches, depending on whether the substrate is being used as a contact or whether it is possible to fabricate contacts for all appropriate points on topside optical devices. combine several of the contacts in a single trench). Next, the substrate 12- 304 removed to the point where the conductors are exposed at the bottom of the trenches so that contacts 12- 318 , 12- 320 can be formed, or they can be placed on the bottom of the wafer.

At this time, the topside optical device 12- 322 able to close tightly with an electronic chip 12- 324 to be integrated, which contains, for example, driving and control circuit parts.

At a later time, connecting the optical wafers to the topside optical device 12- 322 and the electronic chip 12- 324 an integrated optical unit.

In some variants are a polymer, for example polyimide, or spun glass on the trenches added after the contacts have been made or after connecting, to give strength to the contacts or to damage the contacts Prevent contacts.

In another alternative variant, the processing is as described above, except that the removal of the substrate does not stop when the conductor layer is reached. Instead, the ablation continues until there is a hole in the conductor layer. This difference is in 13A and 13B representing the method of this variant of those of 12 face.

13A is a sectional side view of a portion of one in accordance with the variant of 12 of the invention processed device wafer. In 13A the hole 13- 400 made so that it has sloping walls 13- 402 Has. Insulating dielectric 12- 404 and ladder 13- 406 are added. The substrate 13- 408 is then removed. As in 13A however, ablation stops at a point between a state in which the conductor 13- 406 is exposed, and at one point before breaking the conductor surface 13- 410 ,

As in 13B In contrast, ablation continues until it has an actual opening in the inner surface. 410 of the conductor 13- 406 (and any dielectric that may be present on the surface).

If, by machining in accordance with this variant, the top-side optical device 13- 412 with a solder 13- 414 on the appropriate contact 13- 416 an electronic chip 13- 418 is brought into contact and the solder 13- 414 capillary action pulls the molten solder 13- 414 up into the cavity 13- 400 ,

This gives at least two advantages. First, the passing of the solder in the hole the two pieces tends towards each other and in alignment. Thus this variant is so to speak self-aligning. Second, pulling the solder helps in the hole ensure a good electrical connection between the two devices.

14 is an example of an overall process similar to that of 12 except that it is an example of a variant that uses the technique of 13B used.

15A to 15L show some of the many configurations of devices that are in compliance can be made with the present invention, including a top-side optical device, for example a top side active laser 15- 600 , a topside active detector 15- 602 or an upper side modulator 15- 604 in accordance with the present invention in conjunction with another laser 15- 606 , Devices with a detector 15- 608 or modulator 16- 610 relative to a substrate 15- 612 the top-side optical device.

integration of opto-electronic devices

16 and 17 illustrate methods used in the prior art to attach a plurality of bottom emitting (or detecting) (also called "backside emitting (or detecting)" devices to form an integrated electro-optic chip.

In accordance with the method of 16 For example, multiple lasers are mounted on a wafer substrate 16- in a conventional manner. 102 as well as a plurality of detectors (interchangeably referred to herein as photodetectors) on their own or on a substrate common to the lasers. Typically, the junction between the optical devices 16- 106 , 16- 108 and the substrate 16- 102 nearest part 16- 104 of the substrate 16- 102 of a material which is optically transparent at the wavelength at which the optical devices operate. The devices 16- 106 , 16- 108 are then etched using conventional techniques such as wet or dry etching to form trenches. 112 in the middle of the devices 16- 106 , 16- 108 etch them into a series of discrete individual devices with 16- 106 or detectors 16- 108 separate. Depending on the particular technique used, the etched trenches may be 16- 112 before reaching the substrates 16- 102 stop or partially into the substrates 16- 102 extend into it. Following the etching, the substrates 16- 102 and their associated devices turned over, in place over a silicon (Si) electronic wafer 16- 114 oriented and using conventional flip-chip contacting techniques with the Si electronics wafer 16- 114 connected. Following contacting, the entire substrates 16- 102 by conventional mechanical polishing techniques, conventional etching techniques, or a combination thereof to an extremely thin thickness on the order of about 5 microns or less, to allow dense optical access to the devices, and to provide an integrated electro-optic wafer. 116 to create.

Optionally, the integrated electro-optical wafer 16- 116 then patterned using conventional techniques to protect the individual lasers, and the individual detectors are coated with an antireflective (AR) coating. 118 coated.

One with the technique of 16 related alternative method is in 17 shown. In this method, lasers and detectors are formed as described above. However, the technique of 17 used, the trenches 17- 112 into the substrates 17- 102 etched. The substrates 17- 102 and their associated devices are then flipped over, in place over a silicon (Si) electronic wafer 17- 114 aligned and using conventional flip-chip bonding techniques with the Si electronics wafer 17- 114 connected. Following the contacting, the substrates 17- 102 then completely removed by conventional polishing techniques, conventional etching techniques, or a combination thereof to provide dense optical access to the devices and to provide an integrated electro-optic wafer 17-17. 116 to create.

Optionally, the integrated electro-optic wafer 17- 116 then patterned to protect the individual lasers, and the individual detectors are coated with an anti-reflection (AR) coating.

The techniques of 16 and from 17 each allow optical fibers or optical lenses to get close enough to the devices to capture the associated light without allowing light from adjacent devices to get in and interfering with any of these adjacent devices, a phenomenon known as "crosstalk." Typically, this requires that the separation distance between a device and an optical fiber or optical microlens be less than 100 microns.

In addition, both techniques ensure that there are no substantial absorbent layers over the active area of the devices that prevent the light from escaping, as the ablation technique of 17 the thickness of the whole substrate 16- 102 reduced to about 5 microns or less and the method of 17 the substrates 17- 102 completely removed and leaves many completely independent optical devices.

But These two techniques characteristically produce optoelectronic Chips that are in use heat dissipation problems have and leave the individual devices more sensitive against thermal and mechanical stresses during the Production process are generated, whereby the lifetimes of shortened individual devices and, accordingly, the yield and overall chip life be reduced.

In addition, for the method both of 16 (where the substrate is extremely thin) as well 17 (where the substrate is completely removed) transmit stresses experienced by the devices primarily to the very thin layer of the optical device, which is the structurally weakest part of the device.

Therefore There is a need for a way, an integrated optoelectronic To produce chip that is not so sensitive to the thermal and design stresses that are out of processing and / or Use result.

There are also it for Manufacturer of optoelectronic devices two ways, the optical and get electronic wafers - they can do either or both make yourself, or you can obtain one or both from a third party. When making both the optical devices (interchangeable for simplicity as "optical chip") as also the electronic wafer (interchangeable for simplicity as "electronic Chip ") the manufacturer can take action Make sure the contact marks on both are correct are placed to be aligned with each other when the optical chip over the electronic chip is positioned. Typically but electrical and optical chips are not constructed at the same time, even if they are constructed within the same organization and be made. If there is no close coordination within the Organization with regard to the construction of both the optical as well as the electronic chips, can therefore even at a single manufacturer is easily a lack of correspondence between Contact spots occur on both chips - especially if one or more both also mindful of sales be constructed to third parties or integration with devices from other sources. Besides, it will do the following Improvements or changes possibly necessary to the construction of one of them Location of the pads to change, causing a pad misalignment introduced becomes where no one was before.

Yet worse, if the electronic chip is constructed with a Variety of different optical chips to be used the optical chips but as a commodity purchased from third parties (for Example of chips containing: top emitting vertical cavity lasers, bottom emitting vertical cavity lasers, distributed feedback lasers (DFB) or distributed Bragg reflector (DBR) lasers (which each better chirp and line width characteristics for long-haul applications have) detectors receiving at the top or receiving at the bottom Detectors used for Sales to many unrelated users is to be mass produced It is unlikely that the contact marks on the optical Devices are all in the same place, even if they are otherwise compatible with the electronic chip.

For example, as in 18 9, a single optical device has 9- 300 Contact patch 9- 302 , 9- 304 placed in the position specified by their manufacturer. Part of an electronic wafer 9- 306 also has contact spots 9- 308 , 9- 310 on which an optical device can be connected and placed in the position specified by its manufacturer. When the optical device for flip-chip contacting is brought upside down with the electronic wafer, the contact spots 9- 302 , 9- 304 , 9- 308 , 9- 310 not be aligned by both, as in 19 shown.

This represents a problem in that it limits the ability to "mix and match" devices. in addition, will remember a chip connection with a certain other Chip designs and generates later ones Events the need to use a different device to use other contact arrangement, so will all for the original Device performed Planning and coordination for the new device irrelevant.

Therefore There is a further need for a process that has the capability promotes, To mix and match devices without it Coordination between the designers of one of the devices or the use of a standard or common contact placement scheme gives.

Besides that is it in some cases he wishes, some of the devices, especially the detectors, with an AR coating to coat.

A AR coating prevents light from reaching the top of a detector device and due to differences in refractive indices the interface Detector air is reflected. This is important for detectors as reflected Light is light that does not enter the detector itself and therefore can not be converted into electrical signals (i.e., from a system perspective is lost Light').

Therefore an AR coating optimizes the collection efficiency of the detector, because it prevents light from being reflected at that interface.

laser however, need an upper mirror with very high reflectivity to work. AR coating on a laser changes the reflectivity of the laser upper mirror. As a result, it affects at least the laser action unfavorable to the laser, if she does not do it thoroughly from laser activity keeps.

Has a laser both lasers and detectors in an array, so would, to provide only the detectors with an AR coating, conventional Reason prescribe that a special pattern of the wafer carried out will be to the lasers during to protect the AR coating deposition phase to ensure that these laser devices are not covered with the AR coating.

Of the Protection or dissimilar treatment of various different ones Devices on the wafer require additional processing steps, which time costs and increases therefore the processing costs. It also leads the way one, the protected one Damage devices. After all forces it to protect the electrical contact pads as well.

Also caused disparate treatment of devices other processing problems when the machining must be done on a chip, the electrical Has contact spots in the same zone. For example, has a chip electrical contacts near the devices and are electroplated, electroless plating, thermal evaporation, e-beam evaporation or sputtering techniques used to solder on the contact pads to place it, it makes the height resulting solder bumps difficult to pattern zones to protect laser from AR coating as the solder bumps a lot greater than the optical devices are.

the The state of the art lacks a way to eliminate the need for a protective layer over to eye the lasers while the entire wafer (i.e., lasers and detectors) with AR coating can be provided.

Therefore There is a further need for a way of integration of several types of devices on an electronic chip to enable so any extra Processing steps, such as Anti-reflective coating, on the whole Wafers can be performed at once and without special patterning after integration can.

We produce optoelectronic chips, which in some variants a or more of the following benefits: allowed use a lower operating current, reducing power consumption and heat generation be reduced; takes care of better distribution of heat, which generates what allows the lasers to be at lower Temperatures run, increasing their useful life and / or better wavelength control allows becomes; and / or has a higher one constructive integrity, what in less defects and elevated Device lifetime results.

We have continued to devise a way, optical and electronic Integrate chips to an integrated optoelectronic device to generate, independently of whether the constituent devices in a coordinated manner or compatible electric matching Have contact points.

And furthermore, we have devised a way, an integrated one Optoelectronic device to produce in which a total Wafer with dissimilar devices with an AR coating can be provided without special processing to the laser protect, or influencing their ability to laser action.

If optical devices integrated intimately with electronic chips four attributes are desired, to be reliable to produce integrated optical devices.

First, it must be possible to get optical fibers or optical lenses so dense that they capture the light without crosstalk. Second, there must be no absorbent layers over the active area of the devices that would prevent the light from escaping or entering the particular devices. Third, the devices should adhere so much thermal mass that effective heat dissipation is possible. Fourth, the structural integrity of the device should be maintained during processing so that stresses or strains experienced by the device do not affect device performance.

As noted above, the methods of 16 and 17 satisfy the first two attributes, but none of these methods satisfied the third or fourth since no method results in large thermal mass adhering to the devices (ie the substrate of the devices) or reduces device stresses.

Although the applicants are unaware whether there is such a case in the prior art or otherwise, the method of 16 may be performed to satisfy the fourth attribute by leaving a thicker layer of substrate on the device. However, this could probably only be done if the operating wavelength of the particular devices is very transparent to the wavelengths at which the devices are operated. Moreover, in many cases, this would reduce, if not nullify, the ability to satisfy the first attribute, and would likely also adversely affect the operation of the laser device until the lasers were redesigned, for example, to emit into a different semiconductor material than that, which is designed for emission in air. In addition, if thicker substrates were left, it would be necessary to provide the structure with an AR coating to prevent optical feedback into the laser. In addition, such a method would likely also preclude the use of commercially available prefabricated optical semiconductor devices, such as vertical cavity surface emitting lasers (VCSELs), distributed feedback lasers (DFB), or distributed Bragg reflector (DBR) lasers, which are most commonly offered by third parties.

Short we've figured out a way to design optical devices and tightly integrate an electronic chip to an optoelectronic Create a chip that can fulfill all four attributes. Besides, we can do so using devices purchased from third parties if desired. And also we offer advantages over the state of the art in the form of lower production costs, higher Yield and improved service life.

20 Figure 5 shows, in a simplified high-zone overview, an example method in accordance with the teachings of the invention. This approach overcomes shortcomings of the prior art while permitting dense optical access, eliminating absorption areas, providing greater structural integrity and having better heat dissipation properties.

In the method of 21 be a laser wafer 20- 502 (consisting of a substrate 20- 102 integrated lasers) and a detector wafer 20- 504 (consisting of a substrate 20- 102 integrated detectors), for example by making them using a conventional technique or by purchasing from a suitable third party. Alternatively, a hybrid wafer consisting of both lasers and detectors integrated with a common substrate, for example, in alternating patterns or other grouping, is manufactured or obtained.

Trenches 20- 506 are etched to process a wafer into individual devices (by etching into the substrate) or, in some cases, into suitable groups of devices, for example as shown in a commonly assigned copending application entitled "Redundant Device Array" (U.S. which is incorporated herein by reference) by etching into the substrate at some locations while stopping etching at other locations before reaching the substrate.

Alternatively, since the invention does not require the production of the optical chip itself in itself (i.e., the generation of the wafer, growth of the devices or etching for generating discrete devices), the above would be completely skipped if the optical device wafer is purchased rather than manufactured.

The optical device wafer is then turned over and over an electronic wafer 508 aligned and, for example, using conventional flip-chip contacting techniques or other suitable proprietary technique that accomplishes contact of the optical wafer with the electronic wafer in a suitable and reliable manner, with the electronic wafer. 508 connected.

Alternatively, and in some cases advantageous, further processing of the substrate 20- 102 as described immediately below, either before connecting an optical wafer to the electronic wafer or after bonding as long as it happens before the devices undergo cycles of operating temperature extremes through device operation, if so done. Such editing is for the above in conjunction with 16 and 17 The prior art techniques described in the prior art are unsuitable because their use would drastically increase the manufacturing cost of the devices by requiring individual contacting of each discrete device if the substrate were completely removed or drastically reducing the yield due to stress and / or stress problems if the substrate is very thin.

ever after the particular wafer (s) and optical devices, which are used are now different processing variants possible.

In In a first variant, the substrate is down to a thickness of more than 50 microns, typically within a range of between about 50 microns and about 100 Microns in thickness, typically for dense optical access required are.

In In a second variant, the substrate is to a thickness of between approximately 100 microns and about a thickness corresponding to the thickness of the optical device part removed from the wafer.

In In a third variant, the substrate will be between about 20 microns and about 50 microns removed.

In a fourth variant in which the thickness of the substrate is approximately equal the thickness of the optical device part of the wafer is not Removal required.

In a fifth Variant, the substrate is about equal to a thickness down to a thickness the thickness of the optical device part of the wafer removed.

As can be seen from the description below, in accordance with the invention, the thickness of the entire substrate also greater than the for dense optical access required thickness are kept, for Example if access routes are constructed (as described below), the paste an optical fiber or microlens in the access path with a Separation distance from the device within the dense optical Allow access area. However, it is expected that such a case will be atypical.

An access route 20- 510 Also, in the form of a trench or hole, it is also etched into the substrate over the portion of an optical device where light is emitted or detected, for example, using conventional etching or drilling techniques, while preferably leaving some of the remaining substrate intact. Depending on the particular substrate and device (s), various techniques may be used, including laser drilling, etching, or a combination thereof. In addition, depending on the particular technique used, the access paths may have straight sidewalls, sloping sidewalls, or a combination thereof.

For example, to access 20- 510 Initially, just sidewalls near the substrate exterior and near the location where the substrate meets the device has sloping sidewalls, in a gallium arsenide (GaAs) substrate that has an (aluminum gallium arsenide) AlGaAs stop layer (the optical devices For example, as VCSELs and / or photodetectors (interchangeably referred to herein as detectors) coupled to an ASIC (collectively referred to as the "probe"), the following methods may be used. 510 resist patterned on the substrate.

Tabelle 1 Thereafter, the sample is loaded into a 13.56 MHz reactive ion etcher (RIE) and parallel plates and evacuated to a pressure below about 3 × 10 ^-5 Torr prior to introduction of the process gases to reduce or eliminate residual water. Once this base pressure is reached, the first part of the etching is started with the process conditions of Table 1.

Table 1

This creates a straight sidewall extending from the surface of the Substrate one piece extends far toward the device into the substrate.

Tabelle 2 The process conditions are then optimized to remove the part of the access paths 20- 510 in this example, with GaAs or AIGaAs selectivity near infinity with minimal device damage, with the particular process conditions of Table 2.

Table 2

After that The process conditions are optimized to remove the residual Cl from the AlGaAs stop layer to getter. This serves to prevent further formation of HCl (i.e., run wet etching), after the sample has been discharged from the processing chamber. The process conditions For this Part of the process is given in Table 3.

Tabelle 3

Table 3

in the the simplest case, the access route will be as small as possible, around those left on the device To maximize substrate amount. The remaining substrate represents one rigid basic structure ready, which prevents the individual Devices experience tensions, for example during the Attachment to the electronic wafer. Depending on the particular devices and the substrate used, however, may be additional Removal performed by substrate For example, at the time the access path is created or by patterning the substrate at one time, for example following attachment to the electronic wafer.

you Note, however, that if the removal of additional Substrate is not properly planned, the heat dissipation advantage is reduced or even eliminated. Besides, yes, after how much and / or from where additional Substrate is removed, the ability can also be reduced, Withstand tensions and stresses. It is, however, to recognize that in some cases By selectively removing the substrate, the heat dissipation can be improved can by adding the overall surface the substrate is enlarged, without sacrificing many of the constructive advantages, if any. Therefore, it can be seen that the important aspect of substrate removal is that enough Substrate left on the devices is to ensure that the desired thermal and constructive Properties are achieved.

In addition, can depending on the particular technique used to provide the Access routes are advantageously carried out in some cases, before or after contact is made, for example before, after or during the trenches, which separate the individual devices, are etched.

Optional an AR coating can be applied to the detectors, if desired.

Depending on which of the three immediately preceding variants are used above, another processing takes place. 21 and 22 show several examples of different access path variants. For example, if the first variant was used, the access paths may extend completely through the substrate (as in FIG 21a . 21b . 22a . 22c . 22e shown). Alternatively, they may extend from the outside of the substrate to a depth at which the substrate remaining directly over the portion of an optical device where light is emitted or detected is reduced but not completely removed, for example, as in FIG 21c . 21b . 22b . 22d . 22f shown. In general, the substrate remaining directly over the portion of the optical device where light is emitted or detected is reduced to a thickness of about 100 microns or less to allow dense optical access to the device. In other cases, the thickness may be reduced to about 50 microns or less, although the thickness will typically range from about 20 microns to about 50 microns.

In addition, depending on the particular access path created, the access path may be further advantageously used to connect an optical fiber, for example as shown in FIG 21a . 21c . 22b shown, or a microlens, for example as in 21b . 21d . 22a . 22c shown to house.

Therefore, by using one of the above methods, an optical arrangement in which the ends of fibers are supported by the substrate (as in, for example, US Pat 14 shown), an optical assembly that receives one or more individual placed microlenses that are supported by the substrate (such as in FIG 21b . 21d . 22a . 22c . 22e shown), or an optical arrangement which accommodates an array of microlenses (such as eg in 24 shown).

As As stated above, the substrate can also be patterned to the surface roughen the substrate and the exposed surface for better heat dissipation to enlarge.

It It should be appreciated that using the herein described Techniques, i. Leave by adherent substrate, voltages are not primarily in optical devices but instead of the connecting medium or the electronic chip, both of which are better are able to withstand such tensions.

25 to 28 are each example illustrations of the process for generating variants of electro-optical chips in accordance with the techniques described above.

25a is a simplified view of a single bottom emitting laser device 25- 1002 which is part of an array of laser devices, the remainder of which is not shown.

The device 25- 1002 is separated by separation trenches 25- 1004 separated from their neighbors and is on a 25- 1006 supported by a suitable material, for example silicon (Si), silicon germanium (SiGe), gallium arsenide (GaAs) or indium phosphate (InP). While the particular material used for the substrate is likely to be determined by factors that are independent of the invention, it is noteworthy that stress due to thermal factors can be reduced by placing the expansion coefficients of the optical device substrate and the electronic wafer as close together possible to be chosen. Ideally, both should be of the same material, so the expansion coefficients of both are the same.

Electrical contacts 25- 1006 , 25- 1010 , which are used for laser excitation and control, are each mounted on a stand 25- 1012 , 25- 1014 mounted for support. An end 25- 1016 , 25- 1018 of each electrical contact acts as an electrode for the laser device, and the other end of each is a contact pad 25- 1020 , 25- 1022 on which an electrically conductive material 25- 1024 how, for example, solder is deposited to cause the device 25- 1002 to connect with an electronic wafer.

25b shows the laser device 25- 1002 from 25a after the laser assembly is turned over and over corresponding pads 25- 1026 , 25- 1028 an electronic wafer 25- 1030 has been positioned.

25c shows the laser device after it has been soldered via a 1032 between the respective contact spots 25- 1020 , 25- 1022 , 25- 1026 , 25- 1028 on the electronic wafer 25- 1030 has been fastened.

25d shows the laser device after the substrate 25- 1006 has been removed to between about 20 microns and about 50 microns.

25e shows the device after the access path 25- 1034 in the substrate 25- 1006 have been produced, in this case by means of etching instead of drilling. Note that the access path in this example is from the surface of the substrate 25- 1006 to the device plating layer 25- 1038 extends.

25f shows the device of 25e after an optional thermally conductive material 25- 1040 has been applied to the device, for example, a low viscosity thermo-epoxy (to make it flow well for good coverage) and good post-cure heat conductivity.

The Although the above has been described with reference to a laser device, the process would be for a device but be the same as the detector type except that the detector device possibly also AR-coated.

26a to 26f show another optoelectronic device, which in a similar way as in 26a to 26f shown except that this laser device uses the semiconductor material of the device as the stator 25- 1012 , 25- 1014 used.

27a to 27f show another optoelectronic device that is produced in a similar manner as the previous devices. As shown, this device is of the type in which the Semiconductor material is not used for the stands. In addition, the lasers of this optoelectronic device are grouped so that they can be used in a redundant manner. As stated above, the generation of a redundant laser array is described in the patent application entitled "Redundant Optical Device Array", incorporated herein by reference. Specially shows 28 two adjacent lasers in the laser array, in addition to generating an access path 28- 1034 Grouping trenches 28- 1302 , 28- 1304 using known etching techniques in the remaining substrate 28- 1006 be etched to a depth that the grouping trenches 28- 1302 , 28- 1304 with some of the separation trenches 28- 1004 combines. In this way, two or more lasers may be arranged to share a common fiber, with one or more serving as a backup laser, as described, for example, in the commonly assigned application entitled "Redundant Optical Device Array" Reference is incorporated herein.

One Advantage that arises from grouping the lasers in this way is that the yield for one single wafer is increased, as in a pair of grouped Lasers when a laser gets damaged the other one can be used in its place. Another potential Advantage of doing this may be increased life for the optoelectronic Be device. For example, if a pair of lasers ultimately dies, and if the lasers are independently selectable from the outside, the second one can Laser selected and be connected in place of the bad laser.

Yet Another recoverable advantage is reduced costs, one or both of the immediately preceding two advantages. As the increasing costs of increasing the number of lasers up a wafer negligible are the improved yield and / or reliability or extended life actually free.

28 also shows a functional representation of one using the technique of 18a to 18f prepared example arrangement 28- 1306 , The arrangement 28- 1306 is shown from the top of the device, so that the access path 28- 1034 and the remaining substrate 28- 1006 clearly visible over each laser. As in 28 shown, the lasers are grouped into four, with a group of 28- 1308 through the grouping trenches 28- 1302 , 28- 1304 ensuring that there is no current path between adjacent lasers in the group 28- 1308 over the substrate 28- 1006 , which is electrically conductive, gives. For purposes of illustration, some of the separation trenches 28- 1004 although, of course, no one would actually be visible from this vantage point.

29a to 29f show another optoelectronic device, which in a similar way as the devices of 25 to 27 is produced. As shown, this device is of the type in which the semiconductor material for the stator 29- 1402 , 29- 1404 is used. In addition, the lasers of this optoelectronic device are in the manner of 27 and 28 grouped, except in pairs (one of which is not shown), as can be seen from the grouping trenches.

As stated above, is there for Manufacturer of optoelectronic devices from the above Type two ways to obtain the optical devices - they can do it make yourself, or you can receive them from a third party. When manufacturing the optical devices (interchangeably referred to as "optical chip" for convenience) and electronic Wafers (interchangeably referred to simply as "electronic chip") may be the manufacturer's measures Make sure the contact marks on both are correct are placed to be aligned with each other when the optical chip over the electronic chip is positioned. Typically but electrical and optical chips are not constructed at the same time, even if they are constructed within the same organization and be made. If there is no close coordination within the Organization with regard to the construction of both the optical as well as the electronic chips, can therefore even at a single manufacturer is easily a lack of correspondence between Contact marks on both chips occur - especially if one or both also mindful of sales be constructed to third parties or integration with devices from other sources. Besides, it will do the following Improvements or changes possibly necessary to the construction of one of them Able to change the contact patch, whereby a pad misalignment is introduced where there was none before was, even within the same organization.

Even worse, if the electronic chip is designed to be used with a variety of different optical chips, but the optical chips are sourced from third parties (for example, chips containing: top emitting cavity lasers, bottom emitting cavity lasers, DFB or DBR lasers, detectors receiving at the top, or detectors receiving at the bottom) used for Ver If many unrelated users are mass-produced, it is unlikely that the pads on the optical devices will all be in the same location, even if otherwise compatible with the electronic chip.

For example, as above in connection with 18 As shown, a single optical device has contact pads placed in the position specified by its manufacturer, and an electronic wafer also has contact pads to which an optical device can be connected and placed in the position specified by its manufacturer. When the optical device is brought upside down for flip-chip bonding with the electronic wafer, the pads of both will not be aligned. Nevertheless, the invention can be used by changing the technique described above with lasers other than those mentioned in the previous examples, and also with down-emitting lasers having other pad orientations and detectors receiving top or bottom.

Advantageous allows This is the selection and use of the "best breeding" chips that provide the best individual performance for the Apply, and avoid the exclusion of suppliers, just because they a placement requirement or a placement standard for electrical Do not meet contacts or not.

in the Generally, two different processes are used, depending on whether the optical devices emit / receive at the bottom or upper side emitting / receiving.

For easy explanation the expression "below active "used, around both down-emitting devices (lasers) and below to designate receiving devices (detectors). Similarly, "top active" or "top side active" refer to both below top emitting lasers as well as top receiving detectors.

Process for below active devices

With reference to 30 Now, the process usable for bottom emitting / receiving devices (ie, bottom active devices) will be explained. To facilitate the explanation, assume that the optical wafer 30- 1502 to an optical chip 30- 1504 was processed as discussed above. Alternatively, it may be that the optical chip 30- 1504 obtained from a third party.

First, using known techniques, an insulating layer 30- 1506 to the surface of the optical chip 30- 1504 added.

Thereafter, openings or passages 30- 1508 in the insulating layer 30- 1506 generated to allow access to the contact pads of the optical chip. This is again done by laser drilling or etching, for example, in the manner used to create through holes in wafers and described below in the section entitled "Multi-Piece Fiber Optic Device and Manufacturing Technique".

Alternatively, the openings or passages 30- 1508 preformed in the insulating layer prior to attachment, for example if the contact patch locations are known in advance.

Thereafter, the openings or passages 30- 1508 made electrically conductive by an electrically conductive material 30- 1510 is applied to the sidewalls of the apertures or passages (which may optionally have previously been coated with an insulator) or the apertures or passages with the material 30- 1510 be filled.

If the openings or passages not completely filled can, can They are used to advantage in alignment. This can be done when the openings or passages like that Far are the solder bumps on the other chip in the holes can "snap", causing an initial alignment is created between the two. In addition, will in some cases Capillary action cause the solder partially into the openings or passages pulled into it when it melts, what a better connection causes and in addition helps with alignment.

If the apertures or passages are preformed prior to attachment, optionally and alternatively, the coating or filling of the apertures or passages (as desired) may also be performed prior to fastening tion of the insulating layer on the optical chip are performed.

Next, electrical traces 30- 1512 patterned on the exposed side of the insulator to create a conductive path from the orifice or passage (now coated or filled) to the site (s) on the insulator surface, which later upon placement of the contact pads on the electrical wafer be aligned. If several different orientations are possible, depending on the particular electronic chip with which the optical chip is mated, optionally a single track may create two or more alternative joints or create a joint area if the mating contacts are slightly offset from each other but within a manageable defined zone lie.

If the chip with which the optical chip is assembled, an electronic Chip is (unlike another optical chip such as a modulator or other laser for which the optical chip optically is transparent) the electric traces in a variant of the above on the electronic Chip are patterned, as generally the most electronic Chips already come with an insulating layer for contact redirection can be used.

When this is done, the process goes as described above with the joining of the two chips 30- 1514 further (in this example using flip-chip techniques), in the particular case followed by ablation of the substrate, complete removal of the substrate, or leaving the substrate with the thickness it has. Thereafter, as desired or necessary, generation of access 30- 1516 , Patterning of the chip substrate, flow of a thermal conductor, or application of an AR coating.

Process for upper side active devices

With reference to 31 Now, the process usable for upper side emitting / receiving devices (ie, upper side active devices) will be explained. To facilitate explanation, it is to be understood that the optical chip has been obtained from a third party, and the process of producing the optical chip is independent of the invention.

In addition, before at the start of the process, or both of two optional steps. The first one brings a carrier on the top surface of the optical chip. This carrier can be made from any Material is made and becomes bare for rigidity and used to hold the optical chip during the remaining processing. The second involves removing the substrate of the optical chip. This reduces the amount of material that is etched or pierced need to access the front of the optical chip To get contacts.

At this time, the process proceeds in an analogous manner to the process of FIG 30 further.

Holes or crossings be through the substrate of the optical chip to the contacts in front etched on the optical chip or bored.

The holes or passages are then with an electrically conductive material (which with an insulator coating can be lined) coated or filled, around the contacts to the back of the optical chip.

Alternatively, for example, if the contacts are such that direct access from the back of the chip through the substrate would damage the chip or would be another problem the holes or passages Etched at a suitable location or drilled and an electrical conductor can be added to the front, to connect the contact pad with the conductor coating or the holes or passages to fill.

If the apertures or passages are not completely filled, they can be used to advantage to aid in alignment. This can happen if the openings or passages are so far that the solder bumps on the other chip can "snap" into the holes ( 31B ), creating an initial alignment between the two. In addition, in some cases, capillary action will cause the solder to be partially drawn into the openings or passageways as it melts, providing a better bond and additionally assisting in alignment.

Or, when the passages or holes lie so that they are using the right place for aligned joining with coincide with the electronic chip, this can also be done and the openings or passages can using conventional contact patch techniques be connected on the front.

If the vias or holes do not coincide with the pads on the electronic chip, as in the process of integrating backside emitting / receiving devices, electrical traces on the substrate of the optical wafer of FIG 31C or the other chip from 31D , in this case the electronic chip, are patterned to provide a connection between the vias or holes and the pads on the other chip.

In this time can the chips are brought together and connected as described above.

Has been the additional one Step performed, the carrier add, so can the carrier be removed now. Is the carrier so thick that problems be created with regard to optical access, or does he have one incompatible complex refractive index, which is the transmission of Laser light through the carrier unfavorable would affect so he should be removed. In alternative variants, the carrier be left behind even if he has problems regarding optical Would cause access or has an incompatible complex refractive index by accession paths or Through holes in the carrier be patterned, preferably before attachment to the optical Chip.

If desired can Furthermore one or more additional ones optical elements such as e.g. Microlenses or waveguides on top the carrier be set.

32 shows a process similar to the one in 31 is shown, except that no carrier is used.

alternative with connection or adapter chip

In an alternative variant that is usable, for example, when both the optical chip and the other chip of different Pages are sourced or two or more chips are considered and they have different contact patch locations, However, the contact patch placement of each is known easily an "adapter" or connection chip be prepared by the teachings herein to an uncomplicated Be applied, thus reducing construction and / or manufacturing still be able to proceed.

With reference to 33 showing a connection chip or adapter chip used to connect different devices, the top 33- 1802 and bottom 33- 1804 a common wafer 33- 1800 patterned to trace 33- 1806 , 33- 1808 , 33- 1810 on each side from the specified pad locations 33- 1812 , 33- 1814 , 33- 1816 , 33- 1818 for each chip to create a common point for each one.

After that become through holes produced and funnel-shaped made or filled with a conductive material to appropriate pairs to connect, e.g. a contact on the top with its associated contact on the bottom, when the two parts are matched.

34 shows another alternative implementation, which is another variant of the adapter or connection chip variant, which is available for upper-side active devices. As shown, the adapter or interconnect chip has 34- 1902 electrical contacts 34- 1904 only on one side for direct connection to the optical chip 34- 1906 via connection spots 34- 1908 and connection to the electronic chip 34- 1910 about for example stand 34- 1912 , Jumpers, wires, bands or other known fastening devices. Since the devices in this arrangement are emitting / receiving at the top, and the adapter is located on the top, "optical passages" are also present in the adapter. 1914 provided to gain access to the optical light.

After that The optical chip can be placed on top of the electronic chip and the connection chip can be placed on top of both chips be networking in between the optical and electronic To provide chips.

When Side note, although in connection with the joining of The same can be said for optical chips with electronic chips Basic process (i.e., using a connection chip or a or a suitably patterned insulating layer or substrate, to account for patch spot misalignment) in an uncomplicated manner Be adapted to a pad misalignment between any combination of optical, electrical, electronic or electromechanical wafers.

Other variants

As stated above, it is sometimes desirable to use some of the devices especially the detectors to coat with an AR coating. However, the optoelectronic chips described above exist out of two (or maybe more) unequal types of optical devices. And it is undesirable that the AR coating the laser adversely affected.

In In a further variant of the above processes, the devices which to be provided with an AR coating, advantageously not from which are not usually associated with an AR coating to be provided.

The process essentially follows the one above 20 described process flows, wherein the laser wafer and detector wafer produced, brought upside down and attached by flip-chip bonding techniques on the electronic chip.

The Substrates are removed but only with respect to the laser substrate to the point where the substrate is relative to the thickness of the laser cavity can still be considered thick. Although different types of laser devices should need a different specific thickness the thickness of the substrate in the case of DFBs and DBRs at least some Male as big as the thickness of the laser cavity and in the case of VCSELs the distance between the mirrors. Because the exact distance from device varies to device, it is a good rule of thumb, a factor of 10x to use the thickness of the laser cavity. But if the Thickness accurate can be controlled, it can be smaller than the factor 10x, wherein the determined minimum thickness is empirical as the minimum thickness is determinable, where the AR coating the ability the laser to laser action unaffected.

A analog method can for Upper side active lasers are used. In the case of the upper side active lasers becomes a substrate (which is the above-mentioned carrier or a separate, after carrier removal may be applied substrate or, if no contact diversion is necessary or on the other chip, instead of a carrier) attached to the top of the lasers. The substrate is either after Application to a thickness as mentioned above removed or before application on such a thickness removed.

As soon as this is achieved the lasers and detectors simultaneously with an antireflective coating be provided. Therefore, there is no need for special ones Patterning or other distinction between the lasers and detectors while of the AR coating process.

Therefore, it can be seen that the above processes can be applied to various different devices. For example, using the teachings of the invention, stacking of modulators on top of lasers can be performed in an array in any compatible format. In fact, it can be done with the modulators on top or under the laser. Moreover, it can be performed regardless of whether the two (or more) devices are generated in a single epitaxy step. Similarly, topside active device stacking may be performed on top of either topside or backside active devices, as well as stacking of backside active devices on top of either topside or backside active devices, such as in FIG 35A and for a modulator mounted on a backside emitting laser, in more detail in FIG 35B shown.

devices, which have a lattice mismatch can be similarly independent stacked, which functions the individual devices carry out.

In another application, devices from different epitaxial wafers may be integrated together on a common chip at a wafer level. Therefore, lasers with different wavelengths can be mixed for applications with dual wavelength division multiplexing (DWDM) or multiple wavelength division multiplexing (MWDM), such as in 36 shown.

36 shows an array of one hundred lasers of different wavelengths, all integrated on a common chip on a wafer stage. By doing so and making each laser selectable, a particular wavelength (or combination of wavelengths) can be selected. This eliminates the need for tunable lasers that rely on analogous movements of physical parts or exhibit thermal changes or effects, where the speed is limited to microseconds and accuracy is limited.

In addition, the wavelength toggle at the same rate that data is being sent, whereby a system can be set up, the different data streams at different wavelength multiplexed at the bit rate. Thus, switching can take about 100 picoseconds (10 gigabit / s) can be achieved.

In addition, different devices of different types (eg different types of lasers, lasers and detectors, etc.) can be mixed, as in 37 shown from a sectional side view.

As in 37 shown are strips of lasers with two different wavelengths 37- 2202 , 37- 2206 as well as two different strips of photodetectors with complementary wavelengths 37- 2204 , 37- 2208 , The strips of the first devices (illustratively the laser 37- 2202 (λ1)) are applied using the processes described herein. The strips of the next devices (illustratively the detectors 37- 2204 (Δλ1)) are applied in a similar manner. Next, the strips of the third devices (illustratively the laser 37- 2206 (λ2)) in a similar manner. Finally, the strips of the last devices (illustratively the detectors 37- 2208 (Δλ2)) in a similar manner.

ever according to the particular case, the substrate or the carrier of all devices are removed or removed at once, for example if they do not integrate the next devices disturbed have, or they can removed or removed after each set of devices is appropriate.

38 shows the integration of the devices of 37 from a top view. As shown, all lasers are attached at the first wavelength. Thereafter, all photodetectors of the first wavelength are attached. Thereafter, all the second wavelength lasers are mounted, followed by all the second wavelength photodetectors, so that the end result is a fully integrated dual wavelength transmitter / receiver chip, a portion of which is on the right side of FIG 38 is shown.

While that immediately preceding example, two lasers and two detectors would have used the process independent of course, in the number of different devices Be essentially the same, whether it's up, down, active, grouped, everything laser, everything detectors etc are as an advantage of the process the ability is to mix and put together - especially on a wafer stage.

In these cases, the integration can be easily performed on the basis of an individual device (or device type), or can be done, for example, in stripes (as shown) or groups, with the left-over substrate containing the stripes 38-38. 2202 , 38- 2204 , 38- 2206 , 38- 2208 or group defined.

And Furthermore can be achieved by integrating groups of redundant lasers with one Wavelength with those with other wavelengths a highly reliable DWDM or MWDM module be manufactured at low cost.

Thus, since there are no integrated transmitter / receiver arrangements for DWDM systems available as individual devices in the prior art, by incorporating large numbers of lasers on a single chip, package size can be reduced. By integrating arrays of ten or more lasers having two or more different wavelengths on a single chip and coupling a set thereof to a single fiber, for example using a fiber-based combiner / inverse beam splitter, a holographic lens array, or the techniques of reference In the filed applications entitled "Multi-Piece Fiber Optic Device and Manufacturing Technology", multiplexing of multiple wavelengths in the output fiber can be achieved, in some cases without the need for an opto-mechanical or electro-optical element to switch performs (optical cross-linking).

In Another application of the technique can be a large arrangement be constructed, both as a pump laser and as a Communication laser is used, either at different times or at the same time.

Process and products at successive integration of multiple devices

If electrical connections between the chips, packages and printed circuit boards be made, which form an optoelectronic module typically uses wire connections consisting of short wires, to one or more of the chips, packages and circuit boards soldered become. Wire connections have because of their large length and therefore high capacity and inductance a limited frequency response.

Therefore is the use of wire bonds for making fast Optoelectronic modules undesirable.

In other cases, even if no wire connections are used, modules become generated on the basis of an integration process "from the inside out", through which the innermost components (and those outer components, which can be made in parallel), followed Integration of the combined components with each other or one or more boards, etc., until the whole module is finished.

So a process is the most common on the location of the components in the module and is typically not the Process, by which the whole module is generated, or the Effect, which is the integration of one component on another component (which causes reduced life) or their connection (the the capacity and / or increases the resistance) Has. Therefore, you can current Techniques in a less reliable or less powerful product result because integrating one component connects for a previously integrated one Weaken component, the capacity and / or increase the resistance of the connection and / or the sensitivity for thermal and / or increase physical stresses on the connection.

Even therefore, if no wire connections are used, the particular used process nevertheless an undesirable and unfavorable effect on the reliability and / or performance of the ultimately generated overall product.

We have developed a process of generating one out of one Number of components existing module allows and the components not connected by wire connections. We still have one Process that does not cause the integration of Laser components an unfavorable Effect on earlier has integrated components. As a result, our process results in a product that is more reliable as that in agreement identical product made with the processes of the prior art is.

specially we have using a hierarchical attachment process created a packaging technique that allows optical devices to attach to electronic chips, electronic chips to packs to attach and attach packages to circuit boards, everything without wire connections. this makes possible generally compounds with the highest possible frequency response (i.e., the Speed is only through component capabilities, not the wiring limited between the components). It also allows a more reliable Final product.

In overview, we have realized that when using different solder materials with different melting points and fixing temperatures and applying a specific mounting order, with relates to the fastening material currently being used, unlike the components that are currently being attached, the Process does not have the problems existing in the prior art. Furthermore our process is well suited for producing non-optical electronic modules and in particular well suited for generation of optoelectronic high power modules, where reduction of capacity, inductance and resistance are of significant interest.

• 1. ein Lötmittelmaterial mit einem ersten Schmelzpunkt und einer ersten Befestigungstemperatur verwendet wird, um die erste Gruppe von Bauteilen aneinander zu befestigen, zum Beispiel eine oder mehrere optische Vorrichtungen) an einem elektronischen Chip;
• 2. ein zweites Lötmittelmaterial mit einem zweiten Schmelzpunkt und einer zweiten Befestigungstemperatur verwendet wird, um die vorher zusammengefügten Bauteile an einem anderen Bauteil zu befestigen, zum Beispiel einen oder mehrere elektronische Chips) an einer Packung; und
• 3. ein drittes Lötmittelmaterial mit einem dritten Schmelzpunkt und einer dritten Befestigungstemperatur verwendet wird, um eines oder mehrere der in ii) erzeugten Bauteile an einem anderen Bauteil zu befestigen, zum Beispiel eine oder mehrere Packung(en) an einer Leiterplatte.

In accordance with the invention we use a sequential process whereby at least:

• 1. a solder material having a first melting point and a first attachment temperature is used to secure the first group of components together, for example one or more ops table devices) on an electronic chip;
• 2. a second solder material having a second melting point and a second attachment temperature is used to attach the previously assembled components to another component, for example one or more electronic chips, on a package; and
• 3. a third solder material having a third melting point and a third attachment temperature is used to attach one or more of the components produced in ii) to another component, for example, one or more packages on a circuit board.

Of the Process can be achieved by uncomplicated material selection and extension of the Process in the same way as above on four or more mounting levels be extended.

The used in the three or more different fastening processes Materials are specifically selected because they are thermally compatible are. In other words, as an example, the integration conditions for the Connection of the chip and the package designed to be before the attachment performed by chip and pack Connection of optical component and chip is not affected.

specially becomes the melting point of the solder for one given attachment generally chosen to be higher as the melting points for the solders, which are used in the following steps in the process.

With in other words, the solder for the first attachment step has the highest melting point. The solder for the second attachment step has a lower melting point than the solder used in the first attachment step. The solder for the third attachment step has a lower melting point than the two used in the previous two mounting steps Solder. Depending on the particular realization, a fourth or more Attachment steps are included.

If some step another heat-sensitive Adhesive as solder involves the same procedure. That is, its melting temperature must also be so high that heating the adhesive on his Melting point does not result in the temperature being the melting point the for exceeds all previous materials used, as measured at the previous joints.

The same thing Typically, though not always necessary, applies to the mounting temperatures relative to each other, i. the mounting temperature for one given step gets higher its as the mounting temperature of in any subsequent step used material.

In some variants it is possible the same material and, accordingly, the same melting and fixing temperatures for all Provide steps, provided that at the previous Connection points measured temperature does not exceed the melting temperature.

Remarkable, is that in some cases may be that the mounting temperature is higher in one step as the melting point of a previous step. This is but no problem, as by using an encapsulant or due to the spacing of the particular components involved, the previously joined Components at the contact point (s) do not have such a high temperature achieve that this is an unfavorable one Has effect.

After this our process has been described in a general way The process is now described using two examples. in the The first example will be an opto-electronic transmitter / receiver module product generated. The product consists of several lasers (an optical Chip), which are integrated with an electronic chip, and several Photodetectors (a second optical chip) with another integrated electronic chip. The two electronic chips are integrated into a pack, which on an electronic PCB is integrated.

The second example produces a similar one Transmitter-receiver, except that both optical chips (i.e., laser chip and photodetector chip) to share and use a common electronic chip additional Component for Alignment of fibers used with the optical devices is, by means of a heat-activated Adhesive is attached to the electronic chip.

example 1

In This example is the part of the process, the combination of Bonding materials (i.e., solder metals), Melting points and attachment temperatures are shown in Table 4.

Tabelle 4

Table 4

In In this example, the first part of the process begins with the fixture the optical devices on an integrated circuit (IC). This happens with a material that has the highest melting point (im Example Au 20% / Sn 80% with a melting point of 280 ° C). The joints to be joined are brought together, and the temperature is above the Melting point increased, with it the solder melts. The joined together Components are then cooled below the melting point, so that the solder Completely cures.

Of the integrated optoelectronic IC containing the lasers, and the integrated optoelectronic IC containing the detectors become then using a solder having a melting point lower than the melting point of the former solder material attached to the IC package to form an optoelectronic module package to create. In this case, a solder with Sn 95% / Sb5% is used (Melting temperature of 240 ° C). The contacts on the laser IC and the detector IC become with their respective joints on the IC package brought together. The components are then heated to a temperature above 240 ° C, but below 280 ° C, so that the solder the former Junction (s) not remelted. The assembled components are then cooled below the melting temperature of the solder to cure the new joint (s).

Of the End part of the temperature-sensitive connection process includes the Attach the module package (s) to a circuit board around the module to create. This happens with a solder material that has a lower Melting temperature as one of the two previously used solder Has. In this case, a solder becomes with Sn 63% / Pb 37% with a melting temperature of 180 ° C used. The contacts on the merge Sharing is brought together and at a temperature between 180 ° C and Heated to 240 ° C. The Modulus will then be below the melting temperature of the solder cooled, to cure the new joint (s).

Consequently disturbs or The attachment does not interrupt the earlier connections because every subsequent attachment a temperature below the temperature all previous ones Includes fixings.

Example 2

Tabelle 5 In this example, a similar process is used to produce a similar transceiver, except that both optical chips (ie, laser chip and photodetector chip) share a common electronic chip, and an additional fiber alignment device with the optical devices is attached to the electronic chip by means of a heat-activated adhesive which is electrically non-conductive and has a melting temperature of 230 ° C and a curing temperature of 230 ° C. As a result, the process is modified so that the attachment of the component requiring the adhesive is performed prior to mounting the module to the circuit board. The steps and materials involved in the process are shown in Table 5.

Table 5

Of the Process proceeds as above. First, the optical ICs both connected to the electronic IC. Next, the optoelectronic IC by melting the solder above 240 ° C, but under 280 ° C, on attached to the pack. Thereafter, the alignment piece is under Using a temperature between 230 ° C and 240 ° C associated with the pack. After all the packing is heated using a temperature between 180 ° C and 230 ° C at the PCB attached.

As is known, there there are many different solders, from pure gold to alloys and eutectics of metals such as e.g. Silver, lead, tin, antimony, bismuth or other metals. table 6 only shows a few of the many solders currently in use Trade available are, along with their respective approximate melting points.

Tabelle 6

Table 6

Similarly it heat activated Adhesives that are electrically non-conductive and in conjunction with the above mentioned solders in accordance can be used with the technique described herein.

Besides that is continue to recognize that the melting point of a for a certain step of the material used may be higher than that of one in an earlier Step used material, provided that the temperature at the or the former Joint (s) below the melting point of their bonding material remains. For example, referring to Example 1 above the optoelectronic IC is coated with an encapsulant, which thermo-isolates the optoelectronic IC to a certain extent, It may be possible be, the temperature over to increase the temperature of the melting point of the material connecting the optical IC to the electronic IC as the temperature at the junction due to the encapsulant the melting point do not exceed becomes. If the merge Components through a gap or a heat shield or heat sink are sufficiently separated, and as long as the melting temperature the former Connection points not exceeded can, in addition or alternatively, the temperature at the new junction exceeded become. Therefore, in Example 2, a heat shield between the previously connected components and the alignment piece laid or had it enough Distance from the earlier ones Connections, so could the local temperature at the junction of the alignment piece Exceed 240 ° C, provided that the temperature at the previous joints exceeded 240 ° C not.

Even with restriction combinations on the solder From Table 6 it can be seen that the various special possible Combinations are too numerous to list. It can be seen that the use of different combinations of materials (such as for example, from the solders listed in Table 6 selected and / or solder specified herein) in accordance with the technique described herein uncomplicated numerous variants in accordance with the invention results. The important aspect is not the specific one Materials, but rather the relationship between the melting points the for every subsequent step in the process used materials. With others Words, as long as the solder materials for the intended purpose and the various components in consecutive steps are merged, with each follow-up connection a solder which can be melted without the melting temperature at the earlier To exceed joints, works the process.

Finally, it can be seen that the process mentioned above does not apply to all the components of a particular one Assembly must be used. For example, based on example 1, the optoelectronic transceiver may be part of an assembly that further includes a housing, one or more fans, connectors, cables, and so on. Similarly, a particular assembly may be made from multiple modules, some of which are produced using the process described herein, for example that of Example 2, and others made using a prior art process or one in accordance with a variant module produced in the process (ie three specific materials) and another module produced in accordance with another variant of the process (ie, at least one of the materials differs from the particular materials used in the first module).

It It will be appreciated that the above description is illustrative only represents. For the benefit of the reader, the above description has on a representative Choice of all sorts embodiments focused, a selection that teaches the principles of the invention. The description did not try to enumerate all possible variants exhaustively. That alternative embodiments for one certain part of the invention possibly not all have been presented, or that further not described embodiments possibly for one Part available is not a disclaimer for these alternative embodiments to watch. A person skilled in the art recognizes that many of these are not described Embodiments, which contain the same principles of the invention, and others equivalent are.

Claims (10)

A unit comprising: an array of lasers ( 102 . 210 . 402 . 404 ), Driver electronics parts ( 104 . 212 . 412 ) and an array of modulators ( 100 . 200 . 300 . 400 ) all integrated together in a stack to form a constructive unit; the arrangement of lasers ( 102 . 210 . 402 . 404 ) have an emission surface through which rays can be emitted in a substantially vertical direction to define an emission side; the driver electronics parts ( 104 . 212 . 412 ) are connected to an emission side of the array of lasers opposite side; and wherein the arrangement of modulators ( 100 . 200 . 300 . 400 ) on the emission side of the array of lasers and via an electrical connection ( 206 . 208 . 416 ) passing through the array of lasers are directly connected to the drive electronics parts, A unit according to claim 1, wherein the arrangement of Lasers an array of vertical cavity surface emitting lasers (VCSELs). A unit according to claim 1, wherein the arrangement of Lasers an array of distributed feedback lasers (DFB) is. A unit according to claim 1, wherein the arrangement of Lasers an array of lasers with distributed Bragg reflectors (DBR) is. A unit according to any one of claims 2 to 4, wherein the lasers top emitting or bottom emitting lasers are. A unit according to claim 3 or 4, wherein the lasers Continue to include elements that cause the laser to be perpendicular to emit a wafer plane of the laser. A unit according to claim 6, wherein the elements are gratings which cause the lasers to emit at the top or emit below. A unit according to claim 6, wherein the elements are micromirrors which cause the lasers to emit at the top or emit below. A unit according to claim 1, wherein at least some the modulators for external modulation of the beams are configured. A unit according to claim 1, wherein at least some the modulators are configured as detectors.