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DE60131984D1 - Arbitrierungsvorrichtung - Google Patents

Arbitrierungsvorrichtung

Info

Publication number
DE60131984D1
DE60131984D1 DE60131984T DE60131984T DE60131984D1 DE 60131984 D1 DE60131984 D1 DE 60131984D1 DE 60131984 T DE60131984 T DE 60131984T DE 60131984 T DE60131984 T DE 60131984T DE 60131984 D1 DE60131984 D1 DE 60131984D1
Authority
DE
Germany
Prior art keywords
arbitration
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60131984T
Other languages
English (en)
Other versions
DE60131984T2 (de
Inventor
Tetsuro Takizawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Publication of DE60131984D1 publication Critical patent/DE60131984D1/de
Application granted granted Critical
Publication of DE60131984T2 publication Critical patent/DE60131984T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Multi Processors (AREA)
  • Memory System (AREA)
DE60131984T 2000-06-13 2001-06-07 Arbitrierungsvorrichtung Expired - Lifetime DE60131984T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2000182324 2000-06-13
JP2000182324A JP2001356961A (ja) 2000-06-13 2000-06-13 調停装置
PCT/JP2001/004808 WO2001097040A1 (fr) 2000-06-13 2001-06-07 Appareil d'arbitrage

Publications (2)

Publication Number Publication Date
DE60131984D1 true DE60131984D1 (de) 2008-01-31
DE60131984T2 DE60131984T2 (de) 2008-12-11

Family

ID=18683112

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60131984T Expired - Lifetime DE60131984T2 (de) 2000-06-13 2001-06-07 Arbitrierungsvorrichtung

Country Status (5)

Country Link
US (1) US7013368B2 (de)
EP (1) EP1313019B1 (de)
JP (1) JP2001356961A (de)
DE (1) DE60131984T2 (de)
WO (1) WO2001097040A1 (de)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7171525B1 (en) * 2002-07-31 2007-01-30 Silicon Image, Inc. Method and system for arbitrating priority bids sent over serial links to a multi-port storage device
WO2004068349A1 (ja) * 2003-01-27 2004-08-12 Matsushita Electric Industrial Co., Ltd. メモリ制御装置
WO2005059764A1 (en) * 2003-12-09 2005-06-30 Thomson Licensing Memory controller
US20050144401A1 (en) * 2003-12-30 2005-06-30 Pantalone Brett A. Multiprocessor mobile terminal with shared memory arbitration
WO2006030650A1 (ja) * 2004-09-16 2006-03-23 Nec Corporation 複数の処理ユニットでリソースを共有する情報処理装置
JP4850504B2 (ja) * 2005-12-15 2012-01-11 キヤノン株式会社 信号処理装置、撮像装置およびデータ転送方法
WO2008065477A1 (en) * 2006-11-28 2008-06-05 Nokia Corporation Memory arbitration
JP4715801B2 (ja) * 2007-04-26 2011-07-06 日本電気株式会社 メモリアクセス制御装置
US7870351B2 (en) * 2007-11-15 2011-01-11 Micron Technology, Inc. System, apparatus, and method for modifying the order of memory accesses
JP2009193107A (ja) 2008-02-12 2009-08-27 Panasonic Corp メモリアクセス装置
US8099539B2 (en) * 2008-03-10 2012-01-17 Lsi Corporation Method and system of a shared bus architecture
JP5622990B2 (ja) * 2011-01-25 2014-11-12 富士通テン株式会社 画像処理装置、画像表示システム及び画像処理方法
US11144358B1 (en) 2018-12-06 2021-10-12 Pure Storage, Inc. Asynchronous arbitration of shared resources
JP2021196681A (ja) * 2020-06-10 2021-12-27 ルネサスエレクトロニクス株式会社 半導体装置
CN114461550A (zh) * 2021-12-16 2022-05-10 加弘科技咨询(上海)有限公司 基于i2c通信的多主控设备访问仲裁系统及方法

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4586128A (en) * 1983-04-14 1986-04-29 Burroughs Corporation Arbitrator circuit and technique for use in a digital computing system having multiple bus controllers
US4760521A (en) * 1985-11-18 1988-07-26 White Consolidated Industries, Inc. Arbitration system using centralized and decentralized arbitrators to access local memories in a multi-processor controlled machine tool
US4818932A (en) * 1986-09-25 1989-04-04 Tektronix, Inc. Concurrent memory access system
US5440752A (en) 1991-07-08 1995-08-08 Seiko Epson Corporation Microprocessor architecture with a switch network for data transfer between cache, memory port, and IOU
JPH07200386A (ja) * 1993-12-28 1995-08-04 Toshiba Corp 共有メモリのアクセス制御装置および画像形成装置
US6272600B1 (en) 1996-11-15 2001-08-07 Hyundai Electronics America Memory request reordering in a data processing system
US6026464A (en) * 1997-06-24 2000-02-15 Cisco Technology, Inc. Memory control system and method utilizing distributed memory controllers for multibank memory
US6137807A (en) * 1997-12-05 2000-10-24 Whittaker Corporation Dual bank queue memory and queue control system
EP0935199B1 (de) * 1998-02-04 2011-05-04 Panasonic Corporation Speichersteuerungseinheit und -verfahren und Medium mit Ausführungsprogramm
JP2000194683A (ja) 1998-12-28 2000-07-14 Nec Kofu Ltd 共有メモリの調停回路およびその調停方法
US6389497B1 (en) * 1999-01-22 2002-05-14 Analog Devices, Inc. DRAM refresh monitoring and cycle accurate distributed bus arbitration in a multi-processing environment
US6317813B1 (en) * 1999-05-18 2001-11-13 Silicon Integrated Systems Corp. Method for arbitrating multiple memory access requests in a unified memory architecture via a non unified memory controller
US6564304B1 (en) * 2000-09-01 2003-05-13 Ati Technologies Inc. Memory processing system and method for accessing memory including reordering memory requests to reduce mode switching

Also Published As

Publication number Publication date
WO2001097040A1 (fr) 2001-12-20
JP2001356961A (ja) 2001-12-26
EP1313019B1 (de) 2007-12-19
EP1313019A1 (de) 2003-05-21
US7013368B2 (en) 2006-03-14
DE60131984T2 (de) 2008-12-11
US20030140201A1 (en) 2003-07-24
EP1313019A4 (de) 2004-11-24

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition