DE3133785A1 - "CIRCUIT ARRANGEMENT FOR CONTROLLING MATRIX COMPONENTS" - Google Patents

Description

392-46 / 11/81

CASCH / KRI August 20, 1981

BATTELLE - INSTITUT E.V., Frankfurt / Main

Circuit arrangement for controlling matrix components

1S The invention relates to a control circuit arrangement of matrix components with η row electrodes and m column electrodes, where η = m and two possible uses such an arrangement.

Gas discharges have a defined ignition threshold, which is given by the ignition voltage. Because of this ignition threshold simple gas discharge matrices can be set up, e.g. the AC plasma panels.

The matrix consists of two glass plates, which are provided with parallel conductor tracks. The two glass plates are mounted at a small distance of approx. 50 to 100 μm from one another in such a way that the electrode tracks on them cross one another and thus form the rows and columns of a matrix. The gap is filled with a gas that has the lowest possible ignition voltage, generally with neon + 0.1 % argon. The pressure is a few

100 mbar. Each crossing point represents an element of the matrix at which the associated line and Column electrode a gas discharge can be ignited. If, for example, half the ignition voltage + U / 2 is applied to the row electrode and to the column electrode -U / 2, while all non-activated electrodes are at ground potential, then only occurs on At the intersection of the triggered electrodes, the full ignition voltage U is applied, so that a gas discharge is initiated there will. At all other points of intersection along the activated electrodes there is only half the ignition voltage U / 2, which is due to the defined ignition threshold is insufficient to initiate ignition. In general, the selection level 1 occurs here (Full selection), 1/2 (half selection) and 0 (no voltage on the associated electrodes).

With this arrangement, a discharge is required to ignite

at any element of one consisting of η elements square matrix with 2 η electrodes 2 η leads. Since each lead needs its own circuit, the Circuit complexity very high with large matrices.

The invention is therefore based on the object by a suitable Arrangement to reduce the circuit complexity considerably.

It has now been shown that this problem can be solved with a circuit arrangement of the type mentioned above, in which two leads are provided for each row and / or column electrode, each of which contains a capacitor and γη or ym of these leads with a common Input are connected. Advantageous embodiments of the Arrangement according to the invention are in the dependent claims 2 to 11 explained, while claims 12 and 13 relate to two possible uses.

β

The invention is explained in more detail with reference to the accompanying drawings. Show it

Figure 1 shows a possible control using the example of a 9x9 Matrix;

FIG. 2 shows an equivalent circuit for a single electrode line;

Figure 3 shows an advantageous embodiment of the invention on Example of a 9x9 matrix;

Figure 4 the same circuit arrangement using the example of one

Matrix half with η = 1024 electrodes; 15th

Figure S shows another embodiment in which the capacities are formed in integrated form and

FIGS. 6 and 7 show the arrangement in perspective of the electrodes for the integrated generation of

Capacities.

Using the example of a matrix consisting of η = 9 row and m = 9 column electrodes, FIG. 1 shows how the external circuit complexity can be reduced. The solution according to the invention can also be used when η φ m and η and m are not square numbers.

The full selection of any element takes place according to the invention. according to not two, but four leads, each lead before each electrode line capacitors C-. and C? contains.

The arrangement according to the invention is based on the capacitive principle Voltage division created by capacitors C-j and C2 is effected. Each electrode line forms opposite theirs Neighbors and a capacitance Ca opposite the counterelectrodes which are crossed for this purpose and are charged during activation must become.

Since in the embodiment shown in Figure 1 form all the elements are controlled via four supply lines, there are correspondingly 2 ("JTn" + jAm), i.e. with η = m = 9 only 12 inputs available. Furthermore, the control of both the row and the column electrodes is constructed in the same way. If of that it is assumed that the adjacent Vn = 3 row electrodes and Ym = 3 column electrodes each form a group, so.

are in FIG. 1 on the right-hand side of the row electrodes and on the lower side of the column electrodes, respectively first supply lines of all three groups at entrance no. 1 combined. Likewise, all second supply lines are all Groups connected to input no. 2 and all third supply lines connected to input no. 3. On the opposite side In the matrix, all three leads within a group are routed to a common input.

FIG. 2 shows the equivalent circuit for a single electrode line and C ₂ the voltages U ^ and U2 are applied, then for C | = C ₂ = C is the voltage across C ^

U + U ₂

₃
^{2 + C} V ^C

Now, depending on the degree of selection, the voltages can be U ^ and / or

Be U ₂ = U _2/2 or equal to 0th For U ₁ = U ₂ = U _z / 2 it follows

^U z
5

TT 3 2 + Lj c ₃ / c for follows for c >> c. " ^U z / 2 5
For U ₁ or U ₂ - ο ^O 3 ^U z / 2 C »C, = U / 2 + c ₃ / c V ^U 3 Z ⁷ Γ ^Uf 3

From this it follows: U ' ₃ = Ug / 2.

The full ignition voltage U_ is only achieved if all four supply lines defining the position of an individual element are activated. But now the selection degrees 1, 3/4, 1/2 _y 1/4 and 0 appear. Nevertheless, the selection of any individual element is possible because of the relatively sharply defined ignition threshold. To ignite an element, at least the ignition voltage U is required, while at 3/4 U no ignition occurs. This means that only 4 χ fn supply lines are required to control a square matrix with η elements. For a matrix with (1024) elements this means that only 4 32 = 128 instead of 2 χ 1024 = 2048 leads are necessary.

Another embodiment of the invention is shown in Figure 3, again using the example of a matrix with 3 = 81 elements. While in the example of Figure 1 each groups of three electrodes (generally fn or ym electrodes) on each on one side of each matrix half were connected in parallel, these are permuted here so that when a certain one is selected Electrode line (U / 2 is applied to both capacitors) there is no voltage applied to any other electrode in the same group. A large number of such permutations are possible that

fulfills this purpose. This arrangement prevents a neighboring element 3/4 from being selected when any element is fully selected. Otherwise there is the possibility that a 3/4 selected element takes over the gas discharge of a fully selected element if the operating voltage of the discharge is U _Br ^ 3/4 U _z .

In this embodiment, the electrodes are on one side the first, the second and the third supply lines of all three groups are connected to a common input. On the other hand, as shown in Figure 3, in the first group, feed line no. 1 with input no. 1, feed line no. 2 with input no. 2 and feed line no. 3 with input no. 3, in the second group the feed line No. 1 with input No. 2, supply line No. 2 with input No. 3 and supply line No. 3 with input No. 1 and in the third group the feed line no. 1 with the input no. 3, the feed line no. 2 with the input no. 2 and the feed line No. 3 must be connected to input No. 1.

In FIG. 4, this circuit is shown schematically in a matrix half for 1024 electrodes. 1024 electrodes form 32 groups, each framed by a dashed line. Only the first two and the last two groups are in the drawing explained. The vertical lines represent inputs 1 to 32. In each group there are the first five and drawn the last five electrodes.

The capacitors C, and C2 can be external in any way be connected to the conductor tracks of the matrix. According to the invention, however, it is also possible to use the capacitors in the Production of the matrix and the supply lines in one working

to generate gang. Such an embodiment is shown schematically in FIG. The leads 2 are applied to the substrate 1, for example made of glass, for example with the aid of the photolithographic process. They also form the outer "plates" of the capacitors Cj and C ₂ . An insulating layer 3 approximately 1 to 2 μm thick is applied to this, for example by sputtering SiCU in a manner known per se. Contact windows 4 are etched out of this layer by photolithography. The electrode tracks 5 and the inputs 6 are then produced on the layer 3. The electrode tracks 5 at the same time form the inner "plates" of the capacitors Cy and C ₂ - when the arrangement is operated, for example as a plasma panel, an insulating layer 7 is also required. This completes one of the two matrix halves according to the figure. The other half is made in the same way. .

FIG. 6 shows again schematically in a perspective representation the arrangement of the supply lines 2 and electrode 5 for generating the capacitances Cj and C ₂ . The leads 2 overlap with the electrode 5, the insulating layer being located in the overlap area between the electrodes and leads and thus the capacitors C _{1 and C 2 being} formed. The size of the capacities is set by the size of the overlap. In this embodiment, the leads and the electrode have the same width. The end regions of the leads 2 are guided in parallel over the end regions of the respective electrode 5 in such a way that a gap is created above the center of the electrode between the ends of the leads 2.

Another advantageous embodiment for generating the capacitances C ₁ and C 2 is shown in FIG. The elec-

/ 11

Trode 5 is constructed as in the example according to FIG. The width of the leads 2 is less than half the electrode width. The size of G ₁ and C 2 is set by the length of the leads 2 and thus in turn by the size of the overlap with the electrode 5.

As explained above, the circuit arrangement according to the invention can be used to control AC plasma panels will. It can also be used to control electret storage systems. Such electret accumulators are known and in DE-OS 26 2 7 249 described.

Claims (13)

392-46 / 11/81 CASCH / KRI August 20, 1981 BATTELLE - INSTITUT E.V., Frankfurt / Main patent claims 1., circuit arrangement for controlling matrix components with η row electrodes and m column electrodes, where η can be m, characterized in that for each row ■■ "and / or column electrode two feed lines are provided which each contain a capacitor and that Yn or VnT of these feed lines are connected to a common input. 2. Circuit arrangement according to claim 1, characterized in that the number of inputs is 2 (γη + yin). 3. Circuit arrangement according to claim 1 or 2, characterized in that the control of the row or column electrodes is constructed in the same way. 4. Circuit arrangement according to one of claims 1 to 3, characterized in that the adjacent Vn row electrodes or yüT column electrodes each form a group and that on one side of the electrodes all first, all second, ... and all Vn or respectively Ym- th feed lines of the groups are connected to a common input. 5. Circuit arrangement according to claim 4, characterized in that the control is carried out on the opposite side of the electrodes so that no 3/4 selected element is adjacent to a fully selected element. 6. Circuit arrangement according to one of claims 1 to 5, characterized in that on the opposite side of the electrodes all fii or fn? Leads within a group are connected to a common input. 7. Circuit arrangement according to one of claims 1 to 5, characterized in that on the opposite side of the electrodes in the first group, the lead no. 1 with the input no. 1, the lead no. 2 with the input no. 2, ... the feed line no. joT or rm with the input no. in the second group <$ ie feed line no. 1 with input no. 2, feed line no. 2 with input no. 3, ... feed line no. yn-1 or ym-i with input no. γ η or ym and feed line no. "yn or ym with input no. 1; in the third group feed line no. 1 with input no. 3, feed line no. 2 with input no. 4, ... the feed line no. γ n-2 or , Vm- <2 with the input no. yn or im,. the feed line no. Vn-I with the input no. 1, the feed line no. γ η or ^ m with entrance no. 2 etc ... and in the γη- th and jfm-th group, feed line no. 1 with input no. γ η or | / ro, feed line no. 2 with input no. 1, feed line no. 3 with input No. 2, ... the feed line No. yn or ylii with the input No. yn-7 or 1 / m-i 'are connected. ft ♦ · * » ^H 8. Circuit arrangement according to one of claims 1 to 7, characterized in that the capacitors are attached immediately in front of the electrodes. 9. Circuit arrangement according to one of claims 1 to 7, characterized in that the capacitors are formed in that the electrodes partially overlap with the leads, the insulating layer being located in the overlap area between the electrodes and leads. 10. Circuit arrangement according to claim 9, characterized in that the. Electrodes and the associated leads have the same width and that the end regions of the leads are guided in parallel over the end regions of the respective electrode in such a way that a gap is created above the center of the electrode between the ends of the two leads. 11. Circuit arrangement according to claim 9, characterized in that the width of the lead is less than half the width of the respective electrode and that the leads are guided in parallel along the electrode in such a way that there is a gap across the center along the electrode between the leads arises. 12. Use of the circuit arrangement according to one of claims 1 to 11 for controlling plasma panels. 13. Use of the circuit arrangement according to one of claims 1 to 11 for controlling electret storage media. 30th