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DE2348325A1 - Aluminium-titanium gold semiconductor contact - with molybdenum, platinum or palladium below gold for higher strength - Google Patents

Aluminium-titanium gold semiconductor contact - with molybdenum, platinum or palladium below gold for higher strength

Info

Publication number
DE2348325A1
DE2348325A1 DE19732348325 DE2348325A DE2348325A1 DE 2348325 A1 DE2348325 A1 DE 2348325A1 DE 19732348325 DE19732348325 DE 19732348325 DE 2348325 A DE2348325 A DE 2348325A DE 2348325 A1 DE2348325 A1 DE 2348325A1
Authority
DE
Germany
Prior art keywords
layer
gold
titanium
molybdenum
platinum
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE19732348325
Other languages
German (de)
Inventor
Manfred Ganzer
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Licentia Patent Verwaltungs GmbH
Original Assignee
Licentia Patent Verwaltungs GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Licentia Patent Verwaltungs GmbH filed Critical Licentia Patent Verwaltungs GmbH
Priority to DE19732348325 priority Critical patent/DE2348325A1/en
Publication of DE2348325A1 publication Critical patent/DE2348325A1/en
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01015—Phosphorus [P]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/0102—Calcium [Ca]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01022—Titanium [Ti]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01042—Molybdenum [Mo]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01046—Palladium [Pd]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

In a semiconductor device, esp. integrated semiconductor circuit with contacts suitable for use without wires, with an Al layer in contact with the semiconductor surface, then a Ti layer and an outer Au layer, there is a layer of Mo, Pt or Pd between the Ti and Au layers. Pref. the Mo or Pt layer is produced on the Ti layer by h.f. sputtering and the Pd layer by vapour deposition. The use of a Mo, Pt or Pd layer improves the mechanical strength and also prevents Au atoms penetrating to the Al layer.

Description

Licentia Patent-Verwaltungs-GmbHLicentia Patent-Verwaltungs-GmbH

6 Frankfurt/Main, Theodor-Stern-Kai 16 Frankfurt / Main, Theodor-Stern-Kai 1

Heilbronn, den 12. Sept. 1973 PT-Ma/sr - HN 72/l|Heilbronn, September 12, 1973 PT-Ma / sr - HN 72 / l |

Halbleiteranordnung mit für die drahtlose Kontaktierung geeigneten Anschlußkontakten Semiconductor arrangement with connection contacts suitable for wireless contacting

Die Erfindung betrifft eine Halbleiteranordnung, insbesondere integi'ierte Halbleiterschaltung mit für die drahtlose Kontaktierung geeigneten Anschlußkontakten, bei der die erste, mit der Halbleiteroberfläche in Berührung stehende Metallschicht des Kontaktes aus Aluminium besteht, auf der Alurainiumschicht eine Schicht aus Titan angeordnet ist und die oberste Metallschicht des Kontaktes aus Gold bestellt.The invention relates to a semiconductor arrangement, in particular an integrated semiconductor circuit for wireless contacting suitable connection contacts, in which the first metal layer which is in contact with the semiconductor surface of the contact consists of aluminum, a layer of titanium is arranged on the aluminum layer and the topmost metal layer of the contact made of gold.

Ein Halbleiterkontakt aus der Schichtenfolge Aluminium-Titan-Geld ist beispielsweise aus der DT-AS 2 010 502 hekannt. Der vorliegenden Erfindung liegt die Aufgabe zugrunde, die mechanische Festigkeit der bekannten Kontakte zu verbessern und gleichzeitig eine Schichtenfolge anzugeben, durch die ein Eindringen störender Atome aus der GoldschichtA semiconductor contact made from the layer sequence aluminum-titanium-money is known from DT-AS 2 010 502, for example. The present invention is based on the object to improve the mechanical strength of the known contacts and at the same time to specify a layer sequence, through the penetration of interfering atoms from the gold layer

509814/0561509814/0561

in die Aluminiumleitbahn (Purpurpest) verhindert wird. Diese Aufgabe wird erfindungsgemäße dadurch gelöst, daß zwischen der Titanschicht und der Goldschicht eine Schicht aus Molybdän, Platin oder Palladium angeordnet ist.into the aluminum conductor path (purple plague) is prevented. These The object is achieved according to the invention in that between the titanium layer and the gold layer a layer of molybdenum, Platinum or palladium is arranged.

Es hat sich gezeigt, daß durch die erfindungsgemäße zweilagige Schichtenfolge die Barrierewirkung dieser Schicht gegenüber den Goldatomen und anderen störenden Verunreinigungen wesentlich verbessert werden konnte. Die Kontakte weisen -lUßoi'-dem eine ausreichende mechanische Festigkeit auf, so deiß die mit den neuen Kontakten versehenen Halbleiteranordnungen besonders gut für die drahtlose Kontaktierung geeignet sind. Dei der drahtlosen Kontaktierung werden die .Halbleiteranordnungen direkt mit ihren über die Halbleiteroberfläche hochragenden Anschlußkontakten auf Kontaktierungsfinger einer meist rahmenförmi^cn Kontaktierungsspinne aufgesetzt und mit diesen durch Anlöten fest verbunden.It has been shown that the two-layer sequence of layers according to the invention creates the barrier effect of this layer the gold atoms and other interfering impurities could be significantly improved. The contacts show -lUßoi'-dem if it has sufficient mechanical strength, then the one with The semiconductor arrangements provided with the new contacts are particularly suitable for wireless contacting. Yours wireless contacting, the semiconductor arrangements are direct with their connection contacts protruding above the semiconductor surface on contacting fingers of a mostly frame-shaped Contacting spider put on and firmly connected to this by soldering.

In der nachfolgend beschriebenen Zeichnung ist nur der Ausschnitt einer Halbleiteranordnung dargestellt, die einen Kontakt aufweist. Eine integrierte Festkörperschaltung weist auf einer Oberflächenseite eine Vielzahl derartige Anschlußkontakte auf, durch die die im Halbleiterkörper befindlichen Zonen und Bauelemente angeschlossen werden.In the drawing described below, only the section of a semiconductor arrangement is shown, which has a contact having. An integrated solid-state circuit has a plurality of such connection contacts on one surface side through which the zones and components located in the semiconductor body are connected.

5098U/05615098U / 0561

Bei der in· der Figur dargestellten Halbleiteranordnung 1 gellt es somit nur um den Anschluß eier Zone 2, die einen beliebigen Leitungstyp aufweisen kann. Auf der Halbleiteroberfläche befindet eich ein thermisch aufgewachsenes Oxyd 3· Bei HaIbleitoriinorclnuagcn aus Silizium besteht dieses Oxyd aus SiOn. In dieses Oxyd wurde beispielsweise mit Hilfe der bekannten Pototnaskierungütechnik "und Ätztechnik ein Kontaktierungsfenster 4 eingebracht. Danach wird in diesem Kontakt!erungsfenster eine Aluminiumschicht 5 abgeschieden, die sich in Form einer Leitbahn 6 auf die,Oxydschicht 3 erstreckt. Diese Aluminiutnschicht wird beispielsweise auf die Halbleiteroberfläche aufgedampft und weist eine Dicke von ca. 1 /um auf·In the case of the semiconductor arrangement 1 shown in the figure, it is therefore only a question of the connection of a zone 2, which can have any type of conduction. A thermally grown oxide is located on the semiconductor surface. In the case of semiconducting elements made of silicon, this oxide consists of SiO n . A contact window 4 was made in this oxide, for example with the aid of the known pot masking technique and etching technique. Then an aluminum layer 5 is deposited in this contact window, which extends in the form of an interconnect 6 onto the oxide layer 3. This aluminum layer is, for example, on the Vapor-deposited semiconductor surface and has a thickness of approx. 1 / µm

Die Halbleiteranordnung wird danach samt ihrer Aluminiumschicht mit einer pyrolytisch abgeschiedenen zweiten Oxydschicht 7 bedeckt· Diese Oxydschicht dient der Passivierung der Halbleiteranordnung im Bereich der Kontaktierungsfenster, Über der Aluminiumleitbahh 6 wird in diese zweäte Öxydschicht 7 wiederum ein Kontakt!erungsfenster 3 eingebracht, in dem auf die Aluminiumleitbahn die weiteren Metallkontaktxerungsschichten aufgebracht werden·The semiconductor device is then together with its aluminum layer covered with a pyrolytically deposited second oxide layer 7. This oxide layer serves to passivate the semiconductor device in the area of the contact window, About the aluminum conductor 6 is in this second oxide layer 7 again introduced a contact window 3, in which on the aluminum interconnect the other metal contact layers to be applied

Zuerst wird auf die Aluminiumschicht eine Titanschicht 9First, a titanium layer 9 is applied to the aluminum layer

509814/0561509814/0561

SAD ORJQiNALSAD ORJQiNAL

—*~ - * ~

aufgedampft. Diese Titanschicht weist beispielsweise eine Dicke von 1000 8. auf. Auf die Titanschicht 9 folgt eine weitere Zwischenschicht 10 aus Molybdän, lÄladiuni oder Platin. Palladiumschichten können aufgedampft werden, während die Molybdän und Platinschichten vorzugsweise durch Hochfrequenzzerstäubung aufgespultert werden. Die Zwischenschicht ist etwa 2000 A dick. Auf diese Zwischenschicht IO Tolgt eine dünne Goldkontaktschicht 11, die eine weitere galvanische Abscheidung einer sehr dicken Goldschicht ermöglicht. Diese dünne QoXdschicht 11 ist etwa 1000 % dick und wird auf die zuvor hergestellte Zwischenschicht 10 aufgedampft. Der galvanisch aufgewachsene Goldberg 12 ragt pilzförmig über die die Halbleiteroberfläche bedeckende Oxydschicht 7 hinaus und ist beispielsweise 20 bis 40 yum dick* Die pyrolitisch hergestelle Öxydschicht 7 hat dagegen nur eine Didke von 1 bis 2vaporized. This titanium layer has a thickness of 1000 8, for example. The titanium layer 9 is followed by a further intermediate layer 10 made of molybdenum, aluminum or platinum. Palladium layers can be vapor-deposited, while the molybdenum and platinum layers are preferably applied by high-frequency sputtering. The intermediate layer is about 2000 Å thick. On this intermediate layer IO Tolgt a thin gold contact layer 11, which enables a further galvanic deposition of a very thick gold layer. This thin QoXd layer 11 is approximately 1000 % thick and is vapor-deposited onto the intermediate layer 10 produced beforehand. The galvanically grown gold mountain 12 protrudes in the shape of a mushroom beyond the oxide layer 7 covering the semiconductor surface and is, for example, 20 to 40 μm thick

Bei der Herstellung der drahtlosen Verbindung zwischen der Halbleiteranordnung und einem Kontaktierungs- und Trägerstreifens wird der Goldberg 12 direkt mit einem aufliegenden Kontaktierungsfinger des Metallstreifens elektrisch leitend verbunden.When establishing the wireless connection between the Semiconductor arrangement and a contacting and carrier strip is the Goldberg 12 directly with a resting Contacting finger of the metal strip electrically conductive tied together.

509814/0561509814/0561

Claims (3)

y-y- PatentansprücheClaims ( l) halbleiteranordnung, insbesondere integrierte Halbleiterschaltung mit für die drahtlose Kontaktierung geeigneten Anschlußkontakten, bei der die erste, mit der Halbleiteroberfläche in Berührung stehende Metallschicht des Kontaktes aus Aluminium besteht, auf der Aluminiumschicht eine Schicht aus Titan angeordnet ist und die oberste Metallschicht des Kontaktes aus Gold besteht, dadurch gekennzeichnet, daß zwischen der Titanschicht und der Goldschicht eine Schicht aus Molybdän, Platin oder Palladium angeordnet ist.(l) semiconductor arrangement, in particular integrated semiconductor circuit with connection contacts suitable for wireless contacting, in which the first, with the semiconductor surface The metal layer in contact with the contact consists of aluminum, on top of which there is a layer of aluminum is arranged from titanium and the top metal layer of the contact consists of gold, characterized in that a layer of molybdenum, platinum or palladium is arranged between the titanium layer and the gold layer. 2) Halbleiteranordnung nach Anspruch 1, dadurch gekennzeichnet, daß die Molybdän- oder Platinschicht auf die Titanschicht durch Hochfrequenzzerstäubung aufgesputtert wird.2) semiconductor device according to claim 1, characterized in that the molybdenum or platinum layer on the titanium layer through High frequency atomization is sputtered on. 3) Halbleiteranordnung nach Anspruch 1, dadurch gekennzeichnet, daß die Palladiuraschicht auf die Titanschicht aufgedampft wird.3) semiconductor device according to claim 1, characterized in that the Palladiura layer is vapor-deposited on the titanium layer will. 5098U/05615098U / 0561 LeerseiteBlank page
DE19732348325 1973-09-26 1973-09-26 Aluminium-titanium gold semiconductor contact - with molybdenum, platinum or palladium below gold for higher strength Pending DE2348325A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
DE19732348325 DE2348325A1 (en) 1973-09-26 1973-09-26 Aluminium-titanium gold semiconductor contact - with molybdenum, platinum or palladium below gold for higher strength

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19732348325 DE2348325A1 (en) 1973-09-26 1973-09-26 Aluminium-titanium gold semiconductor contact - with molybdenum, platinum or palladium below gold for higher strength

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DE2348325A1 true DE2348325A1 (en) 1975-04-03

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0132614A1 (en) * 1983-06-27 1985-02-13 Teletype Corporation A method for manufacturing an integrated circuit device
EP0607732A3 (en) * 1993-01-08 1994-11-09 Ibm Structure and method for a diffusion barrier between a noble metal and a non-noble metal.
WO1996009647A1 (en) * 1994-09-23 1996-03-28 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Process for contacting an electronic component on a substrate

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0132614A1 (en) * 1983-06-27 1985-02-13 Teletype Corporation A method for manufacturing an integrated circuit device
EP0607732A3 (en) * 1993-01-08 1994-11-09 Ibm Structure and method for a diffusion barrier between a noble metal and a non-noble metal.
WO1996009647A1 (en) * 1994-09-23 1996-03-28 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Process for contacting an electronic component on a substrate

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