DE102020109391B4 - HIGH-FREQUENCY SWITCH WITH CONTROLLED RESONANCE FREQUENCY - Google Patents

Abstract

High-frequency (HF) switch (50, 60, 70, 80, 90) with adjustable resonant frequency, wherein the HF switch (50, 60, 70, 80, 90) has:
having multiple connections, a first connection (T1) and a second connection (T2);
an inductor (35; 45) which is electrically connected between the first terminal (T1) and the second terminal (T2); and
Several field-effect transistors (FETs) are connected electrically in series between the first terminal (T1) and the second terminal (T2) and in parallel with the inductor (35), wherein a first part (31; 31a, 31b, 31c; 41) of the several FETs are controlled by a control signal to set the RF switch (50, 60, 70, 80, 90) to an ON state or an OFF state, and wherein a second part (32a, 32b; 42a, 42b) of the several FETs are controllable separately from the control signal to adjust a resonant frequency of the RF switch (50, 60, 70, 80, 90) in the OFF state.

Description

CROSS-REFERENCE TO RELATED REGISTRATIONS

The present application claims priority over the preliminary application filed on 4 April 2019. US Patent Application No. 62/829,219 entitled “RADIO FREQUENCY SWITCHES WITH CONTROLABLE RESONANT FREQUENCY” and compared to the non-preliminary application submitted on March 11, 2020 US patent application no. 16/815,694 They are hereby incorporated in their entirety by reference.

Area

Embodiments of the invention relate to electronic systems and in particular high-frequency switches.

BACKGROUND

A high-frequency (HF) communication system may contain HF switches used for a variety of purposes.

For example, an RF communication system may include a high-frequency transmit/receive switch. The transmit/receive switch can be used to electrically connect an antenna to a transmit path or a receive path of the system, thereby controlling the paths' access to the antenna.

US 2017 / 040 996 A1 This document describes semiconductor switches for high-frequency applications, specifically a single-pole single-throw (SPST) switch and derived switch architectures such as single-pole double-throw (SPOT) and single-pole multiple-throw (SPMT). The described SPST switch is based on a special MOSFET circuit topology that, through the use of resistors, capacitors, diodes, and optional inductors, aims to provide improved isolation, lower insertion loss, and higher linearity compared to existing silicon solutions.

US 2015 / 0 180 466 A1 This describes a high-frequency circuit and a semiconductor module based on it. By connecting an inductor and a resistor in parallel with at least one field-effect transistor, the quality factor is reduced, thereby decreasing the isolation fluctuation over a wide frequency range. The circuit can be implemented as an SPDT or SPNT switch and can be advantageously integrated into compact high-frequency front-end modules.

JP H07 - 303 001 A This paper describes a high-frequency switch, specifically an SPDT switch for mobile communication devices, that enables high isolation with low transmission loss. The starting point is the problem of increased losses and degraded isolation due to parasitic capacitances in FETs. The proposed solution involves connecting inductors in parallel with selected FETs so that their parasitic capacitances are compensated by resonance. This reduces transmission losses and improves isolation without excessively increasing the chip area.

BRIEF SUMMARY OF THE REVELATION

Radio frequency (RF) switches with controllable resonant frequencies are provided herein. In certain embodiments, an RF switch comprises a stack of two or more field-effect transistors (FETs) electrically connected between a first terminal and a second terminal. The RF switch also further comprises an inductor connected between the first and second terminals and in parallel with the stack of FETs. A first set of FETs is controlled to turn the RF switch on or off. A second set of FETs is also controlled to tune a resonant frequency of the RF switch when the RF switch is off. For example, when the RF switch is in an OFF state, the RF switch exhibits a resonant frequency based on the product of the inductor's inductance and the encapsulation provided by the stack of FETs. Controlling the gate voltages of the second set of FETs in the OFF state modifies the encapsulation provided by the stack of FETs. This provides flexibility for tuning the resonant frequency of the RF switch, for example to compensate for manufacturing variations and/or to control the resonant frequency based on an operating frequency band to increase separation.

In one aspect, an RF switch with adjustable resonant frequency is provided. The RF switch comprises: multiple terminals, each with a first terminal and a second terminal; an inductor electrically connected between the first and second terminals; and multiple field-effect transistors (FETs) electrically connected in series between the first and second terminals and in parallel with the inductor. A first set of the multiple FETs is controlled by a control signal to set the RF switch to an ON or OFF state, and a second set of the multiple FETs is independently controllable. the control signal to adjust a resonant frequency of the RF switch in the OFF state.

In another aspect, a method for RF switching is provided. The method comprises: propagating an RF signal through two or more FETs of an RF switch in an ON state of the RF switch; changing the switch from the ON state to an OFF state using a control signal that controls a first part of the two or more FETs; and adjusting a resonant frequency of the RF switch in the OFF state using a second part of the two or more FETs, wherein the two or more FETs are arranged in a stack in parallel with an inductor of the RF switch.

In another aspect, a front-end system is provided. The front-end system comprises: an antenna connector; a power amplifier; a low-noise amplifier; and a transmit/receive switch, comprising a receive branch electrically connected between an input to the low-noise amplifier and the antenna connector, and a transmit branch electrically connected between an output of the power amplifier and the antenna connector. The receive branch comprises several FETs arranged in series and an inductor in parallel with the FETs. A first set of FETs is controlled by a control signal to enable or disable the receive branch, and a second set of FETs is controllable independently of the control signal to adjust a resonant frequency of the receive branch when the receive branch is disabled.

BRIEF DESCRIPTION OF THE DRAWINGS

• 1 is a schematic diagram of an embodiment of a phased-array antenna system comprising a transmit/receive (T/R) switch.
• 2A is a schematic diagram of an embodiment of a front-end system featuring T/R switches.
• 2B is a schematic diagram of another embodiment of a frontend system featuring T/R switches.
• 3 This is a schematic diagram of an example of a multi-layered, high-speed data communication network.
• 4 is a schematic diagram of a high-frequency (HF) switch according to one embodiment.
• 5 is a schematic diagram of an RF switch according to another embodiment.
• 6 is a schematic diagram of an RF switch according to another embodiment.
• 7A is a schematic diagram of a first resonant frequency adjustment setting of an RF switch according to a further embodiment.
• 7B This is a schematic diagram of a second resonant frequency adjustment setting of the RF switch. 7A .
• 8 is a schematic diagram of an RF switch according to another embodiment.
• 9A This is a schematic diagram of a T/R switch according to one embodiment.
• 9B is a schematic diagram of an embodiment of a T/R switch of 9 exhibiting semiconductor dies.
• 10A This is an example of a graphical representation of loss versus frequency for the receive branch of the T/R switch of 9A .
• 10B This is an example of a graphical representation of reverse isolation over frequency for the receive branch of the T/R switch of 9A .
• 10C This is an example of a graphical representation of loss versus frequency for the receive branch of the T/R switch of 9A .
• 10D This is an example of a graphical representation of reverse isolation over frequency for the receive branch of the T/R switch of 9A .

DETAILED DESCRIPTION OF EXECUTION FORMS

The following detailed description of embodiments presents various descriptions of specific embodiments of the invention. However, the invention can be embodied in a multitude of different ways. In this description, reference is made to the drawings, where identical reference numerals may indicate identical or functionally similar elements. It is understood that elements depicted in the figures are not necessarily drawn to scale. Furthermore, it is understood that certain embodiments may have more elements than are shown in a drawing, and/or may be a subset of the elements shown in a drawing. In addition, some embodiments may incorporate any suitable combination of features from two or more drawings.

High-frequency (HF) switches with controllable resonant frequency are provided here. In certain embodiments, an HF switch features The RF switch consists of a stack of two or more field-effect transistors (FETs) electrically connected between a first and a second terminal. Additionally, the RF switch includes an inductor connected between the first and second terminals and in parallel with the stack of FETs. A first set of FETs is controlled to turn the RF switch on or off. A second set of FETs is controlled to tune a resonant frequency of the RF switch when it is off.

For example, when the RF switch is in the OFF state, it exhibits a resonant frequency based on the product of the inductor's inductance and the capacitance of the stack of FETs. By controlling the gate voltages of the second set of FETs in the OFF state, the capacitance provided by the stack of FETs is changed. Accordingly, the resonant frequency of the RF switch can be tuned.

The resonant frequency of the RF switch can be controlled for a variety of purposes. In certain implementations, the resonant frequency is controlled based on an operating frequency band. For example, the resonant frequency can be adjusted to achieve multiband operation with little or no impact on insertion loss. Alternatively, or in addition, the resonant frequency can be controlled to compensate for PVT (process, voltage, and/or temperature) fluctuations. For example, the resonant frequency can be adjusted to overcome frequency shifts resulting from process fluctuations, thereby tuning back to the desired center frequency of the resonant circuit and recentering the design to accommodate process fluctuations.

In certain implementations, the RF switch is implemented as a multi-stage switch with at least a first branch and a second branch, where the inductor is in parallel with the stack of FETs in the first branch of the switch. For example, the RF switch can correspond to a transmit/receive (T/R) switch, which has a receive branch and a transmit branch.

When the first branch of the switch is OFF and the second branch is ON, the inductance and capacitance of the first branch act as a parallel inductor-capacitor (LC) resonator with a resonant frequency. Furthermore, the resonant frequency can be tuned to achieve resonance at the frequency of interest (for example, within a specific frequency band), which in turn provides strong isolation.

1 Figure 1 is a schematic diagram of an embodiment of a phased-array antenna system 10. The phased-array antenna system 10 comprises a digital processing circuit 1, a data conversion circuit 2, a channel processing circuit 3, RF front ends 5a, 5b, ..., 5n, and antennas 6a, 6b, ..., 6n. Although an example with three RF front ends and three antennas is shown, the phased-array antenna system 10 can have more or fewer RF front ends and/or more or fewer antennas, as indicated by the ellipses.

The phased-array antenna system 10 represents an embodiment of an electronic system that may include one or more switches implemented according to the teachings herein. However, the switches disclosed herein can be used in a wide range of electronics. A phased-array antenna system is also referred to herein as an actively scanned electronically steered array.

As in 1 As shown, the channel processing circuit 3 is coupled to the antennas 6a, 6b, ..., 6n via RF front ends 5a, 5b, ..., 5n. In this embodiment, the channel processing circuit 3 comprises a splitting/combining circuit 7, a frequency boost/bubble converter 8, and a phase and amplitude control circuit 9. The channel processing circuit 3 provides RF signal processing for RF signals transmitted through and received by each communication channel. In the illustrated embodiment, each communication channel is associated with a corresponding RF front end and an antenna.

With further reference to 1 The digital processing circuit 1 generates digital transmit data for controlling a transmit beam radiated from antennas 6a, 6b, ..., 6n. The digital processing circuit 1 also processes digital receive data, which constitute a receive beam. In certain implementations, the digital processing circuit 1 includes one or more baseband processors.

As in 1 As shown, the digital processing circuit 1 is coupled to the data conversion circuit 2, which includes a digital-to-analog converter (DAW) circuit arrangement for converting digital transmit data into one or more baseband transmit signals and an analog-to-digital converter (ADW) circuit arrangement for converting one or exhibits multiple baseband reception signals in digital reception data.

In this embodiment, the frequency boost/dim switch 8 provides frequency boosting from baseband to RF and frequency attenuation from RF to baseband. However, other implementations are possible, such as configurations in which the phased-array antenna system 10 operates partially at an intermediate frequency (IF). In certain implementations, the splitting/combining circuit 7 supplies frequency-boosted transmit signals to one or more other signals to generate RF signals suitable for processing by the RF front ends 5a, 5b, ..., 5n and subsequent transmission to the antennas 6a, 6b, ..., 6n. Furthermore, the splitting/combining circuit 7 combines RF signals received via the antennas 6a, 6b, ..., 6n and RF front ends 5a, 5b, ..., 5n to generate one or more baseband receive signals for the data conversion circuit 2.

The channel processing circuit 3 also includes the phase and amplitude control circuit 9 for controlling beamforming operations. For example, the phase and amplitude control circuit 9 controls the amplitudes and phases of signals transmitted or received via antennas 6a, 6b, ..., 6n to provide beamforming. With respect to signal transmission, the RF signal waves radiated by antennas 6a, 6b, ..., 6n aggregate through constructive and destructive interference to collectively generate a transmit beam with a specific direction. With respect to signal reception, the channel processing circuit 3 generates a receive beam by combining the RF signals received by antennas 6a, 6b, ..., 6n after amplitude scaling and phase shifting.

Phased-array antenna systems are used in a wide variety of applications, including, but not limited to, mobile communications, military and defense systems and/or radar technology.

As in 1 As shown, RF front-ends 5a, 5b, ..., 5n each have one or more VGAs 11a, 11b, ..., 11n, which are used to scale the amplitude of RF signals transmitted or received by the antennas 6a, 6b, ..., 6n. Furthermore, the RF front-ends 5a, 5b, ..., 5n each have one or more phase shifters 12a, 12b, ..., 12n for phase-shifting the RF signals. For example, in certain implementations, the phase and amplitude control circuit 9 generates gain control signals to control the gain provided by the VGAs 11a, 11b, ..., 11n and phase control signals to control the amount of phase shift provided by the phase shifters 12a, 12b, ..., 12n. Furthermore, the RF front ends 5a, 5b, ..., 5n each have one or more T/R switches 13a, 13b, ..., 13n for selecting between transmit and receive signals, so that the antennas 6a, 6b, ..., 6n are used jointly for transmit and receive operations, such as in applications that use time-division duplexing (TDD).

The phased-array antenna system 10 generates a transmit or receive beam with a main lobe pointing in the desired communication direction. The phased-array antenna system 10 achieves an increased signal-to-noise ratio (SNR) in the direction of the main lobe. The transmit or receive beam also has one or more side lobes pointing in directions other than the main lobe, which are undesirable.

By reconfiguring the T/R switches 13a, 13b, ..., 13n according to the instructions herein, a number of advantages can be achieved, such as multiband operation and/or increased separation between the transmit and receive paths. For example, if the T/R switches 13a, 13b, ..., 13n transmit RF signals to the antennas 5a, 5b, ..., 5n to form a transmit beam, increased separation is provided for the deactivated receive paths.

2A Figure 1 is a schematic diagram of an embodiment of a front-end system 30 with T/R switches. The front-end system 30 comprises a first T/R switch 21, a second T/R switch 22, a receive path VGA 23, a transmit path VGA 24, a receive path controllable phase shifter 25, a transmit path phase shifter 26, a low-noise amplifier (LNA) 27, and a power amplifier (PA) 28. As shown in Figure 2. 2A The frontend system 30 is shown as coupled to the antenna 20.

The frontend system 30 can be included in a wide variety of RF systems, featuring, but not limited to, phased-array antenna systems such as the phased-array antenna system 10 from 1 For example, multiple instantiations of the frontend system 30 can be used to implement the RF frontends 5a, 5b, ..., 5n of 1 can be used. In certain implementations, one or more instantiations of the frontend system 30 are produced on a semiconductor die or chip.

As in 2A As shown, the front-end system 30 has the receive path VGA 23 for controlling a degree of gain provided to the RF input signal received at the antenna 20, and the transmit path VGA 24 for controlling a degree of gain is provided to an RF output signal transmitted on antenna 20. The gain control provided by the VGAs can serve a wide variety of purposes, including, but not limited to, compensating for temperature and/or process variations. Additionally, in beamforming applications, the VGAs can control the sidelobe level of a beam pattern.

RF systems such as the Frontend System 30 from 2A RF systems can have one or more T/R switches to control access to transmit and receive paths to an antenna. Although an example of an RF system with T/R switches is shown, the lessons taught herein can be applied to RF systems implemented in a wide variety of ways. Furthermore, the lessons taught herein can be applied not only to T/R switches, but also to RF switches that serve other functions.

2B This is a schematic diagram of another embodiment of a front-end system 40 with T/R switches. The front-end system 40 of 2B is similar to the Frontend System 30 from 2A , except that in the frontend system 40 the second T/R switch 22 is omitted. As in 2B The frontend system 40 is shown as coupled to a receiving antenna 31 and a transmitting antenna 32.

The front-end system 40 operates with different antennas for signal transmission and reception. In the illustrated embodiment, the receive path VGA 23 controls a level of gain provided to an RF input signal received at the receive antenna 31, and the transmit path VGA 24 controls a level of gain provided to an RF output signal transmitted at the second antenna 32.

Certain RF systems have separate antennas for transmitting and receiving signals.

3 This is a schematic diagram of an example of a multi-layered, high-speed data communication network. The network can, for example, support various mobile end users, Industry 4.0 ecosystems, and communication infrastructure for autonomous driving. This supports artificial intelligence data communication, a fast, real-time decision-making process, and secure, closed networks.

Wireless data traffic per subscriber has increased at a rate of over 50% per year, and this trend is expected to accelerate over the next decade with the continued use of video and the rise of IoT. To address this demand, 5G technology plans to use millimeter wave frequencies to expand the available frequency spectrum and deliver multi-gigabit-per-second (Gbps) data rates to mobile devices and other UEs. 5G promises great flexibility to support a wide variety of Internet Protocol (IP) devices, small cell architectures, and/or dense coverage areas.

Current or planned applications for 5G include, among others, tactile internet, vehicle-to-vehicle (V2V) communication, vehicle-to-infrastructure (V2I) communication, peer-to-peer communication and/or machine-to-machine communication, secure closed-loop communication, and external artificial intelligence (AI) data processing services in the cloud. Such technologies utilize high data rates and/or low network latency. For example, certain applications, such as V2V communication and/or remote surgery, require low latency to ensure human safety.

In the multi-layered network of 3 The existing cell-based network is evolving to support 5G, leveraging WiFi adoption, small cells, and/or the distribution of broadband data to servers at the network's edge (edge servers) to enable new, lower-latency use cases. As in the example of 3 As shown, a backhaul connects a fixed cellular infrastructure to the core telephone network and the internet. Thus, backhaul traffic runs between the local subnetwork (for example, connections between UE and network access points such as base stations) and the core network (for example, the internet and the mobile connection point). The multi-layered network of 3 It is also implemented to work using Industry 4.0, enabling augmented reality and/or real-time artificial intelligence (AI) via the cloud.

With further reference to 3 The depicted multi-tiered architecture utilizes 4G (Fourth Generation) cells with wider coverage and an underlying network of more closely spaced 5G base stations. Implementing this multi-tiered network of 3 This approach offers several advantages, including flexibility in providing different levels of channel access priority for different types of connections. For example, macrocells, small cells, and/or facility-to-facility connections can operate with varying channel access priorities.

One way to increase area spectral efficiency is to shrink cell size, thereby reducing the number of users per cell and providing each user with additional spectrum. Thus, shrinking cells and reusing spectrum increases the overall network capacity.

The lessons learned here can enhance the performance of front-end systems for base stations and UEs operating in a multi-tiered network. For example, flexibility can be provided to control the resonant frequency based on the operating frequency band and/or to compensate for manufacturing variations, thereby increasing separation.

4 Figure 50 is a schematic diagram of an RF switch 50 according to one embodiment. The RF switch 50 has several FETs (in this example 31, 32a, 32b) connected in series between a first terminal T1 and a second terminal T2. The RF switch 50 also has an inductor 35 connected between the first terminal T1 and the second terminal T2 and in parallel with the FETs. In this example, the inductor 35 has an inductance _L0 .

A first part or group of FETs (including FET 31 in this example) are controlled to turn the RF switch 50 on or off.

For example, a control signal VC (which is logic inverted in this example) is used to turn FET 31 on or off, thereby controlling RF switch 50 to an ON or OFF state. Although an example is shown using a single FET to turn the RF switch on or off, additional FETs can be used to turn the RF switch on or off. For example, one or more additional FETs can be placed in series with FET 31 to increase the power handling capability of RF switch 50.

With further reference to 4 A second set or group of FETs (including FET 32a and FET 32b in this example) is controlled to adjust the resonant frequency of RF switch 50. For example, a bit b ₀ controls FET 32a, while a bit b _n-1 controls FET 32b. Although an example with two FETs used for resonant frequency adjustment is shown, more or fewer FETs can be used to control the resonant frequency of RF switch 50.

When the RF switch 50 is in the OFF state, the RF switch 50 has a resonant frequency based on a product of an inductance of the inductor 50 (corresponding to L ₀ in this example) and a capacitance of the stack of FETs located between the first terminal T1 and the second terminal T2.

By switching the gate voltages of the second part of the FETs (in this example corresponding to FET 32a and FET 32b) to the OFF state, the capacitance is changed. Accordingly, the resonant frequency of the RF switch 50 can be tuned.

For example, if the control signal VC switches off FET 31 to operate RF switch 50 in the OFF state, the gate-source capacitance and the gate-drain capacitance of FET 31 (in this example both equal to approximately Coff) are in series between the first terminal T1 and the second terminal T2 and contribute to the capacitance of RF switch 50.

Furthermore, when bit b ₀ turns off FET 32a, the gate-source capacitance and the gate-drain capacitance of FET 32a (both equal to Coff ₁ in this example) contribute to the capacitance of RF switch 50. However, when bit b ₀ turns on FET 32a, a conducting channel is provided through FET 32a, bypassing the gate-source and gate-drain capacitances of FET 32a and increasing the overall capacitance of RF switch 50. Similarly, when bit b _n-1 turns off FET 32b, the gate-source capacitance and the gate-drain capacitance (both equal to Coff _n in this example) contribute to the capacitance of RF switch 50. However, when bit b _n-1 turns on FET 32b, a conducting channel is provided through FET 32b to bypass these capacitances.

Accordingly, bit _b0 and bit _bn-1 provide flexibility for controlling the capacitance of RF switch 50 in the OFF state and a corresponding resonant frequency. Although represented as two bits, more or fewer bits can be used for resonant frequency adjustment. Furthermore, the principles outlined here can be applied not only to multi-bit digital signals for resonant frequency adjustment but also to other types of resonant frequency adjustment signals.

In the illustrated embodiment, gate resistors are also included to isolate the RF switch 50 from a control circuit (for example, the control circuit 101 of 9B) , which is used to generate control signals for the RF switch 50 will increase. As in 4 As shown, gate resistor 33 is used to supply the control signal VC to the gate of FET 31. Additionally, gate resistor 34a is used to supply bit b ₀ to the gate of FET 32a, while gate resistor 34b is used to supply b _n-1 to the gate of FET 32b.

When the RF switch is turned on, the insertion loss of the switch is based on the resistance values of the FETs between the first terminal T1 and the second terminal T2. In this example, FET 31 has an ON-state resistance value R, while FET 32a has an ON-state resistance value _R1 and FET 32b has an ON-state resistance value _Rn . The number of FETs in series can be chosen based on a variety of factors, such as the desired power handling capability and/or insertion loss of the RF switch 50. The FETs in the second group used for resonant frequency adjustment also help to increase the power handling capability of the RF switch 50 in the ON state.

FETs can be implemented in a wide variety of ways, including using metal oxide semiconductor (MOS) transistors, such as n-MOS (NMOS) transistors and/or p-MOS (PMOS) transistors. In one example, the MOS transistors are fabricated using a silicon-on-insulator (SOI) process.

5 Figure 1 is a schematic diagram of an RF switch 60 according to a further embodiment. The RF switch 60 has an inductor 35 in parallel with a stack of FETs. FET 31a, FET 31b, and FET 31c are part of a first group of the stack and are controlled by a control signal VC to switch the RF switch 60 on or off. Furthermore, FET 32a and FET 32b are part of a second group of the stack and are controlled by bit b0 and bit b1, respectively.

Although the stack of FETs in this embodiment has five transistors, the stack can have more or fewer transistors. For example, the first group and/or the second group can have more or fewer transistors. The number of transistors in the stack can be chosen based on a wide variety of factors, such as desired power handling capability, desired ON-state insertion loss, operating frequencies or bands, and/or desired range of resonant frequency tuning.

The first group of FETs is used to switch the RF switch 60 on or off. The second group of FETs is used to provide control of the resonant frequency of the RF switch 60 when the RF switch 60 is off.

In the illustrated embodiment, each of the FETs in the stack has a width W and a length L and a corresponding on-state resistance value R. Although an example is shown in which the FETs have approximately the same geometry, FETs with different geometries can be implemented. In one example, the FETs of the second group have different weights according to an arbitrary desired weighting scheme. Implementing the FETs of the second group with weights helps to provide a wide tuning range of the resonant frequency.

When FETs in the stack are off, the equivalent off-state capacitance Ceq is approximately Coff/10, where Coff is the off-state gate source/gate drain capacitance of each FET. The resonant frequency for this setting is approximately _f0 and is associated with b0 = 0 and b1 = 0 in this example. By controlling b0 = 1 and/or b1 = 1, the off-state capacitance can be reduced to change the resonant frequency of RF switch 60.

The equivalent off-capacitance Ceq, when incorporated into a branch of a multi-stage switch (for example, a receive branch of a TR switch), can be controlled by switching on some or all of the series FETs in the second group (independently of the FETs in the first group) while another branch (for example, a transmit branch of the T/R switch) is switched on. This, in turn, changes the equivalent off-capacitance Ceq and leads to a shift in the resonant frequency of the parallel LC resonator associated with the inductance of inductor 35 and the capacitance of the stack of FETs.

6 Figure 1 is a schematic diagram of an RF switch 70 according to another embodiment. The RF switch 70 has an inductor 35 in parallel with several FETs, with a first group (FET 31a, FET 31b and FET 31c) controlled by a control signal VC and a second group (FET 32a and FET 32b) controlled by a bit b0 or a bit b _n-1 .

Although five FETs are shown, any integer m of FETs can be contained in the RF switch 60. In certain embodiments, n FETs are located in the second group and m- n of the FETs are in the first group, where m is greater than or equal to 2, n is greater than or equal to 1, and m is greater than n.

7A Figure 80 is a schematic diagram of an RF switch 80 according to a further embodiment. The RF switch 80 has a first group of FETs comprising FET 31a, FET 31b, and FET 31c. Furthermore, the RF switch 80 has a second group of FETs comprising FET 32a and FET 32b. The first group of FETs and the second group of FETs are connected in series between the first terminal T1 and the second terminal T2. Inductor 35 is also connected in parallel with the series combination of FETs.

The FET 32b is sized with a scaling factor K relative to the rest of the FETs in the stack.

A first resonance frequency adjustment setting of the RF switch 80 is in 7A The diagram shows both FET 32a and FET 32b switched off. In this example, the gate-source capacitance (C_{_GS} ) and gate-drain capacitance (C_{_GD} ) of FET 32b are each equal to 2C/K, while C_{_GS} and C_{_GD} of the other FETs are each equal to 2C. Thus, in this example, the equivalent off-capacitance Ceq1 for the first resonant frequency adjustment setting is C/(K+4).

7B This is a schematic diagram of a second resonant frequency adjustment setting of the RF switch 80. 7A .

As in 7B As shown, FET 32a and FET 32b are switched on in the second resonant frequency adjustment setting. The equivalent off-capacitance Ceq2 for the second setting is C/3.

In one embodiment, the value K is chosen for a dual-frequency band response of the RF switch 80. For example, for a frequency _f1 = 39 GHz (e.g., a first 5G band) and a frequency _f2 = 28 GHz (e.g., a second 5G band), K can be chosen such that equation 1 below is satisfied: $$\frac{f2}{f1}=\sqrt{\frac{Ceq1}{Ceq2}}=\frac{28GHz}{39GHz}$$

For n=2 control bits/control FETs and a total of m=5 FETs, the capacitance ratio to achieve both bands 28 GHz/39 GHz for 5G for K of approximately 1.82 is met (corresponding to 0.55 W/L for FET 32B relative to the other FETs).

8 Figure 90 is a schematic diagram of an RF switch 90 according to a further embodiment. The RF switch 90 of 8 is similar to the HF switch 80 from 7A and 7B , except that the RF switch 90 corresponds to an example where the component rating of the FET 32b is approximately 0.55*W/L (corresponding to K = 1.82) and the component rating of the other FETs in the stack is approximately 1.25*W/L.

To achieve a Ron*Coff ratio desired for a specific application, the component design can be chosen so that resonance in the frequency bands of interest is achieved with little to no effect on ON-state operation and/or an increase in path loss.

In the example of 8 The two FETs in the second group of FETs are switched on and off separately using control bits b0 and b1, providing four resonant frequency adjustment settings. In this example, a setting of b0 = b1 = 0 yields a resonant frequency f0, while a setting of b0 = b1 = 1 yields a resonant frequency of approximately 0.72*f0.

9A Figure 1 is a schematic diagram of a T/R switch 100 according to one embodiment. The T/R switch 100 has a receive branch 91 and a transmit branch 92. The receive branch 91 is connected between a receive terminal Rx and an antenna terminal, while the transmit branch 92 is connected between a transmit terminal Tx and the antenna terminal.

The receive branch 91 has an inductor 35 connected in parallel with a stack of receive-branch FETs. The receive-branch FETs comprise a first group (FET 31a, FET 31b, and FET 31c) controlled by a control signal VC, and a second group (FET 32a and FET 32b) controlled by bit b ₀ and bit b _1. Gate resistors 33a, 33b, and 33c are also included for FETs 31a, 31b, and 31c, respectively, and gate resistors 34a and 34b are included for FETs 32a and 32b, respectively.

The transmit branch 92 has an inductor 45 in parallel with a stack of transmit branch FETs. The transmit branch FETs comprise a first group (FET 41) controlled by a control signal VC and a second group (FET 42a and FET 42b) controlled by bit a ₀ and bit a _1. A gate resistor 43 is also included for FET 41, and gate resistors 44a and 44b are included for FETs 42a and 42b, respectively.

In this example, the receive branch 91 and the transmit branch 92 are controlled by logically inverted control signals. Thus, the receiver is The receiving branch 91 is switched off when the transmitting branch 92 is active. Furthermore, the transmitting branch 92 is switched off when the receiving branch 91 is active.

In the illustrated embodiment, both the receive branch 91 and the transmit branch 92 are implemented with adjustable resonant frequencies according to the teachings herein. For example, control bits a0 and a1 can be used to switch the receive bands, while control bits b0 and b1 can be used to switch the transmit bands.

Although presented in the case of a transmit/receive switch, the lessons contained herein can be applied to any suitable RF switch.

9B Figure 1 is a schematic diagram of an embodiment of a semiconductor die 110. The semiconductor die 110 has the T/R switch 100. 9A Furthermore, the semiconductor die 110 also features a control circuit 101 connected to a chip interface or chip bus. The control circuit 101 generates the control signals for the T/R switch 100 based on data received via the bus.

Although an embodiment of a circuit arrangement suitable for controlling an RF switch is shown, the RF switches may be controlled in other ways herein.

The 10A-10D These are simulation results for an example implementation of the T/R switch 100 from 9A , in which the receiving branch 91 and the transmitting branch 92 are implemented for 5G dual-band operation at 28 GHz and 39 GHz.

10A This is an example of a graphical representation of loss over frequency for the receive branch 91 of the T/R switch 100 of 9A .

10B This is an example of a graphical representation of reverse isolation over frequency for the receive branch 91 of the T/R switch 100. 9A .

10C This is an example of a graphical representation of loss over frequency for the receive branch 91 of the T/R switch 100 of 9A .

10D This is an example of a graphical representation of reverse isolation over frequency for the transmit branch 92 of the T/R switch 100. 9A .

Although various examples of performance results have been shown, simulation or measurement results can vary based on a wide variety of factors, such as simulation models, simulation tools, simulation parameters, measurement conditions, fabrication technology, and/or implementation details. Accordingly, other results are possible.

Applications

Devices utilizing the schemes described above can be implemented in various electronic devices. Examples of electronic devices include RF communication systems, consumer electronics products, electronic test equipment, communication infrastructure, and more. For instance, one or more RF switches may be incorporated into a wide range of communication systems, including, but not limited to, radar systems, base stations, mobile devices (such as smartphones or handsets), phased-array antenna systems, laptop computers, tablets, and portable electronics.

The teachings contained herein can be applied to RF communication systems operating over a wide range of frequencies, including not only RF signals between 100 MHz and 7 GHz, but also higher frequencies such as those in the X-band (approximately 7 GHz to 12 GHz), the Ku _- band (approximately 12 GHz to 18 GHz), the K-band (approximately 18 GHz to 27 GHz), the Ka _- band (approximately 27 GHz to 40 GHz), the V-band (approximately 40 GHz to 75 GHz), and/or the W-band (approximately 75 GHz to 110 GHz). Accordingly, the teachings contained herein can be applied to a wide variety of RF communication systems, including microwave communication systems.

The signals processed by the RF switches herein can be associated with a variety of communication standards, including but not limited to GSM (Global System for Mobile Communications), EDGE (Enhanced Data Rates for GSM Evolution), CDMA (Code Division Multiple Access), W-CDMA (Wideband CDMA), 3G, LTE (Long Term Evolution), 4G and/or 5G, as well as other proprietary and non-proprietary communication standards.

The above description may refer to elements or features as being “connected” or “coupled” to one another. As used herein, “connected,” unless expressly stated otherwise, means that one element/feature is directly or indirectly, and not necessarily mechanically, connected to another element/feature. Likewise, unless expressly stated otherwise, “coupled” means that one element/feature is directly or indirectly, and not necessarily mechanically, coupled to another element/feature. Although the various schemes shown in the figures represent example arrangements of elements and components, additional intermediate elements, devices, features or components may therefore be present in an actual embodiment (assuming that the functionality of the circuits shown is not affected).

Although certain embodiments have been described, these embodiments are presented only as examples and are not intended to limit the scope of the disclosure. In fact, the novel device, methods, and systems described herein can be embodied in a multitude of other forms; furthermore, various omissions, substitutions, and modifications to the form of the methods and systems described herein can be made without departing from the concept of the disclosure. For example, although the embodiments disclosed herein are presented in a given arrangement, alternative embodiments can perform similar functionalities with different components and/or circuit topologies, and some elements can be deleted, moved, added, subdivided, combined, and/or modified. Each of these elements can be implemented in a multitude of different ways. Any combination of the elements and actions of the various embodiments described above is conceivable to provide further embodiments. Accordingly, the scope of the present invention is defined only by reference to the appended claims. According to one aspect, an RF switch comprises a stack of two or more field-effect transistors (FETs) electrically connected between a first terminal and a second terminal. Furthermore, the RF switch also features an inductor connected between the first and second terminals and in parallel with the stack of FETs. A first set of FETs is controlled to turn the RF switch on or off. A second set of FETs is controlled to tune a resonant frequency of the RF switch when it is off.

Although the claims submitted here for filing with the USPTO are in the format of a single dependency, it is understood that each claim may depend on any preceding claim of the same type, except where this is clearly not technically feasible.

Claims (20)

High-frequency (HF) switch (50, 60, 70, 80, 90) with adjustable resonant frequency, wherein the HF switch (50, 60, 70, 80, 90) comprises: multiple terminals, each comprising a first terminal (T1) and a second terminal (T2); an inductor (35; 45) electrically connected between the first terminal (T1) and the second terminal (T2); and multiple field-effect transistors (FETs) electrically connected in series between the first terminal (T1) and the second terminal (T2) and in parallel with the inductor (35), wherein a first part (31; 31a, 31b, 31c; 41) of the multiple FETs are controlled by a control signal to set the RF switch (50, 60, 70, 80, 90) to an ON state or an OFF state, and wherein a second part (32a, 32b; 42a, 42b) of the multiple FETs are separately controllable by the control signal to adjust a resonant frequency of the RF switch (50, 60, 70, 80, 90) in the OFF state. RF switch after Claim 1 , wherein at least one FET of the second part (32a, 32b) has a different size than at least one FET of the first part. RF switch after Claim 1 or 2 , wherein the first part (31a, 31b, 31c) has at least two FETs. RF switch after one of the Claims 1 until 3 , wherein the second part (32a, 32b) has at least two FETs of different sizes. RF switch after one of the Claims 1 until 4 , wherein the second part (32a, 32b) of the FETs is controllable by several digital bits (b ₀ , b ₁ , ..., b _n-1 ). RF switch after Claim 5 , where the multiple digital bits (b ₀ , b ₁ , ..., b _n-1 ) are generated based on data received via a bus. RF switch after Claim 5 or 6 , where one value of the several digital bits (b ₀ , b ₁ , ..., b _n-1 ) controls a working frequency band. RF switch after one of the Claims 5 until 7 , where one value of the several digital bits (b ₀ , b ₁ , ..., b _n-1 ) compensates for a process fluctuation. RF switch after one of the Claims 1 until 8 , further comprising a receive branch (91) and a transmit branch (92), wherein the inductor (35) and the multiple FETs (31a, 31b, 31c, 42a, 42b) are contained in the receive branch (91). RF switch after one of the Claims 1 until 9 , further comprising a receive branch (91) and a transmit branch (92), wherein the inductor (45) and the multiple FETs (41, 42a, 42b) are contained in the transmit branch (92). A method for high-frequency (HF) switching, comprising: propagating an HF signal through two or more field-effect transistors (FETs) of an HF switch (50, 60, 70, 80, 90) in an ON state of the HF switch (50, 60, 70, 80, 90); changing the switch from the ON state to an OFF state using a control signal that controls a first part (31; 31a, 31b, 31c; 41) of the two or more FETs; and adjusting a resonant frequency of the RF switch (50, 60, 70, 80, 90) in the OFF state using a second part (32a, 32b; 42a, 42b) of the two or more FETs, wherein the two or more FETs are arranged in a stack in parallel with an inductor (35; 45) of the RF switch (50, 60, 70, 80, 90). Procedure according to Claim 11 , wherein the first part (31a, 31b, 31c) has at least two FETs. Procedure according to Claim 11 or 12 , wherein the second part (32a, 32b) has at least two FETs. Procedure according to Claim 13 , further featuring the control of the second part (32a, 32b) of FETs using several digital bits (b ₀ , b ₁ , ..., b _n-1 ). Procedure according to Claim 14 , furthermore featuring the reception of data via a bus and setting a value of the several digital bits (b ₀ , b ₁ , ..., b _n-1 ) based on the data. Procedure according to Claim 14 or 15 , furthermore featuring the setting of a value of the several digital bits (b ₀ , b ₁ , ..., b _n-1 ) to select an operating frequency band. Procedure according to one of the Claims 14 until 16 , furthermore featuring the setting of a value of the several digital bits (b ₀ , b ₁ , ..., b _n-1 ) to compensate for a process fluctuation. Front-end system (30, 40), comprising: an antenna connection; a power amplifier (28); a low-noise amplifier (27); and a transmit/receive switch (21; 22) comprising a receive branch electrically connected between an input to the low-noise amplifier (28) and the antenna connection, and a transmit branch electrically connected between an output of the power amplifier (28) and the antenna connection, wherein the receive branch comprises several field-effect transistors (FETs) arranged in series and an inductor (35) in parallel with the several FETs, wherein a first part (31; 31a, 31b, 31c) of the several FETs is controlled by a control signal to activate or deactivate the receive branch, and wherein a second part (32a, 32b) of the several FETs is controllable separately from the control signal to adjust a resonant frequency of the receive branch when the receive branch is deactivated. Frontend system according to Claim 18 , where the second part (32a, 32b) of FETs is controllable by several digital bits (b ₀ , b ₁ , ..., b _n-1 ). Frontend system according to Claim 18 or 19 , implemented in a phased-array antenna system.