CN223193809U - Electric coupling member and semiconductor device - Google Patents

Abstract

The present disclosure relates to an electrical coupling member and a semiconductor device. The electrical coupling member is configured to electrically couple a semiconductor die arranged at a die mounting location of a substrate with at least one conductive lead arranged laterally of the die mounting location, the electrical coupling member comprising: at least one conductive pad; a first conductive strip and a second conductive strip protruding from the at least one conductive pad, the first conductive strip and the second conductive strip having a proximal end located at the conductive pad and a distal end distal to the conductive pad; and wherein the distal ends of the first conductive strip and the second conductive strip are configured to electrically couple to the semiconductor die and the at least one conductive lead arranged at the die mounting location of the substrate, respectively, to provide electrical coupling therebetween.

Description

Electric coupling member and semiconductor device

Priority claim

The present application claims the benefit of priority from italian patent application No.102023000017700 filed on month 29 of 2023, the contents of which are incorporated herein by reference in their entirety to the maximum extent allowed by law.

Technical Field

The present description relates to semiconductor devices.

The solutions described herein may be applied to Integrated Circuit (IC) power semiconductor devices, such as, for example, power quad flat no-lead (QFN) packages for automotive products.

Background

In a power semiconductor device, the current transferred from the high power portion of the device to the output pad may be large.

A clip or strap is used instead of a wire for current transmission.

Clips are currently stamped from flat material and are provided with centering features, such as pins, that facilitate centering and holding the clip in place during processing.

In low power QFN packages and/or if several channels are desired in the final package, more pads are required and the dimensions of the centering features on the lead frame and clip may become relatively small.

Furthermore, because of the tighter and elongated shape of the clip, separation and disposal of the clip may become difficult.

Another approach is based on the use of conductive strips to provide electrical coupling between the power portion of an Integrated Circuit (IC) semiconductor device and external pads.

These tapes are bonded via ultrasonic wedge bonding techniques and such bonding methods may severely damage (relatively small) external pads and/or die bond pads provided on the semiconductor die.

There is a need in the art to address the problems discussed previously.

Disclosure of utility model

According to one aspect of the present disclosure, there is provided an electrical coupling member configured to electrically couple a semiconductor die disposed at a die mounting location of a substrate with at least one conductive lead disposed laterally of the die mounting location, the electrical coupling member comprising at least one conductive pad, first and second conductive strips protruding from the at least one conductive pad, the first and second conductive strips having proximal ends at the conductive pad and distal ends remote from the conductive pad, and wherein the distal ends of the first and second conductive strips are configured to electrically couple to the semiconductor die and the at least one conductive lead, respectively, disposed at the die mounting location of the substrate to provide electrical coupling therebetween.

In one embodiment, the electrical coupling member comprises an array of a plurality of conductive pads and conductive leads, each conductive pad having a respective first and second conductive strip protruding therefrom, wherein distal ends of the respective first and second conductive strips are configured to couple to the semiconductor die disposed at the die mounting location of the substrate and to the respective conductive leads in the array to provide electrical coupling therebetween.

In one embodiment, the electrical coupling member includes a third conductive strip configured to electrically couple adjacent ones of the plurality of conductive pads.

In one embodiment, the electrical coupling member comprises an electrical insulator exposing the at least one electrically conductive pad at a side of the electrical insulator, wherein proximal ends of the first and second electrically conductive strips are arranged at the side of the electrical insulator.

According to another aspect of the present disclosure, there is provided a semiconductor device comprising a substrate having at least one conductive lead arranged laterally of a die mounting location, a semiconductor die arranged at the die mounting location of the substrate, and an electrical coupling member comprising at least one conductive pad having first and second conductive strips protruding therefrom, the first and second conductive strips having proximal ends at the conductive pads and distal ends remote from the conductive pads, wherein the distal ends of the first and second conductive strips are electrically coupled to the semiconductor die and the at least one conductive lead, respectively, arranged at the die mounting location of the substrate to provide electrical coupling therebetween.

In one embodiment, the electrical coupling member comprises an electrical insulator exposing the at least one electrically conductive pad at a side of the electrical insulator, and wherein proximal ends of the first and second electrically conductive strips are arranged at the side of the electrical insulator.

In one embodiment, a semiconductor device includes an insulating package molded onto the semiconductor die disposed at the die mounting location of the substrate and molded onto the electrical coupling member applied onto the semiconductor die.

In one embodiment, the electrical insulator exposes the at least one conductive pad at another side of the electrical insulator opposite the side where the proximal ends of the first and second conductive strips are disposed, and the insulating package leaves the at least one conductive pad exposed at the other side of the electrical insulator uncovered.

In one embodiment, the substrate is a preformed lead frame.

Drawings

One or more embodiments will now be described, by way of example, with reference to the accompanying drawings, in which:

Fig. 1 is a plan view illustrating a structure of a power semiconductor device;

FIG. 2 illustrates processing steps of a plurality of coupling members according to an embodiment of the present description;

Fig. 3A and 3B illustrate steps in a manufacturing process of a coupling member as described herein;

fig. 4 and 5 are plan and cross-sectional views (along line V-V of fig. 4) illustrating a coupling member as described herein;

Fig. 6 and 7 are plan and cross-sectional views (along line VII-VII of fig. 6) illustrating a coupling member as described herein mounted on a power semiconductor device;

FIG. 8 illustrates possible steps in the fabrication of a plurality of semiconductor devices, and

Fig. 9 to 14 are plan views (fig. 9, 11 and 13) and sectional views (fig. 10, 12 and 14) illustrating the embodiment of the present description, wherein fig. 10 is a sectional view along a line X-X of fig. 9, fig. 12 is a sectional view along a line XII-XII of fig. 11, and fig. 14 is a sectional view along a line XIV-XIV of fig. 13.

Detailed Description

Corresponding numerals and symbols in the various drawings generally indicate corresponding parts, unless otherwise indicated.

The figures are drawn for clarity and to clearly illustrate the relevant aspects of the embodiments and are not necessarily drawn to scale.

The edges of the features depicted in the various figures do not necessarily indicate the end of the range of the feature.

In the following description, one or more specific details are set forth in order to provide a thorough understanding of examples of the embodiments of the present description. These embodiments may be obtained without one or more of the specific details, or with other methods, components, materials, etc. In other instances, well-known structures, materials, or operations are not shown or described in detail to avoid obscuring aspects of the embodiments.

References in the framework of the present description to "an embodiment" or "one embodiment" are intended to indicate that a particular configuration, structure, or characteristic associated with the embodiment is included in at least one embodiment. Thus, phrases such as "in an embodiment" or "in one embodiment" that may occur in one or more points of the present description do not necessarily refer to the same embodiment.

Furthermore, the particular forms (conformations), structures, or characteristics may be combined in any suitable manner in one or more embodiments.

Headings/references used herein are provided for convenience only and thus do not limit the scope of protection or the scope of the embodiments.

For simplicity and ease of explanation, the same parts or elements are indicated in the respective figures with the same reference numerals unless the context indicates otherwise, and the corresponding description will not be repeated for each figure.

Fig. 1 illustrates the structure of an Integrated Circuit (IC) power semiconductor device 10, the semiconductor device 10 including a low power portion (illustrated on the left hand side of fig. 1), such as including a controller die or chip 14A attached to a first die pad 12A in a leadframe 12, and a high power portion (illustrated on the right hand side of fig. 1), such as including one or more power dies or chips 14B attached to one or more die pads 12A in the leadframe 12.

An array of leads 12B are arranged around a die pad 12A, with a low power die 14A and a high power die 14B mounted on the die pad 12A.

As shown herein by way of example, a semiconductor device such as device 10 includes, in addition to a substrate (leadframe) 12 on which one or more semiconductor chips or dies 14A, 14B are disposed (as the terms chip and die are used herein to be considered synonymous), conductive structures (wires, ribbons, clips) 16, 28 that couple the semiconductor dies 14A, 14B to leads (external pads) 12B in the substrate, and insulating packages (e.g., epoxy, visible in fig. 4, 7, 9 and 11 and designated by reference numeral 22) molded over the components formed thereby to complete a protective plastic body of the device 10.

The designation "leadframe (leadframe)" (or "leadframe (LEAD FRAME)") (see, for example, the USPC integrated vocabulary of the united states patent and trademark office) is currently used to refer to a metal frame that provides support for an integrated circuit chip or die, as well as electrical leads for interconnecting the integrated circuit in the die or chip to other electrical components or contacts.

In essence, the leadframe 12 includes an array of conductive features (or leads) 12B extending inwardly from the contoured location in the direction of a semiconductor chip or die (such as, for example, 14A or 14B), forming an array of conductive features from a die pad 12A configured to have at least one semiconductor chip or die attached thereto. This may be accomplished via conventional means, such as a die attach adhesive (e.g., a Die Attach Film (DAF)).

In some cases, the lead frame may be of a preformed type, i.e., a lead frame that includes an engraved metal (e.g., copper) structure formed by etching a metal sheet, and that includes empty spaces filled with resin that is "preformed" on the engraved metal structure.

The current transferred from the high power portion of the device to the output pad 12B may be significant. As shown on the right hand side of fig. 1, clip 28 is thus used in place of a wire. The wires 16 may still be used to provide electrical coupling to low power portions (e.g., the controller die) in the device, as shown on the left hand side of fig. 1.

That is, as shown in fig. 1, a conductive configuration is provided that includes a wire bond pattern 16 that couples a low power portion (left-hand side of fig. 1) to a selected one of the wires 12B. These wire bond patterns are coupled to die (bond) pads (not visible in the figure for scale reasons) provided at the front or top surface of the chip.

In contrast, clip 28 is used to couple the high power portion (right hand side of fig. 1) to selected ones of leads 12B that serve as (power) output pads for device 10. Clamps are used instead of wires due to the fact that the current transferred from the high power portion of the power semiconductor device to the output pad may be large.

The clip 28, as shown in fig. 1, is formed by stamping a flat metal (e.g., copper) material according to conventional methods, for example.

The clips are typically provided with centering features that facilitate installation during handling and hold the clips 28 in place. For example, pins may be provided at the terminal portions of the clips via punching, which pins are to be coupled to the respective leads 12B provided with recessed portions at corresponding positions.

Due to the relatively small dimensions of current semiconductor devices, it is becoming increasingly difficult to provide centering features such as pins via conventional stamping tools. In some devices, pins cannot be provided when more than two power channels are desired.

According to another conventional approach, a tape, i.e., a conductive (e.g., metallic material such as copper or copper alloy) strip-like configuration, is used to provide the desired (power) electrical coupling between the power semiconductor die 14B and the power leads 12B.

The terminal portions of the tape may be bonded to the underlying die bond pads 18 or leads 12B via ultrasonic wedge bonding techniques to form the desired electrical coupling and to hold the tape in place during processing of the device.

Ultrasonic wedge bonding is essentially based on the application of ultrasonic waves and (mechanical) pressure to form an electrical connection between the terminal portions of the ribbon and the underlying surface.

While wedge bonding is advantageous in some respects, wedge bonding can have an adverse effect on the device structure due to mechanical stresses applied during bond formation.

The mechanical stress applied during the wedge bonding step may adversely affect both the leadframe 12 and the semiconductor die 14B, possibly causing deformation of the leadframe 12 and/or dishing of the semiconductor die 14B at its die bond pads 18. Such adverse effects may cause the device being processed to fail and fail.

In a solution as described herein, an electrical coupling means is provided to electrically couple the semiconductor die to one or more (power) leads.

In a solution as described herein, the electrical coupling member may be provided via a pre-forming technique.

The solution as described herein contemplates providing a leadframe, mounting a die thereon, applying an electrical coupling member to form an electrical connection between the die and leads in the leadframe.

The electrical coupling members as described herein may be formed via a pre-forming technique, similar to the process of providing a pre-formed leadframe.

As known to those skilled in the art, during the manufacture of preformed lead frames, a plurality of individual lead frames may be arranged in a lead frame reel (i.e., a common substrate) to facilitate simultaneous processing thereof.

In a similar manner, multiple coupling members 100 may be handled simultaneously by providing a coupling spool 1000 as shown in fig. 2, the coupling spool 1000 comprising multiple individual coupling members 100.

Fig. 3A and 3B are enlarged views of a portion of coupling spool 1000 indicated by arrow III, illustrating the processing steps of manufacturing coupling member 100 according to embodiments of the present description.

As shown in fig. 3A, a portion of coupling spool 1000 includes an outer frame of electrically insulating preformed compound 20.

An elongated body 101 of electrically insulating preformed compound 20 is supported by the outer frame and divides the area contained in the outer frame into two void areas 103.

The body 101 is provided with an exposed, i.e. not covered by the preformed compound 20, electrical metal (e.g. copper) pad 102 at the first surface of the body 101 of the electrically insulating compound 20.

As mentioned, a coupling spool 1000 having a spool portion as shown in fig. 3A may be formed using conventional preforming techniques, and a metal (e.g., copper) sheet may be processed via a first (photo) etching step to form a engraved structure comprising empty spaces filled with resin that is "preformed" on the engraved metal structure. A second (photo) etching step may be performed to etch away additional metal material to form additional features (such as void regions 103) in the engraved structure.

Fig. 3B illustrates a process step of attaching the conductive tape 108 to the body 101 of the coupling member 100.

As illustrated in the figures, two straps 108 may be attached to each of the metal pads 102 exposed at the first surface of the body 101 of the coupling member 100. The strap 108 may be attached, for example, via conventional (ultrasonic) wedge bonding techniques.

In more detail, the first strap 108 may be wedge-bonded at its (proximal) terminal portion to the exposed metal pad 102 at the first surface of the body 101. The second strap 108 may be wedge-bonded to the terminal end of the first strap 108 previously soldered to the metal pad 102 (wedge-on-wedge), as shown in fig. 3B. The distal terminal portion of tape 108 is configured to contact die bond pad 18 and leads 12B of (IC) semiconductor die 14B.

In the exemplary case, two straps 108 are attached to each of the four metal pads 102 in order to provide four (high current) electrical couplings between the semiconductor die 14B and the leads 12B, as described below.

For simplicity and ease of explanation, the following description will consider the case of the coupling member 100 having four high-current electrical couplings. This is by way of example only, as device designs may suggest a different number or different layout of couplings.

Cutting (e.g., with a saw or blade) along the cut line indicated by reference CL in fig. 3B results in a separate coupling member 100 as shown in fig. 4 and 5 (where fig. 5 is a cross-sectional view along line V-V of fig. 4).

As shown in fig. 5, the metal pad 102 may be uncovered by the electrically insulating (pre) mold compound at a first surface of the body 101 and covered by the (pre) mold compound 20 at a second surface (opposite to the first surface) of the body 101 of the coupling member 100.

In other words, the coupling member 100 as described herein comprises (at least) one conductive pad 102 having first and second conductive strips 108 protruding therefrom, the first and second conductive strips 108 having proximal ends located at the conductive pad 102 and distal ends remote from the conductive pad 102.

Distal ends of the first and second conductive strips 108 are configured to be electrically coupled to a semiconductor die (such as semiconductor die 14B) and (at least one) conductive lead 12B, respectively, disposed at a die mounting location 12A of the leadframe 12.

The electrical coupling member 100 may include an electrical insulator 101 exposing the conductive pad 102 at a side of the electrical insulator 101. The proximal ends of the first and second conductive strips 108 are arranged at the sides of the electrical insulator 101 where the conductive pads 102 are exposed.

Fig. 6 and 7 (where fig. 7 is a cross-sectional view along line VII-VII of fig. 6) illustrate a coupling member 100 applied to a leadframe 12 with a (power) semiconductor die 14B mounted on the leadframe 12 to provide a desired electrical coupling between the semiconductor die 14B and the leads 12B.

As shown, the size and dimensions of the coupling member 100 and its parts, as well as the location of the metal pads 102 (and thus the locations of the straps 108) may be selected to match the locations of and distances between the die bond pads 18 and the leads 12B.

The distal terminal portion of the tape 108 is attached to the die bond pad 18 and the leads 12B by providing solder SM thereon.

As shown in fig. 6, two straps 108, one of the ends of which is soldered at the exposed metal pad 102 at the first surface of the body 101 of the coupling member 100, provide an electrical coupling between the die bond pad 18 and the (power) lead 12B provided on the top/front surface of the (power) semiconductor die 14B.

It will be appreciated that it is much easier to handle, center and hold the coupling member 100 in place as described herein than with a separate clip. Furthermore, the coupling member 100 may be provided with centering features (such as pins, not shown in the figures for simplicity) to facilitate positioning of the coupling member 100.

In summary, the manufacturing process as described herein includes disposing a semiconductor die 14B at a die mounting location (i.e., die pad) 12A of a substrate (e.g., leadframe) 12, wherein the substrate 12 includes an array of conductive leads 12B disposed laterally of the die mounting location 12A, and electrically coupling the semiconductor die 14B disposed at the die mounting location 12A of the substrate 12 with one (or more) of the array of conductive leads 12B via an electrical coupling member 100 applied to the semiconductor die 14B.

The electrical coupling member 100 includes one (or more) conductive pads 102, the conductive pads 102 having first and second conductive strips 108 protruding therefrom. The first and second conductive strips 108 have proximal ends located at the conductive pads 102 and distal ends remote from the conductive pads 102.

Accordingly, the distal ends of the first and second conductive strips 108 are electrically coupled to the semiconductor die 14B and conductive leads 12B, respectively, disposed at the die mounting location 12A of the substrate 12 to provide electrical coupling therebetween.

For example, as shown in fig. 6, further processing of the (integrated circuit) semiconductor device may involve molding an electrically insulating compound to provide a protective package for the device. For example, the package is illustrated in fig. 7 and is referenced therein by reference numeral 22.

As mentioned, processing multiple coupling members 100 simultaneously may involve providing a coupling spool that includes multiple such coupling members 100.

Fig. 8 illustrates one possible processing step in which a plurality of coupling members 100 are simultaneously mounted on a corresponding plurality of lead frames 12, the lead frames 12 having respective semiconductor die disposed thereon.

As shown, a coupling spool 1000 including a plurality of coupling members 100 may be mounted on the leadframe spool 1200, and each coupling spool 1000 portion (including a separate coupling member 100) may mate with a corresponding leadframe spool 1200 portion (including a separate leadframe 12).

Such processing steps may be facilitated by providing the spools 1000, 1200 with centering features (not visible for simplicity) such as pins and corresponding recesses.

After the coupling spool 1000 is applied to the leadframe spool 1200, each portion of the spool may be provided with the desired electrical coupling by electrically coupling the distal ends of the bands 108 of the individual coupling members 100 contained in the coupling spool 1000 to the die bond pads 18 and leads 12B of the corresponding individual leadframes 12 contained in the leadframe spool 1200, similar to that discussed in the case where the individual coupling members 100 are mounted on the individual leadframes 12.

The reels 1000, 1200 may be further processed to process multiple devices simultaneously and finally separated to obtain multiple individual, processed devices.

Fig. 9 to 14 illustrate other possible embodiments of the present description.

Fig. 9 and 10 (where fig. 10 is a cross-sectional view along line X-X of fig. 9) illustrate an embodiment in which the coupling member 100 is mounted such that the metal pads 102 (and tape 108 attached thereto) face the semiconductor die 14B mounted on the leadframe 12.

Tape 108 may be attached to die bond pad 18 and wire 12B as previously described, i.e., providing solder SM, such as solder paste or glue.

As shown in fig. 10, an insulating protective package 22 may be provided for the device 10 by molding an insulating molding compound (such as, for example, epoxy) onto the assembly.

Fig. 11 and 12 (where fig. 12 is a cross-sectional view along line XII-XII of fig. 11) illustrate embodiments of the present description in which the coupling member 100 has metal pads 102 on both the first and second surfaces of the body 101 of the coupling member 100 that are not covered by the preformed compound 20.

Such a coupling member 100 may be applied to a semiconductor die 14B with a first surface of the body 101 facing the semiconductor die 14B, as shown in fig. 11.

As shown in fig. 12, the electrically insulating package 22 may be provided in such a way that the metal pads 102 are exposed at the top/front surface of the device 10.

That is, the electrical coupling member may be formed in such a manner that the electrical insulator 101 exposes the conductive pad 102 at the other side of the electrical insulator 101 opposite to the side where the proximal ends of the first and second conductive strips 108 are arranged.

The insulating package 22 molded onto the semiconductor die 14B and the electrical coupling member 100 may leave the conductive pads 102 exposed at the other side of the electrical insulator 101 uncovered.

Fig. 13 and 14 (where fig. 14 is a cross-sectional view along line XIV-XIV of fig. 13) illustrate an embodiment of two power channel shorts ("shorts").

Such a short circuit may be obtained by providing a third strip 108 electrically coupling two adjacent metal pads 102.

In the example shown in fig. 13 and 14, the terminal ends of the first strap 108 are wedge-bonded to two adjacent metal pads 102, thereby providing a short circuit therebetween. The additional strap 108 is soldered (wedge-on-wedge engagement) to provide electrical coupling in a manner similar to that previously described.

One or more embodiments relate to a method.

One or more embodiments relate to corresponding components. An electrical coupling member used in the manufacture of (power) semiconductor devices and suitable for being provided by a supplier to a manufacturer of the semiconductor devices may be an example of such a component.

One or more embodiments relate to semiconductor devices including such components.

In a solution as described herein, an electrical coupling means is provided to electrically couple an integrated circuit semiconductor die to one or more (power) leads.

In a solution as described herein, the electrical coupling member may be formed via a pre-forming technique.

The solution as described herein contemplates providing a leadframe, mounting a die thereon, applying electrical coupling members to provide a desired electrical coupling between the die and leads in the leadframe.

According to an aspect of the present disclosure, a method is provided that includes disposing a semiconductor die at a die mounting location of a substrate, the substrate including an array of laterally disposed conductive leads at the die mounting location, electrically coupling the semiconductor die disposed at the die mounting location of the substrate with at least one conductive lead of the array of conductive leads via an electrical coupling member applied to the semiconductor die, wherein the electrical coupling member includes at least one conductive pad having first and second conductive strips protruding therefrom, the first and second conductive strips having proximal ends at the conductive pad and distal ends remote from the conductive pad, and wherein electrically coupling includes electrically coupling the distal ends of the first and second conductive strips to the semiconductor die and the at least one conductive lead disposed at the die mounting location of the substrate, respectively, to provide electrical coupling therebetween.

In one embodiment, the electrical coupling means comprises a plurality of conductive pads, each conductive pad having a respective first and second conductive strip protruding therefrom, and wherein electrically coupling comprises coupling distal ends of the respective first and second conductive strips to the semiconductor die disposed at the die mounting location of the substrate and to respective conductive leads in the array to provide electrical coupling therebetween.

In one embodiment, the method further comprises coupling adjacent ones of the plurality of conductive pads via a third conductive strip.

In one embodiment, the electrical coupling member comprises an electrical insulator exposing the at least one electrically conductive pad at a side of the electrical insulator, and wherein proximal ends of the first and second electrically conductive strips are disposed at the side of the electrical insulator.

In one embodiment, the method further comprises molding an insulating package onto the semiconductor die disposed at the die mounting location of the substrate and onto the electrical coupling member applied onto the semiconductor die.

In one embodiment, the electrical insulator exposes the at least one conductive pad at another side of the electrical insulator opposite the side where the proximal ends of the first and second conductive strips are disposed, and wherein molding includes molding the insulating package onto the semiconductor die disposed at the die mounting location of the substrate and onto the electrical coupling member applied onto the semiconductor die, wherein the insulating package leaves the at least one conductive pad exposed at the other side of the electrical insulator uncovered.

According to another aspect of the present disclosure, a method is provided that includes providing a first reel carrying a first array of semiconductor dies disposed at respective die mounting locations of a substrate and respective conductive leads disposed laterally of the die mounting locations, providing a second reel carrying a second array of electrical coupling members configured to electrically couple the semiconductor dies with respective conductive leads in the first reel, wherein each electrical coupling member includes at least one conductive pad having first and second conductive strips protruding therefrom, the first and second conductive strips having proximal ends at the conductive pads and distal ends remote from the conductive pads, disposing the first and second reels in a face-to-face relationship, wherein the electrical coupling members in the second array are applied to respective semiconductor dies in the first array, and providing first and second conductive strips of the second electrical coupling members with respective conductive leads of the first die at the first and second die mounting locations therebetween.

In one embodiment, the method further comprises coupling adjacent ones of the plurality of conductive pads via a third conductive strip.

In one embodiment, each electrical coupling member comprises an electrical insulator exposing the at least one electrically conductive pad at a side of the electrical insulator, and wherein proximal ends of the first and second electrically conductive strips are disposed at the side of the electrical insulator.

In one embodiment, the method further comprises molding an insulating package onto the semiconductor die disposed at the die mounting location of the substrate and onto the electrical coupling member applied onto the semiconductor die.

In one embodiment, the electrical insulator exposes the at least one conductive pad at another side of the electrical insulator opposite the side where the proximal ends of the first and second conductive strips are disposed, and wherein molding includes molding the insulating package onto the semiconductor die disposed at the die mounting location of the substrate and onto the electrical coupling member applied onto the semiconductor die, wherein the insulating package leaves the at least one conductive pad exposed at the other side of the electrical insulator uncovered.

The claims are an integral part of the technical teaching provided for by the embodiments.

Without prejudice to the underlying principles, the details and the embodiments may vary, even significantly, with respect to what has been described by way of example only, without departing from the scope of the protection. The scope of protection is determined by the appended claims.

Claims (9)

1. An electrical coupling member, configured to electrically couple a semiconductor die disposed at a die mounting location of a substrate with at least one conductive lead disposed laterally of the die mounting location, the electrical coupling member comprising: at least one conductive pad; a first conductive strip and a second conductive strip protruding from the at least one conductive pad, the first conductive strip and the second conductive strip having a proximal end at the conductive pad and a distal end distal from the conductive pad; and The distal ends of the first and second conductive tapes are configured to be electrically coupled to the semiconductor die and the at least one conductive lead arranged at the die mounting position of the substrate, respectively, to provide electrical coupling therebetween. 2. The electrical coupling structure of claim 1 , comprising an array of a plurality of conductive pads and conductive leads, each conductive pad having a respective first conductive strip and a second conductive strip protruding therefrom, wherein distal ends of the respective first conductive strip and the second conductive strip are configured to couple to the semiconductor die arranged at the die mounting location of the substrate and to the respective conductive leads in the array to provide electrical coupling therebetween. 3 . The electrical coupling member of claim 2 , further comprising a third conductive strip configured to electrically couple adjacent conductive pads among the plurality of conductive pads. 4. The electrical coupling member of claim 3 , wherein the electrical coupling member comprises an electrical insulator, the at least one conductive pad being exposed at a side of the electrical insulator, wherein the proximal ends of the first and second conductive strips are disposed at the side of the electrical insulator. 5. A semiconductor device, comprising: a substrate having at least one conductive lead disposed laterally of the die mounting location; a semiconductor die disposed at a die mounting location on the substrate; and an electrical coupling member comprising at least one conductive pad having a first conductive strip and a second conductive strip protruding therefrom, the first conductive strip and the second conductive strip having a proximal end at the conductive pad and a distal end distal from the conductive pad; The distal ends of the first conductive tape and the second conductive tape are respectively electrically coupled to the semiconductor die and the at least one conductive lead arranged at the die mounting position of the substrate to provide electrical coupling therebetween. 6. The semiconductor device of claim 5 , wherein the electrical coupling member comprises an electrical insulator, the at least one conductive pad being exposed at a side of the electrical insulator, and wherein the proximal ends of the first and second conductive straps are arranged at the side of the electrical insulator. 7. The semiconductor device of claim 6, comprising an insulating package molded onto the semiconductor die disposed at the die mounting location of the substrate and molded onto the electrical coupling member applied to the semiconductor die. 8. The semiconductor device according to claim 7 , wherein the electrical insulator exposes the at least one conductive pad at another side of the electrical insulator opposite to the side on which the proximal ends of the first and second conductive strips are arranged, and The insulating encapsulation leaves the at least one conductive pad exposed at the other side of the electrical insulator uncovered. 9. The semiconductor device according to claim 5, wherein the substrate is a preformed lead frame.