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CN201087904Y - Light-emitting diode chip packaging structure with ceramic as substrate - Google Patents

Light-emitting diode chip packaging structure with ceramic as substrate Download PDF

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Publication number
CN201087904Y
CN201087904Y CN 200720176769 CN200720176769U CN201087904Y CN 201087904 Y CN201087904 Y CN 201087904Y CN 200720176769 CN200720176769 CN 200720176769 CN 200720176769 U CN200720176769 U CN 200720176769U CN 201087904 Y CN201087904 Y CN 201087904Y
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China
Prior art keywords
conductive
emitting diode
substrate
light
diode chip
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Expired - Lifetime
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CN 200720176769
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Chinese (zh)
Inventor
汪秉龙
庄峰辉
洪基纹
陈家宏
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Harvatek Corp
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Harvatek Corp
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

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Abstract

A light emitting diode chip packaging structure using ceramic as a substrate comprises: the LED package comprises a ceramic substrate, a conductive unit, a hollow ceramic shell, a plurality of LED chips and a packaging colloid. The ceramic substrate is provided with a body and a plurality of lugs extending out of three surfaces of the body; the conductive unit has a plurality of conductive layers formed on the surfaces of the bumps respectively; the hollow ceramic shell is fixed on the top surface of the body to form an accommodating space, and the accommodating space exposes the top surfaces of the conductive layers; the light emitting diode chips are respectively arranged in the accommodating space, and the positive electrode end and the negative electrode end of each light emitting diode chip are respectively and electrically connected with different conducting layers; the packaging colloid is filled in the containing space to cover the light-emitting diode chips.

Description

以陶瓷为基板的发光二极管芯片封装结构 Packaging structure of light-emitting diode chip with ceramic as substrate

技术领域technical field

本实用新型有关于一种发光二极管芯片封装结构,尤指一种以陶瓷为基板的发光二极管芯片封装结构。The utility model relates to a light-emitting diode chip packaging structure, in particular to a light-emitting diode chip packaging structure with ceramics as a substrate.

背景技术Background technique

请参阅图1所示,为习知直立式发光二极管芯片封装结构的剖面示意图。由图中可知,习知的直立式发光二极管芯片封装结构包括:一绝缘基底1a、一导电架2a、一发光二极管芯片3a及一荧光胶体4a。Please refer to FIG. 1 , which is a schematic cross-sectional view of a conventional vertical LED chip packaging structure. It can be seen from the figure that the conventional vertical LED chip packaging structure includes: an insulating substrate 1a, a conductive frame 2a, a LED chip 3a and a fluorescent colloid 4a.

其中,该导电架2a具有二个分别延该绝缘基底1a的两相反侧边弯折二次的导电接脚20a、21a,以使得该等导电接脚20a、21a的下端面可与一电路板5a产生电性接触,并且该导电接脚20a、21a分别具有一正电极区域200a及一负电极区域210a。Wherein, the conductive frame 2a has two conductive pins 20a, 21a respectively bent twice along two opposite sides of the insulating base 1a, so that the lower end surfaces of the conductive pins 20a, 21a can be connected with a circuit board 5a makes electrical contact, and the conductive pins 20a, 21a respectively have a positive electrode area 200a and a negative electrode area 210a.

再者,该发光二极管芯片3a具有一正电极端300a及一负电极端310a,并且该发光二极管芯片3a直接设置在该导电接脚20a上,以使得该正电极端300a直接与该导电接脚20a的正电极区域200a产生电性接触,而该发光二极管芯片3a的负电极端310a透过一导线6a与该导电接脚21a的负电极区域210a产生电性连接。Furthermore, the LED chip 3a has a positive electrode terminal 300a and a negative electrode terminal 310a, and the LED chip 3a is directly disposed on the conductive pin 20a, so that the positive electrode terminal 300a is directly connected to the conductive pin 20a The positive electrode region 200a of the light-emitting diode chip 3a is electrically connected to the positive electrode region 200a, and the negative electrode terminal 310a of the LED chip 3a is electrically connected to the negative electrode region 210a of the conductive pin 21a through a wire 6a.

最后,该荧光胶体4a覆盖在该发光二极管芯片3a上,以保护该发光二极管芯片3a。藉此,习知的直立式发光二极管芯片封装结构可产生向上投光(如箭头所示)的发光效果。Finally, the fluorescent colloid 4a covers the LED chip 3a to protect the LED chip 3a. In this way, the conventional vertical LED chip packaging structure can produce a luminous effect of projecting light upward (as indicated by the arrow).

请参阅图2及图3所示,其分别为习知侧式发光二极管芯片封装结构的立体示意图及图2的3-3剖面图。由图中可知,习知的侧式发光二极管芯片封装结构包括:一绝缘基底1b、一导电架2b、一发光二极管芯片3b及一荧光胶体4b。Please refer to FIG. 2 and FIG. 3 , which are respectively a three-dimensional schematic diagram of a conventional side-type light-emitting diode chip packaging structure and a cross-sectional view at 3-3 of FIG. 2 . It can be seen from the figure that the conventional side-type LED chip packaging structure includes: an insulating substrate 1b, a conductive frame 2b, an LED chip 3b and a fluorescent glue 4b.

其中,该导电架2b具有二个分别延该绝缘基底1b的一侧边弯折二次的导电接脚20b、21b,以使得该等导电接脚20b、21b的侧端面可与一电路板5b产生电性接触,并且该导电接脚20b、21b分别具有一正电极区域200b及一负电极区域210b。Wherein, the conductive frame 2b has two conductive pins 20b, 21b respectively bent twice along one side of the insulating base 1b, so that the side end surfaces of the conductive pins 20b, 21b can be connected with a circuit board 5b An electrical contact is made, and the conductive pins 20b, 21b respectively have a positive electrode region 200b and a negative electrode region 210b.

再者,该发光二极管芯片3b具有一正电极端300b及一负电极端310b,并且该发光二极管芯片3b直接设置在该导电接脚20b上,以使得该正电极端300b直接与该导电接脚20b的正电极区域200b产生电性接触,而该发光二极管芯片3b的负电极端310b透过一导线6b与该导电接脚21b的负电极区域210b产生电性连接。Furthermore, the light emitting diode chip 3b has a positive electrode end 300b and a negative electrode end 310b, and the light emitting diode chip 3b is directly arranged on the conductive pin 20b, so that the positive electrode end 300b is directly connected to the conductive pin 20b The positive electrode region 200b of the light-emitting diode chip 3b is electrically connected to the positive electrode region 200b, and the negative electrode terminal 310b of the LED chip 3b is electrically connected to the negative electrode region 210b of the conductive pin 21b through a wire 6b.

最后,该荧光胶体4b覆盖在该发光二极管芯片3b上,以保护该发光二极管芯片3b。藉此,习知的侧式发光二极管芯片封装结构可产生侧向投光(如图3的箭头所示)的发光效果。Finally, the fluorescent colloid 4b covers the LED chip 3b to protect the LED chip 3b. Thereby, the conventional side-type LED chip packaging structure can produce the luminous effect of side-projected light (as shown by the arrow in FIG. 3 ).

然而,上述直立式及侧式发光二极管芯片封装结构的该等导电接脚(20a、21a、20b、21b)必须经过弯折才能与电路板(5a、5b)产生接触,因此增加制程的复杂度。However, the conductive pins (20a, 21a, 20b, 21b) of the above vertical and side LED chip packaging structures must be bent to make contact with the circuit board (5a, 5b), thus increasing the complexity of the manufacturing process .

实用新型内容Utility model content

本实用新型所要解决的技术问题,在于提供一种以陶瓷为基板的发光二极管芯片封装结构,其可藉由任何成形的方式,将导电层成形于陶瓷基板上,再透过陶瓷共烧技术(Low-Temperature Cofired Ceramics,LTCC)将中空陶瓷壳体固定于该陶瓷基板上,因此本实用新型不像习知一样需要使用导电架并且还要经过弯折才能与电路板产生电性连接。The technical problem to be solved by the utility model is to provide a light-emitting diode chip packaging structure with ceramics as the substrate, which can form the conductive layer on the ceramic substrate by any forming method, and then through the ceramic co-firing technology ( Low-Temperature Cofired Ceramics, LTCC) fixes the hollow ceramic shell on the ceramic substrate, so the utility model does not need to use a conductive frame like the conventional ones, and it needs to be bent to be electrically connected to the circuit board.

为了解决上述技术问题,本实用新型提供一种以陶瓷为基板的发光二极管芯片封装结构,其包括:一陶瓷基板、一导电单元、一中空陶瓷壳体、复数个发光二极管芯片、及一封装胶体。其中,该陶瓷基板具有一本体、及复数个彼此分开且分别从该本体延伸出的突块;该导电单元具有复数个分别成形于该等突块表面的导电层;该中空陶瓷壳体固定于该陶瓷基板的本体的顶面上以形成一容置空间,并且该容置空间曝露出该等导电层的顶面;该等发光二极管芯片分别设置于该容置空间内,并且每一个发光二极管芯片的正、负电极端分别电性连接于不同的导电层;以及,该封装胶体填充于该容置空间内,以覆盖该等发光二极管芯片。In order to solve the above technical problems, the utility model provides a light-emitting diode chip packaging structure with ceramics as the substrate, which includes: a ceramic substrate, a conductive unit, a hollow ceramic shell, a plurality of light-emitting diode chips, and a packaging colloid . Wherein, the ceramic substrate has a body, and a plurality of protrusions separated from each other and respectively extended from the body; the conductive unit has a plurality of conductive layers respectively formed on the surfaces of the protrusions; the hollow ceramic shell is fixed on An accommodating space is formed on the top surface of the body of the ceramic substrate, and the accommodating space exposes the top surfaces of the conductive layers; the light emitting diode chips are respectively arranged in the accommodating space, and each light emitting diode The positive and negative electrode ends of the chip are electrically connected to different conductive layers; and the encapsulation gel is filled in the accommodating space to cover the light emitting diode chips.

其中,上述的突块是分别从该本体的其中三面延伸而出。Wherein, the above-mentioned protrusions respectively extend from three sides of the main body.

再者,根据本实用新型的其中一种方案,上述的导电单元可为一第一导电单元、一硬度强化单元及一第二导电单元的组合。其中,该第一导电单元具有复数个分别成形于该等突块表面的第一导电层;该硬度强化单元具有复数个分别成形于该等第一导电层上的硬度强化层;以及,该第二导电单元具有复数个分别成形于该等硬度强化层上的第二导电层;藉此,该等第一导电层、该等硬度强化层及该等第二导电层依序组合成该导电层。Furthermore, according to one solution of the present invention, the above-mentioned conductive unit may be a combination of a first conductive unit, a hardness strengthening unit and a second conductive unit. Wherein, the first conductive unit has a plurality of first conductive layers respectively formed on the surfaces of the protrusions; the hardness strengthening unit has a plurality of hardness enhancement layers respectively formed on the first conductive layers; and, the first The second conductive unit has a plurality of second conductive layers respectively formed on the hardness strengthening layers; thereby, the first conductive layers, the hardness strengthening layers and the second conductive layers are sequentially combined to form the conductive layer .

另外,上述该导电单元也可为一第一导电单元及一第二导电单元的组合。其中,该第一导电单元具有复数个分别成形于该等突块表面的第一导电层;该第二导电单元具有复数个分别成形于该等第一导电层上的第二导电层,其中每一个第二导电层为一硬度强化导电层(consolidatedlayer);藉此,该等第一导电层及该等第二导电层组合成该导电层。In addition, the aforementioned conductive unit may also be a combination of a first conductive unit and a second conductive unit. Wherein, the first conductive unit has a plurality of first conductive layers respectively formed on the surfaces of the protrusions; the second conductive unit has a plurality of second conductive layers respectively formed on the first conductive layers, wherein each A second conductive layer is a hardness enhanced conductive layer (consolidated layer); thereby, the first conductive layers and the second conductive layers are combined into the conductive layer.

本实用新型的优点在于:可藉由任何成形的方式,将导电层成形于陶瓷基板上,再透过陶瓷共烧技术(Low-Temperature Cofired Ceramics,LTCC)将中空陶瓷壳体固定于该陶瓷基板上,因此本实用新型不像习知一样需要使用导电架并且还要经过弯折才能与电路板产生电性连接。The utility model has the advantage that the conductive layer can be formed on the ceramic substrate by any forming method, and then the hollow ceramic shell can be fixed on the ceramic substrate through the ceramic co-firing technology (Low-Temperature Cofired Ceramics, LTCC). Therefore, the utility model does not require the use of a conductive frame as in the prior art and is also bent to be electrically connected to the circuit board.

为了能更进一步了解本实用新型为达成预定目的所采取的技术、手段及功效,请参阅以下有关本实用新型的详细说明与附图,相信本实用新型的目的、特征与特点,当可由此得一深入且具体的了解,然而所附图式仅提供参考与说明用,并非用来对本实用新型加以限制。In order to further understand the technology, means and effects that the utility model adopts to achieve the predetermined purpose, please refer to the following detailed description and accompanying drawings of the utility model, and believe that the purpose, features and characteristics of the utility model can be obtained from this For an in-depth and specific understanding, the attached drawings are only for reference and illustration, and are not intended to limit the present invention.

附图说明Description of drawings

图1为习知直立式发光二极管芯片封装结构的剖面示意图;FIG. 1 is a schematic cross-sectional view of a conventional vertical light-emitting diode chip packaging structure;

图2为习知侧式发光二极管芯片封装结构的立体示意图;Fig. 2 is a three-dimensional schematic diagram of a conventional side-type light-emitting diode chip packaging structure;

图3为图2的3-3剖面图;Fig. 3 is a 3-3 sectional view of Fig. 2;

图4为本实用新型以陶瓷为基板的发光二极管芯片封装结构的制作方法的第一实施例的流程图;4 is a flow chart of the first embodiment of the manufacturing method of the light-emitting diode chip packaging structure with ceramics as the substrate of the utility model;

图5A至图5C为本实用新型以陶瓷为基板的发光二极管芯片封装结构的制作方法的第一实施例的制作流程示意图;5A to 5C are schematic diagrams of the manufacturing process of the first embodiment of the manufacturing method of the light-emitting diode chip packaging structure using ceramics as the substrate of the present invention;

图6为本实用新型以陶瓷为基板的发光二极管芯片封装结构的第一实施例的剖面示意图;6 is a schematic cross-sectional view of the first embodiment of the LED chip packaging structure with ceramics as the substrate of the present invention;

图7为本实用新型第一实施例的发光二极管芯片的第一种设置方式的侧视示意图;Fig. 7 is a schematic side view of the first arrangement of the light-emitting diode chip in the first embodiment of the present invention;

图8为本实用新型第一实施例的发光二极管芯片的第二种设置方式的侧视示意图;Fig. 8 is a schematic side view of a second arrangement of light emitting diode chips in the first embodiment of the present invention;

图9为本实用新型第一实施例的发光二极管芯片的第三种设置方式的侧视示意图;Fig. 9 is a schematic side view of a third arrangement of light-emitting diode chips according to the first embodiment of the present invention;

图10为本实用新型发光二极管芯片的第四种设置方式的侧视示意图;Fig. 10 is a schematic side view of the fourth arrangement mode of the light-emitting diode chip of the present invention;

图11为本实用新型以陶瓷为基板的发光二极管芯片封装结构的制作方法的第二实施例的流程图;Fig. 11 is a flow chart of the second embodiment of the manufacturing method of the light-emitting diode chip packaging structure using ceramics as the substrate of the present invention;

图12为本实用新型以陶瓷为基板的发光二极管芯片封装结构的第二实施例的侧视剖面图;以及Fig. 12 is a side sectional view of the second embodiment of the LED chip packaging structure using ceramics as the substrate of the present invention; and

图13为本实用新型第一实施例的以陶瓷为基板的发光二极管芯片封装结构于侧式状态的立体示意图。FIG. 13 is a schematic perspective view of the LED chip packaging structure using ceramics as the substrate in a side state according to the first embodiment of the present invention.

主要组件符号说明Explanation of main component symbols

一、习知1. Knowledge

绝缘基底        1aInsulating base 1a

导电架          2a         导电接脚  20a、21aConductive frame 2a Conductive pins 20a, 21a

正电极区域      200aPositive electrode area 200a

负电极区域      210aNegative electrode area 210a

发光二极管芯片  3a         正电极端  300aLight-emitting diode chip 3a Positive terminal 300a

负电极端        310aNegative terminal 310a

荧光胶体        4aFluorescent colloid 4a

电路板          5acircuit board 5a

导线            6aWire 6a

绝缘基底        1bInsulation base 1b

导电架          2b        导电接脚   20b、21bConductive frame 2b Conductive pins 20b, 21b

                          正电极区域       200bPositive electrode area 200b

                          负电极区域       210bNegative Electrode Area 210b

发光二极管芯片   3b       正电极端         300bLED Chip 3b Positive Terminal 300b

                          负电极端         310bNegative terminal 310b

荧光胶体         4bFluorescent colloid 4b

电路板           5bcircuit board 5b

导线             6bWire 6b

二、本实用新型Two, the utility model

陶瓷基板         1         本体            10Ceramic substrate 1 1 body 10

                           突块            11                                                 

                           半穿孔          12                                                         

第一导电层       2The first conductive layer 2

硬度强化层       3Hardness strengthening layer 3

第二导电层       3′The second conductive layer 3′

第二导电层       4        正极导电部       40Second Conductive Layer 4 Positive Electrode Conductive Part 40

                          负极导电部       41Negative Conductive Part 41

第二导电层       4′      正极导电部       40′The second conductive layer 4′ positive conductive part 40′

                          负极导电部       41′Negative Conductive Part 41′

第二导电层       4″      正极导电部       40″Second conductive layer 4″ Positive electrode conductive part 40″

                          负极导电部       41″Negative Conductive Part 41″

中空陶瓷壳体     5        容置空间         50Hollow Ceramic Shell 5 Accommodating Space 50

发光二极管芯片   6        正电极端         60LED Chip 6 Positive Terminal 60

                          负电极端         61Negative terminal 61

发光二极管芯片   6′      正电极端         60Light-emitting diode chip 6′ positive terminal 60

                          负电极端         61′Negative electrode terminal 61′

发光二极管芯片    6″    正电极端    60″LED Chip 6″ Positive Terminal 60″

                         负电极端    61″Negative terminal 61″

导线              7、7′Wire 7, 7′

锡球              7″Solder Ball 7″

封装胶体          8Encapsulation colloid 8

发光二极管芯片    9      正电极端    90Light-emitting diode chip 9 positive terminal 90

                         负电极端    91Negative terminal 91

                         突块        92                                     

                         导线        93Conductor 93

                         正极导电部  94Positive Conductive Part 94

                         负极导电部  95Negative Conductive Part 95

具体实施方式Detailed ways

请参阅图4至图6所示,其分别为本实用新型以陶瓷为基板的发光二极管芯片封装结构的制作方法的第一实施例的流程图、制作流程示意图、及剖面示意图。由图4的流程图中可知,本实用新型提供一种以陶瓷为基板的发光二极管芯片的封装结构,其制作方法包括:首先,配合图5A及图6所示,提供一陶瓷基板1,其具有一本体10、及复数个彼此分开且分别从该本体10的其中三面延伸出的突块11(S100),其中该陶瓷基板1的本体10的侧面具有复数个分别形成于每两个突块11之间的半穿孔(halfthrough hole)12。Please refer to FIG. 4 to FIG. 6 , which are respectively the flow chart, the schematic diagram of the fabrication process, and the schematic cross-section of the first embodiment of the manufacturing method of the light-emitting diode chip packaging structure using ceramics as the substrate of the present invention. As can be seen from the flow chart in Fig. 4, the utility model provides a packaging structure of a light-emitting diode chip using ceramics as a substrate. There is a body 10, and a plurality of protrusions 11 (S100) which are separated from each other and extend from three sides of the body 10, wherein the side of the body 10 of the ceramic substrate 1 has a plurality of protrusions formed on every two sides of the body 10. 11 between half through holes 12 .

然后,分别成形复数个第一导电层2于该等突块11的表面(S102),其中该第一导电层2为银膏层(silver paste layer);接着,分别成形复数个硬度强化层3于该等第一导电层2上(S104),其中该硬度强化层为镍层(nickel layer);紧接着,分别成形复数个第二导电层4于该等硬度强化层3上(S106),其中该第二导电层4为金层(golden layer)或银层(silverlayer)。Then, form a plurality of first conductive layers 2 on the surfaces of the protrusions 11 (S102), wherein the first conductive layer 2 is a silver paste layer; then, form a plurality of hardness strengthening layers 3 respectively On the first conductive layers 2 (S104), wherein the hardness-enhancing layer is a nickel layer (nickel layer); then, forming a plurality of second conductive layers 4 on the hardness-enhancing layers 3 respectively (S106), Wherein the second conductive layer 4 is a gold layer or a silver layer.

接着,配合图5B及图6所示,固定一中空陶瓷壳体5于该陶瓷基板1的本体10的顶面上以形成一容置空间50,并且该容置空间50曝露出该等第二导电层4的顶面(S108),其中该陶瓷基板1的本体10与该中空陶瓷壳体5为两个相互配合的长方体,并且该中空陶瓷壳体5是利用陶瓷共烧技术(Low-Temperature Cofired Ceramics,LTCC),以固定于该陶瓷基板1的本体10的顶面上。Next, as shown in FIG. 5B and FIG. 6 , a hollow ceramic shell 5 is fixed on the top surface of the body 10 of the ceramic substrate 1 to form an accommodating space 50, and the accommodating space 50 exposes the second The top surface (S108) of the conductive layer 4, wherein the body 10 of the ceramic substrate 1 and the hollow ceramic shell 5 are two cuboids that cooperate with each other, and the hollow ceramic shell 5 is made by using ceramic co-firing technology (Low-Temperature Cofired Ceramics, LTCC), to be fixed on the top surface of the body 10 of the ceramic substrate 1.

接下来,配合图5C及图6所示,分别设置复数个发光二极管芯片6于该容置空间50内,并且每一个发光二极管芯片6的正、负电极端分别电性连接于不同的第二导电层4(S110),其中每一个发光二极管芯片6的正、负电极端可透过两个导线7,以分别电性连接于不同的第二导电层4;最后,填充一封装胶体8于该容置空间50内,以覆盖该等发光二极管芯片6(S112)。藉此,透过该容置空间50朝上的方式,让该等第二导电层4的底面接触于一电路板(图未示),以使得本实用新型的发光二极管芯片封装结构能以直立的方式向上投光(如图6的箭头所示)。Next, as shown in FIG. 5C and FIG. 6, a plurality of light emitting diode chips 6 are arranged in the accommodating space 50, and the positive and negative electrodes of each light emitting diode chip 6 are respectively electrically connected to different second conductive electrodes. Layer 4 (S110), wherein the positive and negative electrodes of each light emitting diode chip 6 can pass through two wires 7 to be electrically connected to different second conductive layers 4 respectively; finally, fill an encapsulant 8 in the container placed in the space 50 to cover the LED chips 6 (S112). In this way, the bottom surfaces of the second conductive layers 4 are in contact with a circuit board (not shown) through the accommodating space 50 facing upwards, so that the light emitting diode chip packaging structure of the present invention can be erected The way to cast light upwards (as shown by the arrow in Figure 6).

请参阅图7所示,为本实用新型第一实施例的发光二极管芯片的第一种设置方式的侧视示意图。由图中可知,该等第二导电层4分成复数个正极导电部40及负极导电部41,并且该发光二极管芯片6的正、负电极端60、61分别设置于每一个发光二极管芯片6的上表面;藉此,透过打线(wire-bounding)的方式,以使得每一个发光二极管芯片6的正、负电极端60、61分别透过两导线7而电性连接于相邻的正极导电部40及负极导电部41。Please refer to FIG. 7 , which is a schematic side view of the first arrangement of the light emitting diode chips according to the first embodiment of the present invention. It can be seen from the figure that the second conductive layers 4 are divided into a plurality of positive conductive parts 40 and negative conductive parts 41, and the positive and negative electrode terminals 60, 61 of the light emitting diode chip 6 are respectively arranged on the top of each light emitting diode chip 6. surface; thereby, through wire-bounding, the positive and negative electrode terminals 60, 61 of each LED chip 6 are electrically connected to the adjacent positive electrode conductive part through two wires 7 40 and the negative electrode conductive part 41.

请参阅图8所示,为本实用新型第一实施例的发光二极管芯片的第二种设置方式的侧视示意图。由图中可知,该等第二导电层4′分成复数个正极导电部40′及负极导电部41′,并且该发光二极管芯片6′的正、负电极端60′、61′分别设置于每一个发光二极管芯片6′的下表面与上表面;藉此,透过打线(wire-bounding)的方式,以使得每一个发光二极管芯片6′的正电极端60′直接电性连接于相对应的正极导电部40′,并且每一个发光二极管芯片6′的负电极端61′则透过一导线7′而电性连接于相对应的负极导电部41′。Please refer to FIG. 8 , which is a schematic side view of the second arrangement of the LED chips in the first embodiment of the present invention. It can be seen from the figure that the second conductive layers 4' are divided into a plurality of positive conductive parts 40' and negative conductive parts 41', and the positive and negative electrode terminals 60' and 61' of the LED chip 6' are respectively arranged on each The lower surface and the upper surface of the light-emitting diode chip 6'; thereby, through the wire-bounding method, the positive electrode terminal 60' of each light-emitting diode chip 6' is directly electrically connected to the corresponding The positive conductive part 40', and the negative electrode terminal 61' of each LED chip 6' is electrically connected to the corresponding negative conductive part 41' through a wire 7'.

请参阅图9所示,为本实用新型第一实施例的发光二极管芯片的第三种设置方式的侧视示意图。由图中可知,该等第二导电层4″分成复数个正极导电部40″及负极导电部41″,并且该发光二极管芯片6″的正、负电极端60″、61″分别设置于每一个发光二极管芯片6″的下表面;藉此,透过覆晶(flip-chip)的方式,以使得每一个发光二极管芯片6″的正、负电极端60″、61″分别透过复数个相对应的锡球7″而电性连接于相邻的正极导电部40″及负极导电部41″。Please refer to FIG. 9 , which is a schematic side view of a third arrangement of LED chips according to the first embodiment of the present invention. It can be seen from the figure that the second conductive layers 4" are divided into a plurality of positive conductive parts 40" and negative conductive parts 41", and the positive and negative electrode terminals 60", 61" of the LED chip 6" are respectively arranged on each The lower surface of the light-emitting diode chip 6 "; thereby, through the flip-chip (flip-chip) method, so that the positive and negative electrode terminals 60 ", 61 " of each light-emitting diode chip 6 " respectively pass through a plurality of corresponding The solder ball 7" is electrically connected to the adjacent positive conductive part 40" and negative conductive part 41".

请参阅图10所示,为本实用新型发光二极管芯片的第四种设置方式的侧视示意图。由图中可知,该发光二极管芯片9的正、负电极端90、91分别设置于每一个发光二极管芯片9的上表面,并且每一个发光二极管芯片9分别设置于每两个突块92之间;藉此,透过打线(wire-bounding)的方式,以使得每一个发光二极管芯片9的正、负电极端90、91分别透过两导线93而电性连接于相邻的正极导电部94及负极导电部95。Please refer to FIG. 10 , which is a schematic side view of the fourth arrangement mode of the LED chip of the present invention. It can be seen from the figure that the positive and negative electrode terminals 90 and 91 of the light emitting diode chip 9 are respectively arranged on the upper surface of each light emitting diode chip 9, and each light emitting diode chip 9 is respectively arranged between every two protrusions 92; In this way, through wire-bounding, the positive and negative electrode terminals 90, 91 of each LED chip 9 are electrically connected to the adjacent positive electrode conductive portion 94 and the adjacent positive electrode conductive portion 94 through two wires 93 respectively. Negative electrode conductive part 95 .

请参阅图11及图12所示,其分别为本实用新型以陶瓷为基板的发光二极管芯片封装结构的制作方法的第二实施例的流程图及侧视剖面图。由图中可知,第二实施例的S200与S202及S206至S210分别与第一实施例的S100至S102与S108至S112相同。而第二实施例与第一实施例最大的不同在于:在该步骤S202之后,分别成形复数个第二导电层3′于该等第一导电层2上,其中每一个第二导电层3′为一硬度强化导电层(consolidated layer)(S204)。Please refer to FIG. 11 and FIG. 12 , which are respectively a flow chart and a side cross-sectional view of a second embodiment of the manufacturing method of the ceramic-based light-emitting diode chip packaging structure of the present invention. It can be seen from the figure that S200 and S202 and S206 to S210 of the second embodiment are respectively the same as S100 to S102 and S108 to S112 of the first embodiment. The biggest difference between the second embodiment and the first embodiment is that after the step S202, a plurality of second conductive layers 3' are respectively formed on the first conductive layers 2, wherein each second conductive layer 3' It is a hardness enhanced conductive layer (consolidated layer) (S204).

请参阅图13所示,为本实用新型第一实施例的以陶瓷为基板的发光二极管芯片封装结构于侧式状态的立体示意图。由图中可知,透过该容置空间50朝向侧面的方式,让该等第二导电层4的侧面接触于一电路板(图未示),以使得本实用新型的发光二极管芯片封装结构能以侧立的方式向侧面投光。Please refer to FIG. 13 , which is a three-dimensional schematic diagram of a LED chip packaging structure with a ceramic substrate in a side state according to the first embodiment of the present invention. It can be seen from the figure that through the way that the accommodating space 50 faces sideways, the side surfaces of the second conductive layers 4 are in contact with a circuit board (not shown), so that the light emitting diode chip packaging structure of the present invention can Cast light sideways in a sideways manner.

综上所述,本实用新型的优点在于:可藉由任何成形的方式,将导电层成形于陶瓷基板上,再透过陶瓷共烧技术(Low-Temperature CofiredCeramics,LTCC)将中空陶瓷壳体固定于该陶瓷基板上,因此本实用新型不像习知一样需要使用导电架并且还要经过弯折才能与电路板产生电性连接。To sum up, the utility model has the advantage that the conductive layer can be formed on the ceramic substrate by any forming method, and then the hollow ceramic shell can be fixed by the Low-Temperature Cofired Ceramics (LTCC) technology. On the ceramic substrate, the utility model does not need to use a conductive frame as in the prior art and needs to be bent to be electrically connected to the circuit board.

但,以上所述,仅为本实用新型最佳的具体实施例的详细说明与图式,而本实用新型的特征并不局限于此,并非用以限制本实用新型,本实用新型的所有范围应以申请专利范围为准,凡合于本实用新型申请专利范围的精神与其类似变化的实施例,皆应包含于本实用新型的范畴中,任何熟悉该项技艺者在本实用新型的领域内,可轻易思及的变化或修饰皆可涵盖在本实用新型的专利范围。However, the above descriptions are only the detailed description and drawings of the best specific embodiments of the present utility model, and the features of the present utility model are not limited thereto, and are not intended to limit the utility model and the entire scope of the utility model Should be based on the scope of the patent application, all the embodiments that conform to the spirit of the scope of the patent application of the present utility model and its similar changes, all should be included in the category of the present utility model, any person who is familiar with this skill is in the field of the present utility model , all changes or modifications that can be easily thought of can be covered by the patent scope of the present utility model.

Claims (18)

1. one kind is the LED encapsulation construction of substrate with the pottery, it is characterized in that, comprising:
One ceramic substrate, it has a body, reaches a plurality of projections that are separated from each other and extend from this body respectively;
One conductive unit, it has a plurality of being formed separately in the conductive layer on these projection surfaces;
One hollow ceramic housing, it is fixed on the end face of body of this ceramic substrate forming an accommodation space, and this accommodation space exposes the end face of these conductive layers;
A plurality of light-emitting diode chip for backlight unit, it is arranged at respectively in this accommodation space, and the positive and negative electrode end of each light-emitting diode chip for backlight unit is electrically connected at different conductive layers respectively; And
One packing colloid, it is filled in this accommodation space, to cover these light-emitting diode chip for backlight unit.
2. as claimed in claim 1 is the LED encapsulation construction of substrate with the pottery, it is characterized in that: the side of the body of this ceramic substrate has a plurality of chadlesses that are formed at respectively between per two projections.
3. as claimed in claim 1 is the LED encapsulation construction of substrate with the pottery, it is characterized in that: this body and this hollow ceramic housing are two cuboids that cooperatively interact.
4. as claimed in claim 1 is the LED encapsulation construction of substrate with the pottery, and it is characterized in that: this conductive unit further comprises:
One first conductive unit, it has a plurality of first conductive layers that are formed separately in these projection surfaces;
One hardness is strengthened the unit, and it has a plurality of hardness strengthening layers that are formed separately on these first conductive layers; And
One second conductive unit, it has a plurality of second conductive layers that are formed separately on these hardness strengthening layers;
By this, these first conductive layers, these hardness strengthening layers and these second conductive layers are combined into this conductive layer in regular turn.
5. as claimed in claim 4 is the LED encapsulation construction of substrate with the pottery, it is characterized in that: this first conductive layer is a silver paste layer.
6. as claimed in claim 4 is the LED encapsulation construction of substrate with the pottery, it is characterized in that: this hardness strengthening layer is a nickel dam.
7. as claimed in claim 4 is the LED encapsulation construction of substrate with the pottery, it is characterized in that: this second conductive layer is gold layer or silver layer.
8. as claimed in claim 1 is the LED encapsulation construction of substrate with the pottery, and it is characterized in that: this conductive unit further comprises:
One first conductive unit, it has a plurality of first conductive layers that are formed separately in these projection surfaces; And
One second conductive unit, it has a plurality of second conductive layers that are formed separately on these first conductive layers, and wherein each second conductive layer is a hardness reinforced conductive layer;
By this, these first conductive layers and these second conductive layer combination become this conductive layer.
9. as claimed in claim 8 is the LED encapsulation construction of substrate with the pottery, it is characterized in that: this first conductive layer is a silver paste layer.
10. as claimed in claim 8 is the LED encapsulation construction of substrate with the pottery, it is characterized in that: this second conductive layer is gold layer or silver layer.
11. as claimed in claim 1 is the LED encapsulation construction of substrate with the pottery, it is characterized in that: this accommodation space is the mode with up, so that the bottom surface of these conductive layers is contacted with a circuit board.
12. as claimed in claim 1 is the LED encapsulation construction of substrate with the pottery, it is characterized in that: this accommodation space is in the mode towards the side, so that the contacts side surfaces of these conductive layers is in a circuit board.
13. as claimed in claim 1 is the LED encapsulation construction of substrate with the pottery, it is characterized in that: these conductive layers are divided into a plurality of anodal conductive parts and negative pole conductive part.
14. as claimed in claim 13 is the LED encapsulation construction of substrate with the pottery, it is characterized in that: the positive and negative electrode end of this light-emitting diode chip for backlight unit is arranged at the upper surface of each light-emitting diode chip for backlight unit respectively; By this, see through the mode of routing, so that the positive and negative electrode end of each light-emitting diode chip for backlight unit sees through two leads respectively and is electrically connected at adjacent anodal conductive part and negative pole conductive part.
15. as claimed in claim 13 is the LED encapsulation construction of substrate with the pottery, it is characterized in that: the positive and negative electrode end of this light-emitting diode chip for backlight unit is arranged at the lower surface and the upper surface of each light-emitting diode chip for backlight unit respectively; By this, see through the mode of routing, so that the positive electricity end of each light-emitting diode chip for backlight unit directly is electrically connected at corresponding anodal conductive part, and the negative electricity of each light-emitting diode chip for backlight unit extremely then sees through a lead and is electrically connected at corresponding negative pole conductive part.
16. as claimed in claim 13 is the LED encapsulation construction of substrate with the pottery, it is characterized in that: the positive and negative electrode end of this light-emitting diode chip for backlight unit is arranged at the lower surface of each light-emitting diode chip for backlight unit respectively; By this, see through and cover brilliant mode, so that the positive and negative electrode end of each light-emitting diode chip for backlight unit sees through a plurality of corresponding tin balls respectively and is electrically connected at adjacent anodal conductive part and negative pole conductive part.
17. as claimed in claim 13 is the LED encapsulation construction of substrate with the pottery, it is characterized in that: the positive and negative electrode end of this light-emitting diode chip for backlight unit is arranged at the upper surface of each light-emitting diode chip for backlight unit respectively, and each light-emitting diode chip for backlight unit is arranged at respectively between per two projections; By this, see through the mode of routing, so that the positive and negative electrode end of each light-emitting diode chip for backlight unit sees through two leads respectively and is electrically connected at adjacent anodal conductive part and negative pole conductive part.
18. as claimed in claim 1 is the LED encapsulation construction of substrate with the pottery, it is characterized in that: each projection is that wherein three faces from this body extend.
CN 200720176769 2007-10-18 2007-10-18 Light-emitting diode chip packaging structure with ceramic as substrate Expired - Lifetime CN201087904Y (en)

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Application Number Priority Date Filing Date Title
CN 200720176769 CN201087904Y (en) 2007-10-18 2007-10-18 Light-emitting diode chip packaging structure with ceramic as substrate

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