CN209015145U - A kind of information output apparatus - Google Patents
A kind of information output apparatus Download PDFInfo
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- CN209015145U CN209015145U CN201822071791.3U CN201822071791U CN209015145U CN 209015145 U CN209015145 U CN 209015145U CN 201822071791 U CN201822071791 U CN 201822071791U CN 209015145 U CN209015145 U CN 209015145U
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Abstract
The utility model embodiment provides a kind of information output apparatus, comprising: controller and the first programmable logic device；The interface of controller is electrically connected with the switch value input interface of the first programmable logic device；For the input interface of first programmable logic device for being electrically connected with the interface of electronic device, the first programmable logic device is used to obtain the status information of electronic device and the status information acquired by the output of the output interface of the first programmable logic device；Controller is used to determine the electronic device of the first programmable logic device status information to be obtained.The output of electronic device status information may be implemented using information output apparatus provided by the embodiment of the utility model.
Description
Technical Field
The utility model relates to the field of communication technology, especially, relate to an information output device.
Background
With the continuous progress of electronic technology, the types of components mounted on the circuit board are more and more complicated, the number of the components is more and more, and the difficulty of troubleshooting the circuit board is improved while the functions and the performance of the circuit board are improved. Particularly, after some electronic devices are mounted on the circuit board, interfaces of the electronic devices are occupied, so that when troubleshooting is performed, the fault detection device cannot be electrically connected with the electronic devices through the interfaces, and further equipment maintenance personnel cannot acquire state information of the electronic devices, so that fault reasons are difficult to locate.
In the prior art, when a circuit board containing the electronic device has a problem, equipment maintenance personnel can simulate and reproduce the problem, so that fault location is realized. However, the process of simulating the reproduction problem is complicated, and consumes a lot of time by the maintenance personnel of the equipment, thereby causing an increase in maintenance cost.
SUMMERY OF THE UTILITY MODEL
An object of the embodiment of the utility model is to provide an information output device to realize the output of electron device state information. The specific technical scheme is as follows:
an embodiment of the utility model provides an information output device, include: a controller and a first programmable logic device; wherein,
an interface of the controller is electrically connected with a switching value input interface of the first programmable logic device;
the input interface of the first programmable logic device is used for being electrically connected with an interface of an electronic device, and the first programmable logic device is used for acquiring state information of the electronic device and outputting the acquired state information through the output interface of the first programmable logic device; the controller is used for determining the electronic device of the first programmable logic device to acquire the state information.
The utility model discloses an among the implementation, the input interface and the output interface of first programmable logic device are the serial ports.
The utility model discloses an among the implementation, the device still includes: a second programmable logic device;
the switching value input interface of the second programmable logic device is electrically connected with the interface of the controller, the input interface of the second programmable logic device is electrically connected with the output interface of the first programmable logic device, and the output interface of the second programmable logic device is used for outputting the received state information;
the controller is also used for determining the first programmable logic device from which the state information to be output by the second programmable logic device comes.
The utility model discloses an among the implementation, the controller specifically through parallel interface respectively with first programmable logic device the switching value input interface electricity of second programmable logic device is connected.
The utility model discloses an among the implementation, the input interface of first programmable logic device the output interface of first programmable logic device the input interface of second programmable logic device with the output interface of second programmable logic device is the serial ports.
In one implementation of the present invention, the first number of input interfaces of the first programmable logic device is electrically connected to the interfaces of the first number of electronic devices;
the controller is electrically connected with the switching value input interface of the first programmable logic device through a parallel interface with a second number of digits, wherein the first number is not more than 2 to the power of the second number.
In an implementation manner of the present invention, an interface of the controller is electrically connected to a third number of switching value input interfaces of the first programmable logic devices;
the third number of input interfaces of the second programmable logic device are respectively electrically connected with the third number of output interfaces of the first programmable logic device;
the controller is electrically connected with the switching value input interface of the second programmable logic device through a parallel interface with a fourth number of digits, wherein the third number is not more than 2 to the fourth power of the number.
In one implementation of the present invention, the output interface of the controller is electrically connected to the input interface of the second programmable logic device that is not electrically connected to the first programmable logic device;
the output interface of the second programmable logic device is specifically configured to output the state information of the electronic device or the output information of the controller.
The utility model discloses an among the implementation, first programmable logic device with second programmable logic device is CPLD.
In an implementation of the present invention, the controller is a CPU.
The embodiment of the utility model provides an information output device because the input interface of first programmable logic device can be connected with electronic device's interface electricity, consequently, under the control of the control signal of controller output, first programmable logic device can obtain above-mentioned electronic device's state information to output above-mentioned state information through the output interface of first programmable logic device. Therefore, use the utility model provides an information output device can realize the output of electron device state information.
On the basis, when troubleshooting is carried out, equipment maintenance personnel can conveniently acquire the state information of the electronic device without simulating and reproducing faults, so that the maintenance cost can be saved. Of course, it is not necessary for any product or method of the invention to achieve all of the above-described advantages at the same time.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
Fig. 1 is a schematic structural diagram of an information output apparatus according to an embodiment of the present invention;
fig. 2 is another schematic structural diagram of an information output apparatus according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of an information output apparatus according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.
An embodiment of the utility model provides an information output device, as shown in fig. 1, the device includes:
a controller 101 and a first programmable logic device 102.
Wherein, the interface of the controller 101 is electrically connected with the switching value input interface of the first programmable logic device 102. The input interface of the first programmable logic device 102 is used for electrically connecting with an interface of an electronic device, and the first programmable logic device 102 is used for acquiring state information of the electronic device and outputting the acquired state information through the output interface of the first programmable logic device. The controller is used to determine the electronic device for which the first programmable logic device 102 is to acquire status information.
In the embodiment of the present invention, the controller 101 may be a CPU, a single chip microcomputer or other components with similar functions. The controller 101 may be used only for the information output device, or may be shared by different circuits on the same circuit board. Wherein, above-mentioned same circuit board is the utility model discloses the circuit board that the device place provided by the embodiment. The first Programmable Logic Device 102 may be a Logic Device such as a CPLD (Complex Programmable Logic Device), a PLD (Programmable Logic Device), or an FPGA (Field Programmable gate array).
The digital control information that the first programmable logic device 102 receives through the switching value input interface may be output by the controller 101. The switching value refers to a discontinuous signal and has two states of 1 and 0. The switching value input interface is an interface for inputting discontinuous signals of 1 state and 0 state. The communication between the interface of the controller and the switching value Input interface of the first programmable logic device may be performed by parallel transmission, or may be performed by an I2C (Inter-integrated circuit) bus, GPIO (General Purpose Input/Output port), or the like. The input interface and the output interface of the first programmable logic device 102 may be serial ports.
The embodiment of the utility model provides an information output device, because the input interface of first programmable logic device 102 can be connected with electronic device's interface electricity, consequently, under the control of the control signal of controller 101 output, first programmable logic device 102 can obtain above-mentioned electronic device's state information to output above-mentioned state information through the output interface of first programmable logic device 102. Therefore, use the utility model provides an information output device can realize the output of electron device state information.
On the basis, when troubleshooting is carried out, equipment maintenance personnel can conveniently acquire the state information of the electronic device without simulating and reproducing faults, so that the maintenance cost can be saved.
The embodiment of the utility model provides an information output device's another kind of schematic structure that still provides, as shown in FIG. 2: the device includes: a controller 201, a first programmable logic device 202, and a second programmable logic device 203.
The interface of the controller 201 is electrically connected with the switching value input interfaces of the first programmable logic device 202 and the second programmable logic device 203. The input interface of the first programmable logic device 202 is used to electrically connect with the interface of the electronic device, and the output interface of the first programmable logic device 202 is electrically connected with the input interface of the second programmable logic device 203.
The first programmable logic device 202 is configured to obtain status information of the electronic device and send the obtained status information to the second programmable logic device 203. The output interface of the second programmable logic device 203 is used to output the received status information. The controller is used to determine the electronic device from which the first programmable logic device 202 is to acquire state information and to determine the first programmable logic device 202 from which the second programmable logic device 203 is to output state information.
In the embodiment of the present invention, the interface of the controller 201 is electrically connected to the switching value input interface of the first programmable logic device 202 and the second programmable logic device 203. The second programmable logic device 203 may be a logic device such as a CPLD, PLD, or FPGA.
The communication between the interface of the controller and the switching value Input interface of the second programmable logic device may be performed by parallel transmission, or may be performed by an I2C (Inter-Integrated Circuit, two-wire serial) bus, GPIO (General Purpose Input/Output port), or the like.
The controller 201 is configured to determine an electronic device of the first programmable logic device 202, which is to acquire state information, by sending control information to a switching value input interface of the first programmable logic device 202; the controller 201 determines the first programmable logic device 202 from which the state information to be output by the second programmable logic device 203 comes by sending control information to the switching value input interface of the second programmable logic device 203.
In one implementation, the first programmable logic device 202 may obtain status information of a plurality of electronic devices, and select the status information of the corresponding electronic device to output according to the obtained information of selecting the electronic device sent by the controller 201.
In one implementation, the apparatus may include a plurality of first programmable logic devices 202, and the second programmable logic device 203 may acquire state information output by the plurality of first programmable logic devices 202, and select corresponding output information of the first programmable logic device 202 to output according to the acquired information for selecting the first programmable logic device 202 sent by the controller 201.
In the embodiment of the present invention, the input interface of the first programmable logic device 202 is electrically connected to the interface of the electronic device, and the output interface of the first programmable logic device 202 is electrically connected to the input interface of the second programmable logic device 203.
The first programmable logic device 202 may acquire the state information output by the electronic device through the input interface, and send the acquired state information to the second programmable logic device 203 through the output interface; the second programmable logic device 203 may output the received state information through an output interface. In one implementation, the electronic device may be a GPU.
The utility model discloses an among the implementation, controller 201 specifically is connected with the switching value input interface electricity of first programmable logic device 202, second programmable logic device 203 respectively through parallel interface.
The parallel interface is: an interface for transmitting data by adopting a parallel transmission mode. The width of the data channel, which is transmitted in parallel, is the number of bits of the parallel interface. The parallel interface in this implementation may be 4 bits, 8 bits, 16 bits, etc.
The utility model discloses an in another kind of implementation, the input interface of first programmable logic device 202, the output interface of first programmable logic device 202, the input interface of second programmable logic device 203, the output interface of second programmable logic device 203 are the serial ports.
The utility model discloses an among the implementation, a first quantity of input interface of first programmable logic device 202 is used for being connected with a first quantity of electronic device's interface electricity to, controller 201 specifically is connected with a switching value input interface of first programmable logic device 202 through the parallel interface of second quantity number of bits, and wherein, first quantity is not more than 2 second quantity power.
The controller 201 may output the state information of the electronic device indicated by the parallel control signal by sending the parallel control signal for selecting the electronic device to the switching value input interface of the first programmable logic device 202, where the parallel control signal is used to indicate which electronic device of the first number of electronic devices connected to the first programmable logic device 202 is to be output.
Fig. 3 is a schematic structural diagram of an information output device according to an embodiment of the present invention, as shown in fig. 3: the controller is a CPU, the first programmable logic devices are CPLD 1-CPLD 8, the second programmable logic devices are CPLD0, and the electronic devices are GPU 1-1-GPU 8-16. In fig. 3, the first number is 16, and since the first number is not greater than 2 to the power of the second number, the second number is not less than 4. In fig. 3, the CPU can be electrically connected to the switching value input interfaces of CPLDs 1 to 8 via a 4-bit parallel interface. If "1" represents a high level and "0" represents a low level, it is possible to set: when the 4-bit parallel interface outputs '0000', the CPLD1 outputs the state information of the GPU1-1, the CPLD2 outputs the state information of the GPU2-1, and in the same way, the CPLD8 outputs the state information of the GPU 8-1; when the 4-bit parallel interface outputs '0001', the CPLD1 outputs the state information of the GPU1-2, the CPLD2 outputs the state information of the GPU2-2, and in the same way, the CPLD8 outputs the state information of the GPU 8-2; in analogy, when the 4-bit parallel interface outputs '1111', the CPLD1 outputs the state information of the GPUs 1-16, the CPLD2 outputs the state information of the GPUs 2-16, and in analogy, the CPLD8 outputs the state information of the GPUs 8-16.
The utility model discloses an among the implementation, the interface of controller 201 is connected with the switching value input interface electricity of the first programmable logic device 202 of third quantity, the third quantity input interface of second programmable logic device 203 is connected with the output interface electricity of the first programmable logic device 202 of third quantity respectively, and controller 201 is connected with the switching value input interface electricity of second programmable logic device 203 through the parallel interface of fourth quantity digit, wherein, the third quantity is not more than 2 fourth quantity power.
The controller 201 may send a parallel control signal for selecting the first programmable logic device 202 to the switching value input interface of the second programmable logic device 203, where the parallel control signal is used to instruct which of the third number of first programmable logic devices 202 is electrically connected to which electronic device state information of the electronic devices is output, so that the second programmable logic device 203 outputs the state information indicated by the parallel control signal and sent by the first programmable logic device 202.
For example, as shown in FIG. 3: the third number is 8, and since the third number is not greater than 2 to the fourth power of the number, the fourth number is not less than 3. In fig. 3, the CPU may be electrically connected to the switching value input interface of CPLD0 via a 3-bit parallel interface, or may be electrically connected to the switching value input interface of CPLD0 via a 4-bit parallel interface. If "1" represents a high level and "0" represents a low level, it is possible to set: when the 4-bit parallel interface outputs "0001", the CPLD0 outputs the output state information of the CPLD 1; when the 4-bit parallel interface outputs "0010", CPLD0 outputs the output state information of CPLD 2; by analogy, when the 4-bit parallel interface outputs "1001", CPLD0 outputs the output state information of CPLD 8.
In this embodiment, the interfaces of the controller 201 are electrically connected to the third number of first programmable logic devices 202, and the connection manner may be that the interface of one controller 201 is electrically connected to the third number of first programmable logic devices 202 at the same time, as in this case shown in fig. 3; the connection mode may also be that the third number of interfaces of the controller 201 are electrically connected to the third number of first programmable logic devices 202, respectively.
The utility model discloses an among the implementation, controller 201's output interface and second programmable logic device 203, not be connected with the input interface electricity that first programmable logic device 202 is connected, second programmable logic device 203's output interface specifically is used for exporting electronic device's state information or controller 201's output information.
In this implementation, the output interface of the second programmable logic device 203 can not only output the state information of the electronic device, but also output the output information of the controller 201. The controller 201 may control the output interface of the second programmable logic device 203 for outputting the output information of the controller 201 by sending control information to the switching value input interface of the second programmable logic device 203. This makes the output interface of the second programmable logic device 203 not only available for troubleshooting, but also not idle in normal operation, but used for outputting the output information of the controller 201.
As shown in fig. 3, there are two connection relationships between the CPU and the CPLD0, the connection relationship represented by the thick line is the connection relationship of the CPU outputting the control signal to the CPLD0, and the connection relationship represented by the thin line is the connection relationship between the output interface of the CPU and the input interface of the CPLD 0. In one implementation, the controller is electrically connected to the switching value input interface of the second programmable logic device via a parallel interface of a fourth number of bits. If "1" represents a high level, "0" represents a low level, and the fourth number is 4, it can be set that: when the 4-bit parallel interface outputs "0000", the CPLD0 outputs the output information output by the CPU.
It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
All the embodiments in the present specification are described in a related manner, and the same and similar parts among the embodiments may be referred to each other, and each embodiment focuses on the differences from the other embodiments.
The above description is only a preferred embodiment of the present invention, and is not intended to limit the scope of the present invention. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention shall fall within the protection scope of the present invention.
Claims (10)
1. An information output apparatus, characterized by comprising: a controller and a first programmable logic device; wherein,
an interface of the controller is electrically connected with a switching value input interface of the first programmable logic device;
the input interface of the first programmable logic device is used for being electrically connected with an interface of an electronic device, and the first programmable logic device is used for acquiring state information of the electronic device and outputting the acquired state information through the output interface of the first programmable logic device; the controller is used for determining the electronic device of the first programmable logic device to acquire the state information.
2. The apparatus of claim 1,
the input interface and the output interface of the first programmable logic device are serial ports.
3. The apparatus of claim 1, further comprising: a second programmable logic device;
the switching value input interface of the second programmable logic device is electrically connected with the interface of the controller, the input interface of the second programmable logic device is electrically connected with the output interface of the first programmable logic device, and the output interface of the second programmable logic device is used for outputting the received state information;
the controller is also used for determining the first programmable logic device from which the state information to be output by the second programmable logic device comes.
4. The apparatus of claim 3,
the controller is electrically connected with the switching value input interfaces of the first programmable logic device and the second programmable logic device respectively through parallel interfaces.
5. The apparatus of claim 3,
the input interface of the first programmable logic device, the output interface of the first programmable logic device, the input interface of the second programmable logic device and the output interface of the second programmable logic device are serial ports.
6. The apparatus of claim 3,
the first number of input interfaces of the first programmable logic device are used for being electrically connected with the interfaces of the first number of electronic devices;
the controller is electrically connected with the switching value input interface of the first programmable logic device through a parallel interface with a second number of digits, wherein the first number is not more than 2 to the power of the second number.
7. The apparatus of claim 3,
the interface of the controller is electrically connected with the switching value input interfaces of a third number of the first programmable logic devices;
the third number of input interfaces of the second programmable logic device are respectively electrically connected with the third number of output interfaces of the first programmable logic device;
the controller is electrically connected with the switching value input interface of the second programmable logic device through a parallel interface with a fourth number of digits, wherein the third number is not more than 2 to the fourth power of the number.
8. The apparatus of claim 3,
the output interface of the controller is electrically connected with the input interface of the second programmable logic device which is not electrically connected with the first programmable logic device;
the output interface of the second programmable logic device is specifically configured to output the state information of the electronic device or the output information of the controller.
9. The apparatus according to any one of claims 3-8,
the first programmable logic device and the second programmable logic device are both CPLDs.
10. The apparatus of any one of claims 1-8,
the controller is a CPU.
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| CN201822071791.3U CN209015145U (en) | 2018-12-11 | 2018-12-11 | A kind of information output apparatus |
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| CN201822071791.3U CN209015145U (en) | 2018-12-11 | 2018-12-11 | A kind of information output apparatus |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113791825A (en) * | 2021-08-12 | 2021-12-14 | 深圳市阿达视高新技术有限公司 | Component identification method, system, equipment and storage medium |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113791825A (en) * | 2021-08-12 | 2021-12-14 | 深圳市阿达视高新技术有限公司 | Component identification method, system, equipment and storage medium |
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