CN1652462B - Television tuner and method for processing a received radio frequency signal - Google Patents
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Abstract
Description
技术领域technical field
本发明有关于电视调谐器,特别指一种具有一单一锁相回路的电视调谐器。The present invention relates to a TV tuner, in particular to a TV tuner with a single phase-locked loop.
背景技术Background technique
在电视系统当中,调谐器(tuner)的成本通常在整体成本中占有不小的比重,而随着将电视的功能综合到个人计算机系统(或是其他的电子装置)中的需求慢慢增加,对调谐器成本降低的考虑愈显重要。事实上,电视调谐器可以是先制造于电路版上,然后才被装设在个人计算机系统当中,故个人计算机亦可以具备电视的功能。这种的调谐器可以将一射频电视信号转变成一基频(或低频)视频信号,然后再将基频(或低频)视频信号传送至个人计算机内的其他元件,以进行后续的视频处理工作。In a TV system, the cost of the tuner (tuner) usually occupies a large proportion in the overall cost, and as the demand for integrating the functions of the TV into the personal computer system (or other electronic devices) gradually increases, The consideration of reducing the cost of the tuner becomes more and more important. In fact, the TV tuner can be manufactured on the circuit board first, and then installed in the personal computer system, so the personal computer can also have the function of the TV. Such a tuner can convert an RF TV signal into a base frequency (or low frequency) video signal, and then transmit the base frequency (or low frequency) video signal to other components in the personal computer for subsequent video processing.
图1为公知技术的电视调谐器100的示意图(美国专利第5,737,035号)。图1中的调谐器100包含有一芯片化电路(on-chip circuit)102以及一位于芯片外的(off-chip)带通滤波器104。芯片化电路102包含有一低噪声放大器(LNA)106,一第一混频器108,一第二混频器110,一第二中频放大器112,多个第一压控振荡器114,一第一锁相回路116,一第二压控振荡器118,以及一第二锁相回路120。FIG. 1 is a schematic diagram of a conventional TV tuner 100 (US Patent No. 5,737,035). The
由于使用了芯片外的带通滤波器104、特殊用途的镜像排斥型混频器(作为第二混频器110),以及多个锁相回路来控制每一个振荡信号的频率,上述公知技术的作法会增加电视调谐器100的整体成本以及系统复杂度。Due to the use of an off-chip band-
发明内容Contents of the invention
故本发明的一个目的在于提供一种具有一单一的锁相回路的电视调谐器。It is therefore an object of the present invention to provide a television tuner having a single phase locked loop.
本发明公开了一种电视调谐器,包括有:一锁相回路,包含有用来产生第一振荡信号的一第一压控振荡器,和用来产生第二振荡信号的一第二压控振荡器;一第一混频器,与该锁相回路相耦接,用来将一选定射频信号与该第一振荡信号混频以产生一中频信号;一第二混频器,与该锁相回路相耦接,用来将该中频信号与该第二振荡信号混频以产生一输出信号。The invention discloses a TV tuner, comprising: a phase-locked loop, including a first voltage-controlled oscillator used to generate a first oscillating signal, and a second voltage-controlled oscillator used to generate a second oscillating signal device; a first mixer, coupled with the phase-locked loop, used to mix a selected radio frequency signal with the first oscillating signal to generate an intermediate frequency signal; a second mixer, and the lock The phase loop is coupled to mix the intermediate frequency signal with the second oscillating signal to generate an output signal.
至于本发明所公开的一种用来处理一接收射频信号的方法则包含有:依据一选定射频信号,使用一锁相回路中一单一的第一压控振荡器产生一第一振荡信号,使用该锁相回路中一单一的第二压控振荡器产生一第二振荡信号;将该选定射频信号与该第一振荡信号混频以产生一中频信号;以及将该中频信号与该第二振荡信号混频以产生一输出信号。As for a method for processing a received radio frequency signal disclosed in the present invention, it includes: using a single first voltage-controlled oscillator in a phase-locked loop to generate a first oscillating signal according to a selected radio frequency signal, Using a single second voltage-controlled oscillator in the phase-locked loop to generate a second oscillating signal; mixing the selected radio frequency signal with the first oscillating signal to generate an intermediate frequency signal; and combining the intermediate frequency signal with the first oscillating signal The two oscillating signals are mixed to generate an output signal.
附图说明Description of drawings
图1为公知技术一高度整合的电视调谐器的示意图。FIG. 1 is a schematic diagram of a highly integrated TV tuner in the prior art.
图2为本发明的调谐器的一实施例示意图。FIG. 2 is a schematic diagram of an embodiment of the tuner of the present invention.
图3为本发明的调谐器的另一实施例示意图。Fig. 3 is a schematic diagram of another embodiment of the tuner of the present invention.
图4为本发明用来处理一接收射频信号的方法流程图。FIG. 4 is a flowchart of a method for processing a received radio frequency signal according to the present invention.
主要元件符号说明Description of main component symbols
100、200、300 调谐器100, 200, 300 tuner
102 芯片化电路102 Chip Circuit
104 带通滤波器104 Bandpass filter
106、202 低噪声放大器106, 202 Low noise amplifier
108、110、204、230 混频器108, 110, 204, 230 mixers
112 中频放大器112 Intermediate frequency amplifier
114、118、224、226 压控振荡器114, 118, 224, 226 Voltage Controlled Oscillator
116、120、218 锁相回路116, 120, 218 phase-locked loop
206、212 混频器206, 212 mixer
208、214、232 低通滤波器208, 214, 232 low pass filter
210、216 增益放大器210, 216 gain amplifier
220 相位频率检测器220 Phase Frequency Detector
222 回路滤波器222 loop filter
228、304 90度相位延迟单元228, 304 90 degree phase delay unit
234 分频器(除法器)234 Frequency divider (divider)
302、306、310 谐波混频器302, 306, 310 Harmonic mixer
308 45度相位延迟单元308 45 degree phase delay unit
具体实施方式Detailed ways
请参阅图2,图2为本发明的电视调谐器的一实施例示意图。本实施例中的电视调谐器200包含有:一可变增益低噪声放大器(LNA)202,一第一混频器204,一同相混频器(in-phase mixer)206,一同相低通滤波器208,一同相可编程增益放大器(PGA)210,一正交混频器212,一正交低通滤波器214,一正交可编程增益放大器216,以及一单一的锁相回路(PLL)218。锁相回路218包含有一相位频率检测器(PFD)220,一回路滤波器222,一第一压控振荡器224,一第二压控振荡器226,一90度相位延迟单元228,一第四混频器230,一低通滤波器232,以及一用来除以M的反馈分频器234。Please refer to FIG. 2 , which is a schematic diagram of an embodiment of the TV tuner of the present invention. The
可变增益低噪声放大器202可对一接收射频信号RF_in进行放大,第一混频器204则将放大后的射频信号与一第一振荡信号LO1混频以产生一中频信号IF(以频率而言,IF=LO1-RF)。同相混频器206则将IF信号与一第二振荡信号LO2混频以产生一同相输出信号207。接下来,由同相低通滤波器208负责对同相输出信号207进行滤波,抑制频道外的干扰噪声,再由同相可编程增益放大器210放大同相低通滤波器208所输出的信号以产生一同相基频信号I。相似的,正交混频器212将IF信号与一信号LO2_90°(第二振荡器信号LO2经过90度相位延迟的结果)混频以产生一正交输出信号213。接下来,由正交低通滤波器214负责对正交输出信号213进行滤波,再由正交可编程增益放大器216放大正交低通滤波器214所输出的信号以产生一正交基频信号Q。The variable gain
在图2的实施例中,锁相回路218用来产生第一振荡信号LO1,第二振荡信号LO2,以及信号LO2_90°。相位频率检测器220则比较一参考信号FREF与一反馈信号FFB的相位,以产生一相对应的误差信号221。误差信号221的脉波宽度(pulse width)可以用来表示参考信号FREF与反馈信号FFB之间相位差异的大小。依据误差信号221所表示出的参考信号FREF与反馈信号FFB之间的快慢关系,回路滤波器222中的电容会被充电或是放电。就其本质而论,回路滤波器222类似积分器一般进行工作,而累积相对应于误差信号221的一净电荷(net charge)。由回路滤波器所产生的回路滤波器电压VTUNE则会被用于第一压控振荡器224以及第二压控振荡器226上。第一压控振荡器224与第二压控振荡器226分别可产生第一与第二振荡信号LO1、LO2。而为了要能同时产生同相以及正交输出信号,90度相位延迟单元228则可以延迟信号LO2的相位以产生信号LO2_90°。此处需注意的是,在实施上,除了图2所示的作法以外,90度相位延迟单元亦可以设置于PLL电路228的外部。In the embodiment of FIG. 2 , the phase-locked
以下的方程式1用来显示两个振荡信号LO1、LO2以及于RF信号中的选定通道之间的关系。于方程式1中,RF代表在接收信号中选定通道的频率,LO1为第一振荡信号的频率,至于LO2则为第二振荡信号的频率。Equation 1 below is used to show the relationship between the two oscillating signals LO1, LO2 and the selected channel in the RF signal. In Equation 1, RF represents the frequency of the selected channel in the received signal, LO1 is the frequency of the first oscillating signal, and LO2 is the frequency of the second oscillating signal.
RF=LO1-LO2(方程式1)RF = LO1 - LO2 (Equation 1)
而第一压控振荡器224与第二压控振荡器226对于回路滤波器电压VTUNE的变化会具有相反的反应状况,举例来说,若回路滤波器电压VTUNE变大了,第一振荡信号LO1的频率就会增加,第二振荡信号LO2的频率则会下降。以下的方程式2与方程式3则分别显示出第一振荡信号LO1的频率变化ΔLO1以及第二振荡信号LO2的频率变化ΔLO2相对于回路滤波器电压ΔVTUNE的电压变化以及一VCO增益因数K之间的关系。The first voltage-controlled
ΔLO1≈|K|*ΔVTUNE(方程式2)ΔLO1≈|K|*ΔV TUNE (Equation 2)
ΔLO2≈(-|K|)*ΔVTUNE(方程式3)ΔLO2≈(-|K|)*ΔV TUNE (Equation 3)
请注意,第一压控振荡器224以及第二压控振荡器226并不一定会具有相同的VCO增益因数K,上述两个方程式中使用了相同的符号K主要是为了表示出第一压控振荡器224以及第二压控振荡器226对于回路滤波器电压VTUNE的变化会有相反的反应方向。然而,在其他的实施例中,亦可以让第一压控振荡器224具有一第一增益因数K1,第二压控振荡器226则具有一第二增益因数K2。Please note that the first voltage-controlled
第四混频器230可将第一与第二振荡信号LO1、LO2混频以产生一信号231。信号231中于频率(LO1+LO2)处具有一较高的频率成分,于频率(LO1-LO2)处则具有一较低的频率成分。低通滤波器232则负责滤除前述于频率(LO1+LO2)处的频率成分,至于一反馈分频器234则依据接收射频信号RF_in中的选定通道,将于频率(LO1-LO2)处的频率成分除以M。如此一来,即可产生于闭合回路(closed-loop)锁相回路运作中所需的反馈信号FFB。方程式4中显示了接收射频信号RF_in中选定通道的频率会等于除数M乘上参考信号FREF。The
选定通道的频率=FREF*M(方程式4)Frequency of selected channel = F REF * M (Equation 4)
接下来,PFD 220会比较信号FREF与反馈信号FFB的相位,而由回路滤波器222所产生的回路滤波器电压VTUNE就可用来控制第一与第二压控振荡器224、226。由于锁相回路218具有闭合回路的结构,到达稳定状态时,第一压控振荡器224与第二压控振荡器226就会产生出适当的第一振荡信号LO1与第二振荡信号LO2,而(LO1-LO2)则会是参考信号FREF的M倍(此即对应于信号RF_in中的选定通道)。然后,第一混频器204、第二混频器206与第三混频器212就可以将RF_in中的选定通道下转换(down-convert)成同相基频信号I以及正交基频信号Q。Next, the
请参阅图3,图3为本发明的调谐器的另一实施例示意图。电视调谐器300大致上包含有相似于电视调谐器200的组成元件,不同处在于图2中的第一混频器204、第二混频器206以及第三混频器212在图3中分别改成了一第一谐波混频器(harmonic mixer)302、一第二谐波混频器306以及一第三谐波混频器310。另外,电视调谐器300还包含有一第二90度相位延迟单元304以及一45度相位延迟单元308。第二90度相位延迟单元304可产生第一振荡信号LO1经过相位延迟90度之后的信号,而第一振荡信号LO1以及其经过90度相位延迟后的信号都被耦合至第一谐波混频器302。另外,在图3的实施例中,第二振荡信号LO2以及其经过90度相位延迟后的信号LO2_90°都被耦合至第二谐波混频器306。45度相位延迟单元308所产生第二振荡信号LO2经过相位延迟45度与135度的信号则都被耦合至第三谐波混频器310。Please refer to FIG. 3 , which is a schematic diagram of another embodiment of the tuner of the present invention. The TV tuner 300 generally includes components similar to the
而在实际上,第一、第二、第三谐波混频器302、306、310皆可使用无源谐波混频器(passive harmonic mixer)来实施。关于谐波混频器的操作、实施方式、以及其特点,请参照申请时间为为2003年6月的美国第10/604018号的专利申请“无源谐波混频器(Passive Harmonic Mixer)”。由于使用到了谐波混频器302、306以及310,锁相回路218所提供的第一振荡信号LO1与第二振荡信号LO2仅需提供正常操作时一半频率即可。此一特点可以降低锁相回路218在设计上的复杂度。至于具有谐波结构的电视调谐器的操作方式与特点则请参考申请时间为为2003年12月的美国第10/707319号的专利申请“以谐波混频器为基础的电视调谐器与处理接收射频信号的方法(HARMONIC MIXER BASED TELEVISION TUNER AND METHOD OF PROCESSING A RECEIVED RF SIGNAL)”。In practice, the first, second, and third harmonic mixers 302 , 306 , and 310 can all be implemented using passive harmonic mixers. For the operation, implementation, and features of the harmonic mixer, please refer to the US patent application No. 10/604018 "Passive Harmonic Mixer (Passive Harmonic Mixer)" filed in June 2003 . Due to the use of the harmonic mixers 302 , 306 and 310 , the first oscillating signal LO1 and the second oscillating signal LO2 provided by the phase-locked
最后请参阅图4,图4为本发明用来处理一接收射频信号的方法流程图,以下将详述图4中的各个步骤:Please refer to FIG. 4 at last. FIG. 4 is a flowchart of a method for processing a received radio frequency signal according to the present invention. The steps in FIG. 4 will be described in detail below:
步骤400:使用一单一的锁相回路产生一第一及一第二振荡信号,其中第一振荡信号的频率减去第二振荡信号的频率等于该接收射频信号中一选定通道的频率。进入步骤402。Step 400: Using a single PLL to generate a first and a second oscillating signal, wherein the frequency of the first oscillating signal minus the frequency of the second oscillating signal is equal to the frequency of a selected channel of the received RF signal. Go to step 402.
步骤402:将该接收射频信号与第一振荡信号LO1混频以产生一中频信号IF。进入步骤404。Step 402: Mix the received RF signal with the first oscillating signal LO1 to generate an intermediate frequency signal IF. Go to step 404.
步骤404:将中频信号IF与第二振荡信号LO2混频以产生一同相基频信号,并将中频信号IF与第二振荡信号LO2经过相位延迟后的信号混频以产生一正交基频信号。Step 404: Mix the intermediate frequency signal IF and the second oscillating signal LO2 to generate an in-phase base frequency signal, and mix the intermediate frequency signal IF and the phase-delayed second oscillating signal LO2 to generate a quadrature base frequency signal .
根据上述本发明的实施例,由于第二混频器206、306以及第三混频器212、310可以直接将第一中频信号IF转换至基频,故不需要使用带通滤波器来将镜像信号移除。另外,第二混频器206、306以及第三混频器212、310可为一般混频器。且于本发明的调谐器中,使用一个锁相回路218来产生振荡信号LO1、LO2,可降低调谐器使用的元件数量。According to the above-mentioned embodiment of the present invention, since the
一较佳实施例,由于频道外的干扰信号直到低通滤波器208、214才被抑制,故前面的元件(低噪声放大器202,第一混频器204,正交混频器212与同相混频器206)具有较好的线性度,可减少干扰信号的影响。A preferred embodiment, because the interfering signal outside the frequency channel is just suppressed until low-pass filter 208,214, so front element (
以上所述仅为本发明的优选实施例,凡依本发明权利要求所进行的等效变化与修改,皆应属本发明的涵盖范围。The above descriptions are only preferred embodiments of the present invention, and all equivalent changes and modifications made according to the claims of the present invention shall fall within the scope of the present invention.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/708,060 US7120413B2 (en) | 2003-06-22 | 2004-02-06 | Television tuner and method of processing a received RF signal |
| US10/708,060 | 2004-02-06 |
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| US8139160B2 (en) | 2006-10-25 | 2012-03-20 | Mstar Semiconductor, Inc. | Television tuner with double quadrature mixing architecture |
| US8139159B2 (en) | 2006-10-25 | 2012-03-20 | Mstar Semiconductor, Inc. | Single down-conversion television tuner |
| US8212943B2 (en) | 2006-10-25 | 2012-07-03 | Mstar Semiconductor, Inc. | Triple-conversion television tuner |
| US8385855B2 (en) * | 2008-11-07 | 2013-02-26 | Viasat, Inc. | Dual conversion transmitter with single local oscillator |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5710993A (en) * | 1994-12-23 | 1998-01-20 | U.S. Philips Corporation | Combined TV/FM receiver |
| CN2489526Y (en) * | 2001-07-13 | 2002-05-01 | 安徽四创电子股份有限公司 | Digital integral tuner for direct broadcasting satellite television |
| CN1347203A (en) * | 2000-09-29 | 2002-05-01 | 松下电器产业株式会社 | Tuner |
| CN1359589A (en) * | 1999-04-09 | 2002-07-17 | 美信集成产品公司 | Single-chip digital cable TV/cable modem tuner IC |
-
2005
- 2005-01-25 TW TW94102160A patent/TWI253856B/en not_active IP Right Cessation
- 2005-02-04 CN CN 200510007958 patent/CN1652462B/en not_active Expired - Fee Related
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5710993A (en) * | 1994-12-23 | 1998-01-20 | U.S. Philips Corporation | Combined TV/FM receiver |
| CN1359589A (en) * | 1999-04-09 | 2002-07-17 | 美信集成产品公司 | Single-chip digital cable TV/cable modem tuner IC |
| CN1347203A (en) * | 2000-09-29 | 2002-05-01 | 松下电器产业株式会社 | Tuner |
| CN2489526Y (en) * | 2001-07-13 | 2002-05-01 | 安徽四创电子股份有限公司 | Digital integral tuner for direct broadcasting satellite television |
Non-Patent Citations (1)
| Title |
|---|
| JP特开平9-331252A 1997.12.22 |
Also Published As
| Publication number | Publication date |
|---|---|
| TWI253856B (en) | 2006-04-21 |
| TW200527914A (en) | 2005-08-16 |
| CN1652462A (en) | 2005-08-10 |
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