CN120984358A - Manufacturing process of microfluidic chip with multiple microstructures - Google Patents

Abstract

The invention discloses a manufacturing process of a micro-fluidic chip with various microstructures, and relates to the technical field of manufacturing of the fluidic chip. The invention comprises the following steps of S1, providing a substrate, sequentially carrying out multi-layer photoresist spin coating treatment on the substrate, wherein each layer of photoresist has different thickness and is used for forming a microstructure master model with different heights, and S2, exposing, post-baking and developing each layer of photoresist by using a mask plate. According to the invention, integrated design and manufacture of microstructures with different heights and different functions can be realized in one master die through multiple spin coating and layered exposure technologies, multiple complex microstructures can be duplicated with high fidelity by utilizing good forming capability and transparency of PDMS materials, chips are ensured to be free from leakage and firmly packaged through a plasma bonding process, the manufacturing process has strong universality, and the method can be widely applied to research and development and manufacture of multifunctional integrated microfluidic chips, reduce processing difficulty and alignment errors and improve chip yield and functional density.

Description

Manufacturing process of microfluidic chip with multiple microstructures

Technical Field

The invention relates to the technical field of manufacturing of a flow control chip, in particular to a manufacturing process of a micro-flow control chip with various microstructures.

Background

The micro-fluidic chip technology realizes high-flux, low-loss and high-sensitivity treatment of chemical and biological samples by regulating and controlling the flow of liquid in a micrometer scale space. The existing microfluidic chip has various structure types including straight channels, branch mixers, cell capturing holes, droplet generators, concentration gradient structures and the like, and the microstructures often correspond to different functional requirements and have obvious differences in size, morphology and spatial distribution.

However, in the existing manufacturing process of the microfluidic chip, due to the structure uniformity of single exposure or disposable dies, it is difficult to integrate various microstructures with obvious depth and function difference on one chip with high precision, and even if multiple processing is adopted, the problems of large interlayer alignment error, complex repeated process, poor material compatibility, high cost and the like easily occur, so that the industrialization and the practicability of the multifunctional microfluidic chip are restricted.

Therefore, a manufacturing process of a microfluidic chip with various microstructures is provided.

Disclosure of Invention

The invention aims to solve the problems in the background technology and provides a manufacturing process of a microfluidic chip with various microstructures.

The invention adopts the following technical scheme for realizing the purposes:

A process for fabricating a microfluidic chip having a plurality of microstructures, comprising the steps of:

Step S1, providing a substrate, sequentially carrying out multi-layer photoresist spin coating treatment on the substrate, wherein each layer of photoresist has different thickness and is used for forming microstructure female dies with different heights;

Step S2, exposing, post-baking and developing each layer of photoresist by using a mask plate to form a SU-8 master model with various microstructure combinations including a microchannel, a micro-column array, a reaction cavity, a mixed structure and the like;

S3, adopting Polydimethylsiloxane (PDMS) to perform mold turnover on the SU-8 master mold, and demolding after curing to obtain a PDMS microstructure layer;

And S4, aligning the PDMS microstructure layer with the cover layer, and bonding by a plasma treatment mode to obtain the integrated microfluidic chip. .

Further, the multi-layer photoresist comprises at least two layers of SU-8 photoresist of different thicknesses, wherein the first layer is 510 μm thick for forming a high resolution array of micropillars and the second layer is 20100 μm thick for forming a bulk channel or reaction chamber.

Further, in step S2, exposure control is performed on each layer of pattern through an independent mask, so as to realize structure differential design between different functional areas and ensure that functional structures are kept connected or isolated.

Further, in the step S3, the step of structuring the PDMS microstructure constructed in the SU-8 master mold includes the steps of:

Step S31, a gradient generation structure is used for generating a solution concentration gradient;

step S32, a forked mixing structure is used for liquid mixing reaction;

Step S33, a micropore array structure is used for single cell capturing or particle screening;

Step S34 a droplet generator configuration for a pack reaction or drug dispensing. .

Further, the PDMS micro-structure layer and the cover layer are bonded at room temperature after being treated by oxygen plasma, so that a leak-free closed micro-fluidic structure is formed.

Further, the cover layer is a PDMS cover layer with an inlet and outlet through hole structure or a glass substrate prefabricated with through holes, and the through holes are used as a liquid inlet and a liquid outlet of the microfluidic chip.

Further, in the step S3, the PDMS material is cured for 1 to 2 hours at 80 ℃, and is subjected to a defoaming treatment before curing, so as to ensure complete formation of the microstructure.

Further, after the SU-8 master mold is manufactured, the surface of the SU-8 master mold is treated by adopting metal ion evaporation or a fluoride release agent so as to enhance the release efficiency and the molding quality during PDMS mold copying.

The beneficial effects of the invention are as follows:

Through multiple spin coating and layering exposure technology, the integrated design and manufacture of microstructures with different heights and different functions can be realized in one master die, multiple complex microstructures can be copied with high fidelity by utilizing good forming capability and transparency of PDMS materials, chips are ensured to be free of leakage and firm in packaging through a plasma bonding process, the manufacturing process is high in universality, the method can be widely applied to research and development and manufacture of multifunctional integrated microfluidic chips, processing difficulty and alignment error are reduced, and chip yield and functional density are improved.

Drawings

FIG. 1 is a process flow diagram of the present invention;

FIG. 2 is a process flow diagram of a PDMS microstructure built into the SU-8 master of the present invention.

Detailed Description

For the purpose of making the objects, technical solutions and advantages of the embodiments of the present invention more apparent, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is apparent that the described embodiments are some embodiments of the present invention, but not all embodiments of the present invention. The components of the embodiments of the present invention generally described and illustrated in the figures herein may be arranged and designed in a wide variety of different configurations.

Thus, the following detailed description of the embodiments of the invention, as presented in the figures, is not intended to limit the scope of the invention, as claimed, but is merely representative of selected embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.

It should be noted that like reference numerals and letters refer to like items in the following figures, and thus once an item is defined in one figure, no further definition or explanation thereof is necessary in the following figures. Furthermore, the terms "first," "second," and the like, are used merely to distinguish between descriptions and should not be construed as indicating or implying relative importance.

In describing embodiments of the present invention, it should be noted that the directions or positional relationships indicated by the terms "inner", "outer", "upper", etc. are directions or positional relationships based on those shown in the drawings, or those that are conventionally put in place when the inventive product is used, are merely for convenience of description and simplification of description, and are not indicative or implying that the apparatus or element in question must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be construed as limiting the present invention.

As shown in fig. 1 to 2, a manufacturing process of a microfluidic chip having a plurality of microstructures at least includes the following steps:

Step S1, providing a substrate, sequentially carrying out multi-layer photoresist spin coating treatment on the substrate, wherein each layer of photoresist has different thickness and is used for forming microstructure female dies with different heights;

Step S2, exposing, post-baking and developing each layer of photoresist by using a mask plate to form a SU-8 master model with various microstructure combinations including a microchannel, a micro-column array, a reaction cavity, a mixed structure and the like;

in some practical applications, in step S2, exposure control is performed on each layer of patterns through an independent mask, so as to realize structure differential design between different functional areas and ensure that functional structures are kept connected or isolated.

S3, adopting Polydimethylsiloxane (PDMS) to perform mold turnover on the SU-8 master mold, and demolding after curing to obtain a PDMS microstructure layer;

In some practical applications, in step S3, the step of structuring the PDMS microstructure built in the SU-8 master mold includes the steps of:

in some practical applications, in step S3, the PDMS material is cured at 80 ℃ for 1-2 hours, and is subjected to defoaming treatment before curing to ensure complete molding of the microstructure

Step S31, a gradient generation structure is used for generating a solution concentration gradient;

step S32, a forked mixing structure is used for liquid mixing reaction;

Step S33, a micropore array structure is used for single cell capturing or particle screening;

Step S34 a droplet generator configuration for a pack reaction or drug dispensing.

And S4, aligning the PDMS micro-structure layer with the cover layer, and bonding by a plasma treatment mode to obtain the integrated micro-fluidic chip.

In some implementations, the multi-layer photoresist includes at least two layers of SU-8 photoresist of different thickness, with a first layer of 510 μm thickness for forming a high resolution array of micropillars and a second layer of 20100 μm thickness for forming a bulk channel or reaction chamber.

In some practical applications, the PDMS microstructure layer and the cover layer are bonded at room temperature after being treated by oxygen plasma to form a leak-free closed microfluidic structure, the cover layer is a PDMS cover layer with an inlet and outlet through hole structure or a glass substrate prefabricated with through holes, and the through holes serve as a liquid inlet and a liquid outlet of the microfluidic chip.

In some practical applications, after the SU-8 master mold is manufactured, the surface of the SU-8 master mold is treated by metal ion evaporation or a fluoride release agent, so as to enhance the release efficiency and the molding quality of the PDMS mold.

Embodiment one:

And (3) manufacturing a master model:

Spin-coating a first layer of SU-8 photoresist (with the thickness of 8 μm) on a clean and dry silicon wafer, pre-baking, exposing, post-baking and developing to form a micro-column array structure, spin-coating a second layer of SU-8 (with the thickness of 30 μm), performing mask exposure again to form a reaction cavity and a branch mixer structure, and continuing to perform third layer of photoetching (with the thickness of 50 μm) if a gradient structure or a droplet generator is needed.

And (3) shaping the PDMS turnover mould:

mixing and stirring PDMS prepolymer and cross-linking agent according to the ratio of 10:1, pouring the mixture on the surface of SU-8 master model after defoaming, placing the mixture in a vacuum box for degassing for 30 minutes, placing the mould in an 80 ℃ oven for curing for 90 minutes, taking out the mould, and slowly stripping to obtain the PDMS microstructure layer.

And (3) packaging a chip:

and (3) respectively carrying out oxygen plasma treatment on the PDMS microstructure layer and the PDMS cover plate prefabricated with the inlet and outlet through holes for 30 seconds, then aligning and bonding, and placing the bonded chip at room temperature for 30 minutes to solidify a bonding interface, thus completing the packaging of the microfluidic chip.

Application example:

The prepared chip can simultaneously realize multifunctional operations such as concentration gradient mixing, cell capturing, droplet generation and the like, and is suitable for scenes such as drug screening, single cell analysis, micro chemical reaction and the like.

Embodiment two:

And (3) manufacturing a master model:

A first layer of SU-82005 photoresist (with the thickness of about 5 mu m) is firstly spin-coated on the surface of a piece of cleaned and dried 4 inch silicon wafer, ultraviolet exposure is carried out through a first mask after pre-baking to form a high-resolution cell capturing micropore array structure, a second layer of spin-coated SU-82025 photoresist (with the thickness of about 25 mu m) is used for exposing through a second mask to form a Y-shaped bifurcation mixer structure and a main channel structure, a third layer of spin-coated SU-82050 photoresist (with the thickness of 50 mu m) is used for exposing through a third mask to form a droplet generator structure and a large-scale reaction cavity structure, and finally post-baking and developing treatment are uniformly carried out to obtain the SU-8 master model integrating a three-layer functional structure.

And (3) shaping the PDMS turnover mould:

Mixing PDMS prepolymer and cross-linking agent according to the ratio of 10:1, stirring uniformly, then defoaming for 15-30 min in vacuum, pouring into SU-8 master model to make it completely cover all microstructure areas, placing the poured mould into 80 ℃ constant temperature oven to cure for about 1.5 h, taking out and slowly stripping PDMS layer to obtain the complete multifunctional microstructure PDMS chip layer.

And (3) packaging a chip:

and carrying out surface activation treatment on the PDMS microstructure layer and a glass substrate with a prefabricated through hole by adopting oxygen plasma treatment, wherein the treatment parameters are 30W and 30 seconds, carrying out channel alignment under a microscope, then attaching, and standing for 30 minutes at room temperature to complete bonding, thereby obtaining the multifunctional microfluidic chip finally integrated with a capturing area, a mixing area, a reaction area and a liquid drop area.

Chip function verification:

The chip is used for carrying out multiphase flow liquid drop generation experiments, an oil phase and a water phase are respectively introduced from inlets at two sides of a liquid drop structure, oil-in-water liquid drops with the diameters of about 80-120 mu m can be stably generated, cell suspension is injected into the inlet of the chip, a micropore array area realizes a single cell capturing effect, two reagents can be effectively and uniformly mixed in a mixing area, and experimental results show that functions of the areas are separated clearly, fluid is smooth, microstructure replication precision is high, and good application performance and structure integration are achieved.

In sum, through multiple spin coating and layering exposure technology, the integrated design and manufacture of microstructures with different heights and different functions can be realized in one master die, multiple complex microstructures can be copied with high fidelity by utilizing good forming capability and transparency of PDMS materials, chips are ensured to be free from leakage and firm in packaging through a plasma bonding process, the manufacturing process is high in universality, and the method can be widely applied to research, development and manufacture of multifunctional integrated microfluidic chips, reduce processing difficulty and alignment errors and improve chip yield and functional density.

The foregoing has shown and described the basic principles, principal features and advantages of the invention. It will be understood by those skilled in the art that the present invention is not limited to the embodiments described above, and that the above embodiments and descriptions are merely illustrative of the principles of the present invention, and various changes and modifications may be made therein without departing from the spirit and scope of the invention, which is defined by the appended claims. The scope of the invention is defined by the appended claims and equivalents thereof.

Claims (8)

1. A process for manufacturing a microfluidic chip having a plurality of microstructures, comprising the steps of:

Step S1, providing a substrate, sequentially carrying out multi-layer photoresist spin coating treatment on the substrate, wherein each layer of photoresist has different thickness and is used for forming microstructure female dies with different heights;

Step S2, exposing, post-baking and developing each layer of photoresist by using a mask plate to form a SU-8 master model with various microstructure combinations including a microchannel, a micro-column array, a reaction cavity, a mixed structure and the like;

S3, adopting Polydimethylsiloxane (PDMS) to perform mold turnover on the SU-8 master mold, and demolding after curing to obtain a PDMS microstructure layer;

and S4, aligning the PDMS microstructure layer with the cover layer, and bonding by a plasma treatment mode to obtain the integrated microfluidic chip.

2. The process of claim 1, wherein the multi-layer photoresist comprises at least two layers of SU-8 photoresist of different thicknesses, wherein the first layer is 510 μm thick for forming a high resolution array of micropillars and the second layer is 20100 μm thick for forming a bulk channel or reaction chamber.

3. The manufacturing process of the microfluidic chip with multiple microstructures according to claim 1, wherein in step S2, exposure control is performed on each layer of patterns through an independent mask plate, so as to realize structure differential design between different functional areas and ensure that functional structures are kept communicated or isolated.

4. The process for fabricating a microfluidic chip having a plurality of microstructures according to claim 1, wherein in the step S3, the step of structuring the PDMS microstructure in the SU-8 master mold comprises the steps of:

Step S31, a gradient generation structure is used for generating a solution concentration gradient;

step S32, a forked mixing structure is used for liquid mixing reaction;

Step S33, a micropore array structure is used for single cell capturing or particle screening;

Step S34 a droplet generator configuration for a pack reaction or drug dispensing.

5. The process for manufacturing the microfluidic chip with the multiple microstructures according to claim 1, wherein the PDMS microstructure layer and the cover layer are bonded at room temperature after being treated by oxygen plasma, so as to form a leakage-free closed microfluidic structure.

6. The process for manufacturing the microfluidic chip with the multiple microstructures according to claim 5, wherein the cover layer is a PDMS cover layer with an inlet and outlet through hole structure or a glass substrate with prefabricated through holes, and the through holes are used as a liquid inlet and a liquid outlet of the microfluidic chip.

7. The process for manufacturing a microfluidic chip with multiple microstructures according to claim 1, wherein in the step S3, the PDMS material is cured at 80 ℃ for 1-2 hours, and the defoaming treatment is performed before curing to ensure the complete formation of the microstructures.

8. The process for manufacturing a microfluidic chip with multiple microstructures according to claim 1, wherein after the SU-8 master mold is manufactured, a metal ion evaporation or a fluoride release agent is used to treat the surface of the SU-8 master mold, so as to enhance the release efficiency and molding quality during PDMS mold replication.