Detailed Description
For a better understanding of the technical solutions of the present invention, the following description of exemplary embodiments of the present invention is made with reference to the accompanying drawings, in which various details of embodiments of the present invention are included to facilitate understanding, and they should be considered as merely exemplary. Accordingly, those of ordinary skill in the art will recognize that various changes and modifications of the embodiments described herein can be made without departing from the scope and spirit of the invention. Also, descriptions of well-known functions and constructions are omitted in the following description for clarity and conciseness.
The embodiments of the invention and features of the embodiments may be combined with each other without conflict.
As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. The terms "connected" or "connected," and the like, are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect.
Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and the present invention and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
In the technical scheme of the invention, the related processes of collecting, storing, using, processing, transmitting, providing, disclosing and the like of the personal information of the user accord with the regulations of related laws and regulations, and the public order is not violated. The use of user data in the technical scheme complies with national relevant laws and regulations (for example, information security technology personal information security standards, etc.). For example, the personal information access control takes corresponding prescribed measures, the presentation of the personal information gives prescribed limits, the use purpose of the personal information does not exceed the direct or reasonable association range, and the definite identity directivity is eliminated when the personal information is used, so that the accurate positioning to a specific person is avoided.
First, the technical terms in the present invention are explained as follows:
Ethernet Switch (Switch) is used to realize Ethernet message exchange between different nodes.
The vehicle-mounted Ethernet 100Base-T1 is a vehicle-mounted Ethernet bus with data transmission rate of 100Mbps by using a pair of twisted pair wires for transmission.
Industrial Ethernet 100Base-TX based on 4B/5B coding, two twisted pair transmission is used, and the data transmission rate is 100Mbps industrial Ethernet bus.
The MAC Address MEDIA ACCESS Control Address, which is translated into a media access Control Address, also known as a local area network Address (LAN ADDRESS), also known as an Ethernet Address (ETHERNET ADDRESS) or physical Address (PHYSICAL ADDRESS), is an Address used to identify the location of the network device.
TCP/IP (Transmission Control Protocol/Internet Protocol) protocol, defines the standard for data transfer between devices.
RGMII (Reduced Gigabit MEDIA INDEPENDENT INTERFACE) a point-to-point parallel interface standard for interfacing an Ethernet controller (MAC layer) with a physical layer chip (PHY).
In the related technology, the hardware test of the vehicle-mounted Ethernet in the prior invention is only data interaction between a singlechip and a computer, the singlechip is not integrated with an operating system and TCP/IP protocol, the singlechip and the computer can only mutually send and receive broadcast frames and cannot send and receive actual data, at the moment, communication per se is meaningless, and the method is only a compromised primary Ethernet communication test method. For transceiving custom data, only the bottom layer driver code of the CAN controller needs to be completed for CANFD/CAN communication, while ethernet communication is different, and once the actual information is involved, the integrated operating system and TCP/IP protocol are needed to realize. For a controller in which the hardware platform is a SoC, we should test emmcs and DDR (Double Data Rate Synchronous Dynamic Random Access Memory) in the smallest system at least in the most common way. The invention is not only suitable for SoC hardware platform, but also suitable for MCU (micro control unit, microcontroller Unit). The test method is not only suitable for the exchanger, but also suitable for the Ethernet single node, and is a plate-to-plate scheme suitable for networking of the tested piece and the accompanying test piece.
In order to solve at least one technical problem in the related art, the invention provides a communication test method of a vehicle-mounted Ethernet. Fig. 1 is a flow chart of a communication test method of a vehicle-mounted ethernet, which is provided in an embodiment of the present invention, and as shown in fig. 1, the embodiment of the present invention provides a communication test method of a vehicle-mounted ethernet, which includes configuring network parameters of a tested piece and an accompanying piece for data interaction between the tested piece and the accompanying piece, recording a first message sent by the tested piece and a second message received by the accompanying piece, comparing the first message and the second message, and determining a communication state of the ethernet.
With the embodiment of the invention, RGMII requires equal length, 10mil error, and 50 ohm impedance in the transmit and receive groups, respectively, when the PCB Layout (Printed Circuit Board Layout, i.e., printed circuit board Layout design) is implemented. In order to be able to reliably data, the data line needs to reach more than 90% of the expected level at 50% of the rising or falling edge of the clock, so Switch needs to configure TX and RX delay of the RGMII bus, otherwise packet loss is easy. Whether this delay setting is reasonable or not, requires the controller to verify by streaming to 100% at normal temperature. Therefore, linux is integrated through an a core (Application Processor Core, an application processor core) of the SoC, a TCP/IP protocol is integrated based on an operating system, a tested piece and a companion testing piece are combined with firmware of a Switch to form a network, and ethernet data is periodically sent and received in real time to reflect the working state of the controller. These status data originate from the R-core (Real-time Processor Core ), such as collecting input signals, monitoring the operating power supply, monitoring the operating state of ethernet and CAN communications, monitoring the internal junction temperature of the SoC and Switch, diagnosing output faults. And reading the data of the R core as effective data of the Ethernet message during A verification through an inter-core communication module. And each time the measured piece successfully transmits a frame of message, writing the transmission data into a transmission file of an eMMC (Embedded Multi MEDIA CARD), and each time the measured piece successfully receives a frame of message, writing the received data into a receiving file. After the test and the experiment are finished, the files are compared, if the two files are the same, the Ethernet communication is free from packet loss, the communication is normal, and the control parameters are regulated according to the communication test result.
On the basis of the embodiment, the configuration of the network parameters of the tested piece and the accompanying piece comprises the steps of configuring an Ethernet network card of the tested piece and the accompanying piece, wherein the Ethernet network card at least comprises one of a MAC address, an IP address, a virtual local area network, a speed and a master-slave configuration, and communication connection between the tested piece and the accompanying piece is established in response to the fact that the Ethernet network card is activated and the connectivity between the tested piece and the accompanying piece passes a test.
It should be noted that the basic principle of the on-vehicle ethernet Switch firmware is that any two on-vehicle ethernet nodes are connected by an ethernet cable bundle, when the rates of the two nodes are the same and are full duplex, a Master (client) and a Slave (server) are matched, and normal communication can be performed only in the same VLAN (Virtual Local Area Network ). Each port is configured with a communication rate, such as 1000BASE-T1 interface, which can be compatible with 100BASE-T1 downwards, 00BASE-T1 which can be compatible with 10BASE-T1 downwards, when 1000BASE-T1 nodes and 100BASE-T1 nodes communicate, even if a transceiver of 1000BASE-T1 capable of adapting to 100BASE-T1 can only be converted into 100BASE-T1 by sending Linux command, both sides can normally communicate, full duplex representation can simultaneously transmit and receive data, half duplex representation can transmit and receive data in a time sharing way, and two nodes must be configured as Master and the other node as Slave. Typically the ethernet gateway is a Master and the other controllers are Slave. In the Switch, nodes allocated to the same VLAN receive the ethernet packet, and the ethernet packet is unconditionally forwarded to other nodes. After Switch power-on reset, all nodes default to one VLAN. After configuring Switch in accordance with firmware programmed in NOR Flash (electrically erasable programmable read only memory), REG is reconfigured to form VLAN, generating the desired network.
Fig. 2 is a block diagram of an application scenario of the method provided in the embodiment of the present invention, as shown in fig. 2, a network architecture of the entire ethernet network is, for example, that the entire ethernet network has 5 ethernet nodes, and the other four nodes are 100BASE-T1 nodes, such as ADAS, T-BOX, IVI, and the like, except that one node is used for diagnosing as 100 BASE-TX. And dividing the Ethernet message communication matrix into a plurality of VLANs according to the Ethernet message communication matrix requirement of the whole vehicle. In order to enable normal communication, the sending node and the receiving node of the message must be in the same local area network, namely, the two bytes are the same before IPv4 setting, when the 3 rd byte is the same, the two nodes are indicated to be the same VLAN, and the 3 rd byte is VLANID. When the 3 rd byte is different, it means that the two nodes are not the same VLAN, and the communication needs to be forwarded between VLANs. When the same node is located in a different VLAN, only the third byte is different. The ethernet architecture of fig. 2, IP address and VLAN partitioning is shown in table 1 (certain model VLAN and IP address partitioning). The intra-VLAN forwarding is directly realized through the two-layer forwarding of Switch, and the inter-VLAN forwarding is realized through the A core forwarding of SoC.
TABLE 1
In this embodiment, the upstream interface of the gateway selects the RGMII of 1000M, whether 100M or 1000M, as usual. The bandwidth of the SoC can thus be satisfied by multiple VLANs exchanging data with the gateway at the same time. The Switch can configure parameters through a graphical interface to generate firmware, write NOR Flash through a 100BASE-TX interface, and also can call an API function to generate the firmware through SDK provided by a Linux integrated factory, so that after the SoC is started, the firmware is conveniently written and automatically updated. The user pushes the firmware into the fixed catalog of the SoC system, the version number of the Switch can be automatically read in the system starting process, if the version number is not the latest version, the firmware can be automatically updated, and the firmware can be manually updated through a Linux command. The firmware is written by the Switch through the MDIO and MDC configuration Switch registers, and the MDIO (MANAGEMENT DATA Input/Output) and MDC (MANAGEMENT DATA Clock) can be accessed by the A core and the R core of the SoC, so that the firmware can be updated in the R core and the firmware can be updated in the A core.
Through the embodiment of the invention, in the process of debugging and receiving the Ethernet message, the Ethernet networking is often unsuccessful, and the problem needs to confirm whether the network configuration parameters IP, MAC, speed, full duplex and master-slave of the tested piece and the accompanying piece are matched, and then confirm whether each node is normal Link Up. If the network configuration parameters are matched, no Link Up exists, and the problem of harness short circuit or open circuit or poor contact of connectors is likely, and software should support diagnosis of harness faults according to standard requirements.
Based on the embodiment, the method further comprises the steps of detecting the state of the Ethernet network card by using a network interface configuration tool and detecting the connectivity state of a bidirectional link between the tested piece and the accompanying piece by using a network connectivity test tool for the bidirectional link between the tested piece and the accompanying piece.
Through the embodiment of the invention, for hardware testing software of the SoC, after integrating a Linux operating system and a TCP/IP protocol, the SoC initializes an RGMII interface, and a tested piece and an accompanying piece configure an Ethernet network card, including setting an MAC address, setting IP, VLAN and the like, each node has a unique MAC address, and the MAC address of a sending node and the MAC address of a receiving node cannot be the same. When the Switch is configured according to the firmware, the basic conditions of networking of the tested piece and the accompanying piece are provided. And inputting Linux commands ifconfig at the background of the sending node and the receiving node, if the network card exists, the Link Up can be normal, and hardware is verified in advance by using a ping command (by sending ICMP (Internet Control Message Protocol) echo request information to a target host and waiting for receiving an ICMP echo response to verify the connectivity with a remote host). If each ping can normally respond, the Ethernet card configuration of the SoC of the tested piece and the accompanying piece is matched with the firmware of the Switch, and the hardware basic function test is passed.
Fig. 3 is a schematic flow chart of creating a server (a tested piece) in an embodiment of the present invention, and fig. 4 is a schematic flow chart of creating a client (a partner tested piece) in an embodiment of the present invention, where, as shown in fig. 3 and fig. 4, the method includes creating a first socket, associating a first socket, a network address and a port, starting a listening service of the first socket, waiting for a connection request of the client, creating a client (a partner tested piece) in an embodiment of the present invention, and sending a connection request to the server for connecting the network address and the port of the tested piece.
According to the embodiment of the invention, the TCP/IP protocol API function is called, the tested piece creates a server, the accompanying piece creates a client, and data is received and transmitted. The method comprises the following steps that a measured piece is used as a server, a partner measured piece is used as a client, the server firstly creates, binds and monitors sockets, and then waits for the connection of the client. Once the connection is established, the measured piece and the accompanying piece exchange data. In the client side, a socket is first created, connected to a server, and then data exchange is performed. And when the communication is finished, both parties close the socket. And calling a TCP/IP protocol to realize the communication of actual information between the tested piece and the accompanying piece.
On the basis of the embodiment, recording a first message sent by a tested piece and a second message received by a partner, wherein the first message is counted by a sending counter in response to the fact that the tested piece sends a frame of first message, the first message is stored in a sending file, the tested piece calls an application core to obtain state data of a controller from a real-time core to serve as the first message, the state data at least comprises one of an acquired input signal, a working power supply state, an Ethernet communication state, a CAN communication state and a hardware internal junction temperature, the second message is counted by the receiving counter in response to the fact that the partner receives a frame of second message, and the second message is stored in the receiving file.
Through the embodiment of the invention, through the inter-core communication module, the data of the R core is read when the A of the tested piece is verified in each sending period and is used as the effective data of the Ethernet message. The data comprises collected input signals, a monitored working power supply, working state feedback of Ethernet and CAN communication, internal junction temperatures of SoC and Switch, and faults of diagnosis output.
On the basis of the embodiment, the method comprises the steps of storing a first message into a sending file and storing a second message into a receiving file, and then prompting a user to manually delete the receiving file or the sending file with the size exceeding a preset threshold value in response to the size of the receiving file or the sending file exceeding the preset threshold value.
According to the embodiment of the invention, in order to verify the file read-write function of the eMMC, each time a measured piece successfully transmits a frame message, a transmission counter is circularly added with 1, and the background printing is performed, transmission data are written into the transmission file of the eMMC, when the file of the eMMC exceeds 2GB, a printing prompt is required to be manually deleted by a user, the writing of the eMMC is prevented, the data cannot be successfully written any more, each time the accompanying piece successfully receives a frame message, a reception counter is circularly added with 1, the background printing is performed, the reception data are written into the reception file of the eMMC, and similarly, when the file of the eMMC exceeds 2GB, the printing prompt is required to be manually deleted by the user. All data printed by output are stored in the DDR buffer memory, if the printing is normal, the DDR normal reading and writing are indicated.
On the basis of the embodiment, the first message and the second message are compared, and the communication state of the Ethernet is judged, wherein the method comprises the steps of judging the communication state of the Ethernet according to whether a sending counter and a receiving counter are continuously self-added or not for the current power-on operation period, comparing the content of a sending file and the content of a receiving file before the next power-on operation period, judging the communication state of the current power-on operation period of the Ethernet, and synchronizing the communication state signals of the Ethernet to a CAN message.
In each power-on operation period, the communication state of the ethernet is determined automatically and periodically according to whether the transmission counter and the reception counter are continuously self-powered on. Before each power-on run period, the contents of the transmitted file and the received file are automatically compared.
According to the embodiment of the invention, in order to meet the requirement of automatic test, the Linux software needs to contain a start script, is electrified to automatically configure the RGMII bus, automatically runs the threads for sending data and receiving data, and does not need to manually input Linux commands. In the process of debugging and receiving Ethernet messages, sudden stop of transmission caused by unreliable Ethernet communication is often encountered. The system overhead is too large due to the fact that the Ethernet messages are received and sent, because the message data of the Ethernet can be up to 1500 bytes, the memory requirement is large, and the reasonable distribution is important. In the process of receiving and transmitting the Ethernet, whether information is printed too much or not, a large amount of memory is occupied, generally only a counter is printed, and if the counter is always cycled and self-added, the Ethernet communication is normal. After the Ethernet program is debugged stably, synchronizing an Ethernet communication state signal from the A core to the R core through inter-core communication every transmission period, adding the signal in a CAN message, and monitoring the working state of the Ethernet through the CAN message. Thus, the background of the A core is not required to be opened every time, the printing information of the Ethernet is checked, and the working state of the Ethernet is determined. And only the files of the tested piece and the accompanying piece are compared before power-on each time, and whether the Ethernet is normally transmitted and received last time is confirmed.
Thus, complex hardware test schemes are elaborated in detail and in full from the hardware test software of Switch firmware and SoC. The hardware production test of the vehicle-mounted Ethernet Switch and the SoC minimum system is realized based on the SoC platform and the TCP/IP protocol for the first time.
The invention provides a communication test system of a vehicle-mounted Ethernet, which can be used for realizing the communication test method of the vehicle-mounted Ethernet, and comprises a configuration module, a communication module and a communication module, wherein the configuration module is used for configuring network parameters of a tested piece and a partner to enable the tested piece and the partner to perform data interaction; the device comprises a test module, a storage module and a test module, wherein the test module is used for comparing the first message with the second message and judging the communication state of the Ethernet.
Based on the same inventive concept, the embodiment of the invention also provides electronic equipment. Fig. 5 is a block diagram of an electronic device according to an embodiment of the present invention. As shown in FIG. 5, an embodiment of the present invention provides an electronic device comprising one or more processors 101, memory 102, and one or more I/O interfaces 103. The memory 102 stores one or more programs, which when executed by the one or more processors, cause the one or more processors to implement the method for testing communication of an ethernet on-board in any of the embodiments described above, and one or more I/O interfaces 103 coupled between the processors and the memory are configured to implement information interaction between the processors and the memory.
The processor 101 is a device with data processing capability, including but not limited to a Central Processing Unit (CPU), the memory 102 is a device with data storage capability, including but not limited to a random access memory (RAM, more specifically SDRAM, DDR, etc.), a Read Only Memory (ROM), a charged erasable programmable read only memory (EEPROM), a Flash memory (Flash), and an I/O interface (read/write interface) 103 is connected between the processor 101 and the memory 102, so that information interaction between the processor 101 and the memory 102 can be realized, including but not limited to a data Bus (Bus), etc.
In some embodiments, processor 101, memory 102, and I/O interface 103 are connected to each other via bus 104, and thus to other components of the computing device.
In some embodiments, the one or more processors 101 comprise a field programmable gate array.
The embodiment of the invention also provides a computer readable medium. The computer readable medium has stored thereon a computer program, wherein the program when executed by a processor implements the steps of the communication test method of an on-board ethernet network as in any of the above embodiments. The computer readable storage medium may be a volatile or nonvolatile computer readable storage medium.
The embodiment of the invention also provides a computer program product, which comprises computer readable codes or a nonvolatile computer readable storage medium carrying the computer readable codes, wherein when the computer readable codes run in a processor of electronic equipment, the processor in the electronic equipment executes the communication test method of the vehicle-mounted Ethernet.
Those of ordinary skill in the art will appreciate that all or some of the steps, systems, functional modules/units in the apparatus, and methods disclosed above may be implemented as software, firmware, hardware, and suitable combinations thereof. In a hardware implementation, the division between functional modules/units mentioned in the above description does not necessarily correspond to the division of physical components, for example, one physical component may have a plurality of functions, or one function or step may be cooperatively performed by several physical components. Some or all of the physical components may be implemented as software executed by a processor, such as a central processing unit, digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application specific integrated circuit. Such software may be distributed on computer-readable storage media, which may include computer storage media (or non-transitory media) and communication media (or transitory media).
The term computer storage media includes both volatile and nonvolatile, removable and non-removable media implemented in any method or technology for storage of information such as computer readable program instructions, data structures, program modules or other data, as known to those skilled in the art. Computer storage media includes, but is not limited to, random Access Memory (RAM), read Only Memory (ROM), erasable Programmable Read Only Memory (EPROM), static Random Access Memory (SRAM), flash memory or other memory technology, portable compact disc read only memory (CD-ROM), digital Versatile Discs (DVD) or other optical disc storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium which can be used to store the desired information and which can be accessed by a computer. Furthermore, as is well known to those of ordinary skill in the art, communication media typically embodies computer readable program instructions, data structures, program modules or other data in a modulated data signal such as a carrier wave or other transport mechanism and may include any information delivery media.
The computer readable program instructions described herein may be downloaded from a computer readable storage medium to a respective computing/processing device or to an external computer or external storage device over a network, such as the internet, a local area network, a wide area network, and/or a wireless network. The network may include copper transmission cables, fiber optic transmissions, wireless transmissions, routers, firewalls, switches, gateway computers and/or edge servers. The network interface card or network interface in each computing/processing device receives computer readable program instructions from the network and forwards the computer readable program instructions for storage in a computer readable storage medium in the respective computing/processing device.
Computer program instructions for carrying out operations of the present invention may be assembly instructions, instruction Set Architecture (ISA) instructions, machine-related instructions, microcode, firmware instructions, state setting data, or source or object code written in any combination of one or more programming languages, including an object oriented programming language such as SMALLTALK, C ++ or the like and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The computer readable program instructions may be executed entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any kind of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or may be connected to an external computer (for example, through the Internet using an Internet service provider). In some embodiments, aspects of the present invention are implemented by personalizing electronic circuitry, such as programmable logic circuitry, field Programmable Gate Arrays (FPGAs), or Programmable Logic Arrays (PLAs), with state information for computer readable program instructions, which can execute the computer readable program instructions.
The computer program product described herein may be embodied in hardware, software, or a combination thereof. In an alternative embodiment, the computer program product is embodied as a computer storage medium, and in another alternative embodiment, the computer program product is embodied as a software product, such as a software development kit (Software Development Kit, SDK), or the like.
Various aspects of the present invention are described herein with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and/or block diagrams, and combinations of blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer-readable program instructions.
These computer readable program instructions may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions/acts specified in the flowchart and/or block diagram block or blocks. These computer readable program instructions may also be stored in a computer readable storage medium that can direct a computer, programmable data processing apparatus, and/or other devices to function in a particular manner, such that the computer readable medium having the instructions stored therein includes an article of manufacture including instructions which implement the function/act specified in the flowchart and/or block diagram block or blocks.
The computer readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other devices to cause a series of operational steps to be performed on the computer, other programmable apparatus or other devices to produce a computer implemented process such that the instructions which execute on the computer, other programmable apparatus or other devices implement the functions/acts specified in the flowchart and/or block diagram block or blocks.
The flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present invention. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of instructions, which comprises one or more executable instructions for implementing the specified logical function(s). In some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.
Example embodiments have been disclosed herein, and although specific terms are employed, they are used and should be interpreted in a generic and descriptive sense only and not for purpose of limitation. In some instances, it will be apparent to one skilled in the art that features, characteristics, and/or elements described in connection with a particular embodiment may be used alone or in combination with other embodiments unless explicitly stated otherwise. It will therefore be understood by those of ordinary skill in the art that various changes in form and details may be made therein without departing from the scope of the present invention as set forth in the following claims.