Detailed Description
The following description of the embodiments of the present application will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present application, but not all embodiments. Based on the embodiments of the present application, all other embodiments obtained by a person of ordinary skill in the art without making any inventive effort are within the scope of the present application.
It should be noted that in the description of the present application, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. The terms "first," "second," and the like in this specification are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order.
The present application will be further described in detail below with reference to the drawings and detailed description for the purpose of enabling those skilled in the art to better understand the aspects of the present application.
The inventor found in the study that when the server architecture is adjusted, the connection mode between the existing boards cannot adapt to the new architecture, and a new adapter board needs to be added, for example, RETIMER adapter boards (retimer adapter boards) need to be added between a main board and a middle back board, and this mode needs to consume a great deal of time and effort to design and develop an adapter board, so that development cost is increased, a connection link is also added, and when the connection link is increased, signal transmission links are increased, so that signal transmission loss is increased, signal transmission quality is poor, and the overall reliability of the server is low.
In view of this, the present application provides a server to at least solve the problem that the connection mode between boards cannot adapt to a new architecture when the server architecture needs to be adjusted in the related art, so as to reduce development cost and equipment cost, improve the adaptation degree to different server architectures, reduce the probability of occurrence of abnormal situations, and improve the reliability and stability of the server.
Fig. 1 is a schematic connection diagram of a server according to an embodiment of the present application, fig. 2 is another schematic connection diagram of a server according to an embodiment of the present application, please refer to fig. 1 and fig. 2, and a server 100 is provided according to the present application, which includes a motherboard 10, a graphics processor substrate 20, and a middle back plate 30, wherein the motherboard 10 and the graphics processor substrate 20 are connected with the middle back plate 30;
the middle back plate 30 comprises a first connector 61, the main plate 10 comprises a second connector 62, and the first connector 61 and the second connector 62 are matched connectors;
When the server 100 further comprises a switch board 40, the switch board 40 and the middle backboard 30 are in mating connection through a third connector 63 and a first connector 61, the switch board 40 and the main board 10 are in cable connection through a fourth connector 64 and a second connector 62, wherein the third connector 63 and the fourth connector 64 are connectors corresponding to the switch board 40, and the third connector 63 and the second connector 62 are the same type of connector;
when the server 100 does not include the switch board 40, the main board 10 and the middle backplate 30 are coupled by the second connector 62 and the first connector 61.
It should be noted that the drawings of the present application are only schematic and do not represent the actual structure of the server 100. For example, fig. 1 only shows the relevant structures of the motherboard 10, the graphics processor 21, the middle backplate 30 and the switch board 40, and does not represent that the server 100 only includes the motherboard 10, the graphics processor 21, the middle backplate 30 and the switch board 40, and for example, the number of devices such as the connector, the expander 41 and the like in the drawings is also merely schematic, and does not represent the actual number, and in the implementation, the design may be performed according to the actual situation, and the disclosure is not limited thereto. In the drawings, the dashed arrows indicate the counterpart connection of the corresponding connectors, and the implementation arrows indicate the cable connection of the corresponding connectors.
Specifically, the present application provides a server 100, where the server 100 includes a motherboard 10, a graphics processor substrate 20, and a middle backplate 30, where the motherboard 10 and the graphics processor substrate 20 are both connected to the middle backplate 30, and the motherboard 10 and the graphics processor substrate 20 transmit at least part of signals through the middle backplate 30. In the present application, the second connector 62 of the motherboard 10 is a connector that can be mated with the first connector 61 in the middle backplane 30, that is, the second connector 62 can be directly connected to the first connector 61, and no switching device such as a cable, an adapter board, or the like is required to be disposed between the two connectors. The third connector 63 in the switch board 40 is also a connector that can be mated with the first connector 61 in the middle backplane 30, and the server 100 is adapted when the structure of the server 100 changes from including the switch board 40 to not including the switch board 40 or from not including the switch board 40 to including the switch board 40.
Referring to fig. 1, in an alternative embodiment, when the server 100 includes the switch board 40, the server 100 includes the main board 10, the graphics processor substrate 20, the middle back board 30, and the switch board 40, at least part of signals are transmitted by the main board 10 and the graphics processor substrate 20 through the middle back board 30, the graphics processor substrate 20 is connected to the middle back board 30, the connection between the main board 10 and the middle back board 30 is implemented through the switch board 40, specifically, the third connector 63 of the switch board 40 is mated with the first connector 61 of the middle back board 30, the second connector 62 of the main board 10 is connected with the fourth connector 64 of the switch board 40 through a cable, that is, the third connector 63 is directly connected with the first connector 61, and the second connector 62 is connected with the fourth connector 64 through a cable or other medium. The present embodiment provides a connection manner among the main board 10, the switch board 40, the graphic processor substrate 20, and the middle backplate 30 when the switch board 40 is included in the server 100.
Referring to fig. 2, in an alternative embodiment, when the server 100 does not include the switch board 40, the server 100 includes a motherboard 10, a graphics processor substrate 20, and a middle backplate 30, where at least a portion of signals are transmitted by the motherboard 10 and the graphics processor substrate 20 through the middle backplate 30, and the motherboard 10 and the graphics processor substrate 20 are both connected to the middle backplate 30, specifically, a second connector 62 of the motherboard 10 is mated with a first connector 61 of the middle backplate 30, that is, the second connector 62 is directly connected to the first connector 61. The present embodiment provides a connection manner among the main board 10, the graphic processor substrate 20, and the middle backplate 30 when the switch board 40 is not included in the server 100.
Referring to fig. 1 and 2, in the present application, the second connector 62 of the motherboard 10 is a connector capable of implementing mating connection with the first connector 61 of the middle backplate 30, and the third connector 63 of the switch board 40 is of the same type as the second connector 62 of the motherboard 10, and also capable of implementing mating connection with the first connector 61 of the middle backplate 30. When the server 100 comprises the exchange board 40, the exchange board 40 is directly connected with the middle backboard 30, and the main board 10 is connected with the exchange board 40 through cables, when the server 100 does not comprise the exchange board 40, the main board 10 can be directly connected with the middle backboard 30, and a new adapter board is not required to be introduced between the main board 10 and the middle backboard 30, so that development cost and equipment cost are reduced, and adaptation degree of different server 100 architectures is improved. Meanwhile, the signal transmission link between the main board 10 and the graphic processor substrate 20 may be shortened, thereby advantageously reducing the probability of occurrence of abnormal situations, and thus also advantageously improving the reliability and stability of the server 100.
With continued reference to fig. 1 and 2, an alternative embodiment is provided in which when the architecture of the server 100 is converted from including the switch board 40 to not including the switch board 40 (the architecture shown in fig. 1 is converted to the architecture shown in fig. 2), the switch board 40 is pulled out, the third connector 63 and the first connector 61 are disconnected, the second connector 62 of the motherboard 10 is plugged into the first connector 61 of the middle backplate 30, and when the architecture of the server 100 is converted from not including the switch board 40 to including the switch board 40 (the architecture shown in fig. 2 is converted to the architecture shown in fig. 1), the motherboard 10 is pulled out, the second connector 62 and the first connector 61 are disconnected, the corresponding connectors of the motherboard 10 and the switch board 40 are connected by cables, and the third connector 63 of the switch board 40 is plugged into the first connector 61 of the middle backplate 30. Thus, when the architecture of the server 100 changes, a new adapter board is not required to be introduced into the server 100, and convenience in adjusting the architecture of the server 100 is improved.
It should be noted that the mating connection between connectors in the present application refers to that the connectors can be plugged, and the first connector 61 of the middle back board 30 is a ExaMax connector disposed perpendicular to the middle back board 30, the second connector 62 of the main board 10 is a ExaMax connector capable of being plugged with the first connector 61, and blind plugging can be achieved between the first connector 61 and the second connector 62, and similarly, the third connector 63 of the switch board 40 is the same connector as the second connector 62, and blind plugging can also be achieved between the second connector 62 and the first connector 61. The present application is described by way of examples only, and is not limited thereto.
It should be further noted that, the middle backplane 30 is a board card located in a middle area of the chassis of the server 100, other functional modules may be connected to the middle backplane 30 from two sides of the middle backplane 30, and the middle backplane 30 may implement signal routing and power distribution in the server 100, where the functions of the middle backplane 30 are shown in the present application, and include at least transmitting signals of the motherboard 10 and the graphics processor substrate 20. The pluggable design among the motherboard 10, the exchange board 40, the graphics processor substrate 20 and the middle backboard 30 is more beneficial to adjusting the position and connection relation of corresponding boards when the architecture of the server 100 needs to be changed, is beneficial to improving the adaptation degree of different architectures of the server 100, and is beneficial to improving the maintainability and maintenance difficulty of the server 100 compared with integrating a plurality of devices with the same board.
With continued reference to fig. 1 and 2, in regard to the physical space between boards in the server 100, an alternative embodiment of the present application is provided, in which, when the server 100 includes the switch board 40, the motherboard 10, the graphics processor board 20 and the switch board 40 are all located on the same side of the midplane 30, the midplane 30 is connected to the graphics processor board 20 and the switch board 40, the motherboard 10 is located between the graphics processor board 20 and the switch board 40, and the motherboard 10 is connected to the switch board 40 through cables. When the server 100 does not include the switch board 40, the main board 10 is located at the original switch board 40 and directly connected to the middle back board 30. When the architecture of the server 100 is adjusted, the application not only can adapt to a new architecture, but also is beneficial to saving occupied space, thereby being beneficial to reducing the volume of the server 100. It should be noted that, the present application is only limited to the above embodiments as an example of a location setting manner of each board card in the server 100.
With continued reference to fig. 1 and fig. 2, in an alternative embodiment of the present application, the motherboard 10 includes a processor 11, the graphics processor board 20 includes a graphics processor 21, the motherboard 10 and the graphics processor board 20 transmit signals through the middle backplane 30, and the server 100 uses the processor 11 in the motherboard 10 as a core, runs an operating system, manages system resources, performs data preprocessing, distributes computing tasks to the graphics processor board 20, and improves the computing power of the server 100 through the graphics processors 21 in the graphics processor board 20. It should be noted that the present application is not limited to the graphics processor board 20, and may be any other accelerator card.
Referring to fig. 1, in an alternative embodiment of the present application, the switch board 40 further includes an extender 41, and the extender 41 is at least configured to extend a signal transmission channel between the motherboard 10 and the graphics processor substrate 20, the signal transmission channel is used to transmit a first type of signal between the motherboard 10 and the graphics processor substrate 20, the midplane 30 further includes a fifth connector 65, the graphics processor substrate 20 includes a sixth connector 66, and the midplane 30 and the graphics processor substrate 20 are connected by the fifth connector 65 and the sixth connector 66 in a mating manner.
Specifically, the signal transmission channels between the motherboard 10 and the graphics processor substrate 20 are limited, and the expander 41 is disposed in the switch board 40 to expand the signal transmission channels between the motherboard 10 and the graphics processor substrate 20 for transmitting the first type of signals, which is beneficial to breaking through the channel limitation between the motherboard 10 and the graphics processor substrate 20, realizing high-density deployment of the graphics processor 21 in the graphics processor substrate 20, and further improving the performance of the server 100. In addition, the fifth connector 65 of the middle backplate 30 and the sixth connector 66 of the graphics processor substrate 20 are directly connected in a mating manner, which is beneficial to shortening the signal transmission path between the middle backplate 30 and the graphics processor substrate 20, reducing the signal loss, and thus, improving the signal transmission quality.
It should be noted that the fifth connector 65 and the first connector 61 may be the same type of connector, which is beneficial to reduce the number of types of connectors in the server 100. The exchange board 40 serves as a hub for data exchange in the server 100, and expands a signal transmission channel between the motherboard 10 and the graphics processor substrate 20, thereby facilitating improvement of performance of the server 100. The extender 41 in the switch board 40 may be PCIE SWITCH chips, but the disclosure is not limited thereto, and the extender 41 is a device capable of extending a signal transmission channel between the motherboard 10 and the graphics processor substrate 20.
With continued reference to fig. 1, in an alternative embodiment of the present application, when the server 100 includes the switch board 40, the main board 10 and the graphics processor substrate 20 transmit signals of a first type through the switch board 40 and the middle back board 30, the main board 10 and the switch board 40 transmit signals of a first type through the second connector 62 and the fourth connector 64, the switch board 40 and the middle back board 30 transmit signals of a first type through the third connector 63 and the first connector 61, and the middle back board 30 and the graphics processor substrate 20 transmit signals of a first type through the fifth connector 65 and the sixth connector 66.
Specifically, when the server 100 includes the switch board 40, the switch board 40 includes the expander 41, which facilitates expanding a signal transmission path between the main board 10 and the graphic processor substrate 20, thereby facilitating transmission of the first type of signals. The transmission path of the first type signal passes through the main board 10, the switching board 40, the middle back board 30, and the graphic processor substrate 20. The connection mode between the boards is specifically that the second connector 62 of the motherboard 10 and the fourth connector 64 of the switch board 40 are connected by cables, the first type of signals are transmitted between the motherboard 10 and the switch board 40 by the second connector 62 and the fourth connector 64, the third connector 63 of the switch board 40 and the first connector 61 of the middle back board 30 are connected in a pairing manner, the first type of signals are transmitted between the switch board 40 and the middle back board 30 by the third connector 63 and the first connector 61, the fifth connector 65 of the middle back board 30 and the sixth connector 66 of the graphics processor board 20 are connected in a pairing manner, and the first type of signals are transmitted between the middle back board 30 and the graphics processor board 20 by the fifth connector 65 and the sixth connector 66. The first type of signals transmitted between the main board 10 and the graphics processor substrate 20 are expanded through the switch board 40 and then transmitted to the graphics processor 21 through the middle back board 30, so that the signal transmission capability between the main board 10 and the graphics processor substrate 20 is expanded, the performance of the server 100 is improved, meanwhile, the main board 10, the switch board 40 and the graphics processor substrate 20 are all independent boards, the connection is realized through the middle back board 30, the architecture of the server 100 is required to be adjusted according to different requirements, and the boards can be replaced independently, so that the configuration flexibility of the architecture of the server 100 is improved.
It should be noted that, the first type of signal may be PCIe (Peripheral Component Interconnect Express) signals between the motherboard 10 and the graphics processor substrate 20, and the PCIe signal is a serial communication protocol for transmitting data at a high speed between internal components of the server 100 and a signal physically implementing the transmission.
With continued reference to fig. 1, in an alternative embodiment of the present application, the motherboard 10 further includes a seventh connector 67, and the switch board 40 further includes an eighth connector 68, and when the server 100 includes the switch board 40, the seventh connector 67 of the motherboard 10 and the eighth connector 68 of the switch board 40 are connected by a cable.
Specifically, signals may be further transmitted between the main board 10 and the switch board 40 through the seventh connector 67 and the eighth connector 68, and alternatively, the seventh connector 67 and the eighth connector 68 may be sideband connectors for transmitting signals other than the first type of signals. Thus, the first type of signal can be independently transmitted through the second connector 62 and the fourth connector 64, which is beneficial to reducing interference of other signals to the first type of signal, improving the transmission integrity of the first type of signal and further improving the performance of the server. The present application provides an alternative embodiment in which, when a physical fault or poor connection occurs between the second connector 62 of the motherboard 10 and the fourth connector 64 of the switch board 40, the seventh connector 67 and the eighth connector 68 may also be used to transmit a part of the management signal, and the motherboard 10 and the switch board 40 may still communicate through the seventh connector 67 and the eighth connector 68, so as to facilitate diagnosing the connection fault between the motherboard 10 and the switch board 40.
With continued reference to fig. 1, in an alternative embodiment of the present application, when the server 100 includes the switch board 40, the motherboard 10 and the switch board 40 transmit the second type of signals through the seventh connector 67 and the eighth connector 68.
Specifically, the first type of signal between the motherboard 10 and the graphics processor substrate 20 is typically a high-speed data signal, which is the primary signal that needs to be transmitted between the motherboard 10 and the graphics processor substrate 20. In order to ensure the integrity of the first type signal transmission, the seventh connector 67 and the eighth connector 68 are provided to transmit the second type signal except the first type signal. It should be noted that the second type of signal refers to a sideband signal transmitted between the motherboard 10 and the switch board 40, and illustratively, the second type of signal may be a low-speed sideband signal sensitive to noise. The first type signals and the second type signals are transmitted through different connectors, physical separation between different signals is facilitated, and the signals are transmitted through independent channels respectively.
It should be further noted that, the transmission path of the second type signal passes through the main board 10 and the switch board 40, and illustratively, the signal transmission start point of the second type signal is the main board 10, the signal transmission end point of the second type signal is the switch board 40, and for example, the signal transmission start point of the second type signal is the switch board 40, and the signal transmission end point of the second type signal is the main board 10.
With continued reference to fig. 1, in an alternative embodiment of the present application, when the server 100 includes the switch board 40, the main board 10 and the middle back board 30 transmit the third type of signals through the switch board 40, the main board 10 and the switch board 40 transmit the third type of signals through the seventh connector 67 and the eighth connector 68, and the switch board 40 and the middle back board 30 transmit the third type of signals through the third connector 63 and the first connector 61.
Specifically, when the server 100 includes the switch board 40, the signals transmitted through the seventh connector 67 and the eighth connector 68 further include a third type of signals, and the transmission path of the third type of signals passes through the main board 10, the switch board 40, and the middle backplane 30. The third type of signal is a sideband signal transmitted between the main board 10 and the middle backplate 30. The third type of signals are transmitted by establishing a connection between the main board 10 and the switch board 40 through the seventh connector 67 and the eighth connector 68, and the third type of signals are transmitted by establishing a connection between the switch board 40 and the middle back board 30 through the third connector 63 and the first connector 61. The transmission of the third type of signals between the motherboard 10 and the switch board 40 does not occupy the signal transmission path between the second connector 62 and the fourth connector 64, which is beneficial to guaranteeing the integrity of the first type of signal transmission. Meanwhile, the embodiment of the application also provides a transmission path of the sideband signal between the main board 10 and the middle backboard 30 so as to realize communication between the main board 10 and the middle backboard 30, thereby being beneficial to improving the diversity and the comprehensiveness of signal transmission.
With continued reference to fig. 1, in an alternative embodiment of the present application, when the server 100 includes the switch board 40, the main board 10 and the graphics processor substrate 20 transmit the fourth type of signals through the switch board 40 and the middle back board 30, the main board 10 and the switch board 40 transmit the fourth type of signals through the seventh connector 67 and the eighth connector 68, the switch board 40 and the middle back board 30 transmit the fourth type of signals through the third connector 63 and the first connector 61, and the middle back board 30 and the graphics processor substrate 20 transmit the fourth type of signals through the fifth connector 65 and the sixth connector 66.
Specifically, when the server 100 includes the switch board 40, the signals transmitted through the seventh connector 67 and the eighth connector 68 further include a fourth type of signals, and the transmission path of the fourth type of signals passes through the main board 10, the switch board 40, the middle backplate 30, and the graphic processor substrate 20. The fourth type of signal is a sideband signal transmitted between the motherboard 10 and the graphics processor board 20. The fourth type of signals are transmitted between the main board 10 and the switch board 40 through the seventh connector 67 and the eighth connector 68, the fourth type of signals are transmitted between the switch board 40 and the middle back board 30 through the third connector 63 and the first connector 61, and the fourth type of signals are transmitted between the middle back board 30 and the graphics processor substrate 20 through the fifth connector 65 and the sixth connector 66. The transmission of the fourth type of signals between the motherboard 10 and the switch board 40 does not occupy the signal transmission path between the second connector 62 and the fourth connector 64, which is beneficial to guaranteeing the integrity of the first type of signal transmission. Meanwhile, the embodiment of the application also provides a transmission path of the sideband signal between the main board 10 and the graphic processor substrate 20, thereby being beneficial to improving the diversity and the comprehensiveness of signal transmission.
Referring to fig. 2, in an alternative embodiment of the present application, the middle backplate 30 further includes a fifth connector 65, the graphics processor substrate 20 includes a sixth connector 66, and the middle backplate 30 and the graphics processor substrate 20 are coupled by the fifth connector 65 and the sixth connector 66.
Specifically, the data transmitted between the graphic processor substrate 20 and the main board 10 is a high-speed data signal, and the transmission rate thereof is high. In this embodiment, the fifth connector 65 and the sixth connector 66 are directly connected in a mating manner, signals are routed from the board of the middle back board 30, and enter the board of the graphics processor substrate 20 through the fifth connector 65 and the sixth connector 66, so that the signal transmission path is advantageously shortened, the signal delay and attenuation are further advantageously reduced, and the signal transmission quality is improved.
It should be noted that the first connector 61, the second connector 62, the third connector 63, the fifth connector 65 and the sixth connector 66 may be the same connector, for example, exaMax connectors, and the connectors include a large number of specially designed power pins and grounding pins capable of carrying large current, which is beneficial to providing stable and low-noise power for the graphics processor substrate 20 with higher power consumption, and meanwhile, is beneficial to reducing the types of connectors in the server 100, and further is beneficial to improving maintainability and adaptation degree.
Referring to fig. 2, in an alternative embodiment of the present application, when the server 100 does not include the switch board 40, the main board 10 and the graphics processor substrate 20 transmit the fifth type of signals through the middle back board 30, the main board 10 and the middle back board 30 transmit the fifth type of signals through the second connector 62 and the first connector 61, and the middle back board 30 and the graphics processor substrate 20 transmit the fifth type of signals through the fifth connector 65 and the sixth connector 66.
Specifically, in the present embodiment, the switch board 40 is not included in the server 100, the server 100 includes the main board 10, the graphics processor board 20, and the middle board 30, and the main board 10 and the graphics processor board 20 are connected to the middle board 30, and the main board 10 is connected to the graphics processor board 20 through the middle board 30. The transmission path of the fifth type of signal passes through the main board 10, the middle back board 30, and the graphic processor substrate 20. The main board 10 and the middle back board 30 are directly connected through the second connector 62 and the first connector 61, and the middle back board 30 and the graphics processor substrate 20 are directly connected through the fifth connector 65 and the sixth connector 66. In this embodiment, the motherboard 10 and the middle backboard 30 may be directly connected without the switch board 40, so that when the architecture of the server 100 changes, no other adapter boards need to be introduced into the server 100, and the motherboard 10 may be directly connected with the middle backboard 30, which is beneficial to reducing development cost and equipment cost on one hand, and improving adaptation and adjustment flexibility of different architectures of the server 100 on the other hand. Meanwhile, the transmission of the fifth type of signals between the motherboard 10 and the graphics processor substrate 20 only passes through the middle backboard 30 and does not pass through other independent adapter boards, so that the arrangement can shorten the signal transmission link between the motherboard 10 and the graphics processor substrate 20, is beneficial to reducing the signal transmission loss and the occurrence probability of abnormal conditions, and is beneficial to improving the reliability and stability of the server 100.
It should be noted that, the fifth type of signal includes PCIe signals between the motherboard 10 and the graphics processor substrate 20, or sideband signals between the motherboard 10 and the graphics processor substrate 20, where the motherboard 10 and the middle backplane 30 are connected in pairs through the first connector 61 and the second connector 62, and signals between the motherboard 10 and the graphics processor substrate 20 can be transmitted through the first connector 61 and the second connector 62. The transmission path of the fifth type of signal passes through the motherboard 10, the midplane 30, and the graphics processor substrate 20. In some other embodiments, the server 100 further includes a sixth type of signal transmitted between the motherboard 10 and the midplane 30.
With continued reference to fig. 2, in an alternative embodiment of the present application, when the server 100 does not include the switch board 40, the motherboard 10 and the midplane 30 transmit a sixth type of signal via the second connector 62 and the first connector 61. Alternatively, the sixth type of signal is a sideband signal transmitted between the main board 10 and the middle backplate 30, and may include a signal for managing and monitoring the middle backplate 30 and devices connected thereto other than the graphic processor substrate 20, for example, a signal for managing a heat dissipation module, or a signal for managing a power supply module, for example.
Fig. 3 is a schematic block diagram of a server according to an embodiment of the present application, fig. 4 is another schematic block diagram of a server according to an embodiment of the present application, please refer to fig. 3 and fig. 4, fig. 3 and fig. 4 show a structure in which a server 100 includes a switch board 40 and a structure in which the switch board 40 is not included, respectively, in an alternative embodiment of the present application, the server 100 further includes a power module 70, where the power module 70 is at least configured to provide power to the motherboard 10 and the graphics processor substrate 20, and the power module 70 is connected to the midplane 30.
Specifically, the application is provided with the independent power module 70, the power module 70 is connected with the middle backboard 30, and the power is supplied to the main board 10 and the graphic processor substrate 20 through the middle backboard 30, compared with the traditional mode that the main board 10 and the graphic processor substrate 20 are connected with a power line, the number of cables in the chassis of the server 100 is reduced, the arrangement is more beneficial to heat dissipation of the server 100, meanwhile, the power module 70 can also be connected with the middle backboard 30 in a pluggable manner, and when the architecture of the server 100 is changed, the power module 70 is more beneficial to replacing the proper power module 70 to supply power for different modules of the server 100.
With continued reference to fig. 3 and fig. 4, in an alternative embodiment of the present application, the server 100 further includes a heat dissipation module 80, where the heat dissipation module 80 is connected to the middle backplate 30, and the heat dissipation module 80 is at least used for dissipating heat of the server 100.
Specifically, when the server 100 works, heat is generated, if the heat cannot be timely dissipated, the temperature in the board card and the chassis of the server 100 can be rapidly increased, and then an overheat protection mechanism can be triggered, so that the server 100 automatically operates in a down-frequency mode, the performance of the server 100 is greatly reduced, and even equipment is burnt. Accordingly, the server 100 further includes a heat dissipating module 80, and optionally, the heat dissipating module 80 may include a fan, a heat sink, etc. to maintain the temperature within the server 100 within a suitable operating temperature range, thereby facilitating improved performance of the server 100. The power supply module 70 and the heat dissipation module 80 are arranged to supply power and dissipate heat to the server 100, so that the main board 10 and the graphics processor substrate 20 are in a stable and proper environment, and the server 100 can exert the performance of the server.
The above describes a server provided by the present application in detail. The principles and embodiments of the present application have been described herein with reference to specific examples, the description of which is intended only to facilitate an understanding of the method of the present application and its core ideas. It should be noted that it will be apparent to those skilled in the art that various modifications and adaptations of the application can be made without departing from the principles of the application and these modifications and adaptations are intended to be within the scope of the application as defined in the following claims.