CN120076700B - Semiconductor device and preparation method thereof - Google Patents

Abstract

The invention provides a semiconductor device and a preparation method thereof, which relate to the technical field of semiconductors and comprise a preposed film layer, an oxide layer and a surface metal layer which are sequentially laminated, the oxide layer comprises a plurality of preset oxide areas which are separated by grooves, the surface metal layer comprises a preset metal layer corresponding to the preset oxide areas, and the preset metal layer wraps the preset oxide areas. The surface metal layer wraps the preset oxidation zone, so that the preset oxidation zone below the surface metal layer is prevented from being damaged during release, the stability of the surface metal layer is enhanced, the isolation protection of the surface metal layer on the preset oxidation zone below the surface metal layer is realized, and after the release process, the surface metal layer is completely displayed on the surface of the device and is free from falling off, insufficient support, breakage and the like.

Description

Semiconductor device and preparation method thereof

Technical Field

The invention relates to the technical field of semiconductors, in particular to a semiconductor device and a preparation method thereof.

Background

In the process of manufacturing a piezoelectric MEMS (Micro-Electro-MECHANICAL SYSTEM, also referred to as a Micro-electromechanical system) device, as shown in fig. 1, fig. 1 shows a schematic view of a surface metal layer 2 on the surface of the device, wherein a frame is enclosed to represent a seal ring, which is a metal solder ring for ball-mounting sealing during packaging, a central region is represented by a plurality of connection structures and wire portions, which are all affected by a release process and are located on the surface metal 2, and there is a problem that when the device is subjected to the release process, as shown in fig. 2, the surface metal 2 is directly deposited on the silicon oxide 1, the release process causes the silicon oxide 1 serving as a support to be severely undercut, as shown in fig. 3, resulting in that the contact area between the surface metal 2 and the underlying silicon oxide 1 is greatly reduced, and finally the surface metal 2 is warped or broken. Since the release process is a complete chemical reaction, isotropic process, the silicon oxide 1 is removed to a certain thickness, and the lower part of the surface metal 2 is also affected by a certain amount as shown in fig. 3, which affects various properties of the surface metal 2.

Disclosure of Invention

The invention aims to provide a semiconductor device and a preparation method thereof, which can avoid damage to an oxide layer below a surface metal layer and enhance the stability of the surface metal layer.

In one aspect of the present invention, a semiconductor device is provided, including a pre-film layer, an oxide layer, and a surface metal layer sequentially stacked, where the oxide layer includes a plurality of preset oxide regions spaced apart by trenches, the surface metal layer includes a preset metal layer corresponding to the preset oxide regions, and the preset metal layer encapsulates the preset oxide regions.

Optionally, the bottom end of the side wall of the preset oxidation zone of the preset metal layer is further provided with a first folded edge, and the first folded edge is attached to the upper surface of the film layer below the preset oxidation zone.

Optionally, the groove is a U-shaped groove, the preset metal layer includes a first metal layer wrapping the preset oxidation area and U-shaped metal layers connected to two sides of the first metal layer, and the U-shaped metal layers are matched with the U-shaped groove.

Optionally, the pre-film layer comprises at least one film layer, and at least one film layer comprises a single film layer or a composite film layer.

Optionally, the front film layer comprises a first film layer, a second film layer and a third film layer which are sequentially laminated, the oxide layer is located on the third film layer, the third film layer partially covers the second film layer, the preset oxide region simultaneously covers the second film layer and the third film layer, the preset metal layer wraps the preset oxide region, part of the preset metal layer is attached to the second film layer at the bottom end of the side wall of the preset oxide region, and part of the preset metal layer is attached to the third film layer at the bottom end of the side wall of the preset oxide region.

In another aspect of the present invention, there is provided a method for manufacturing a semiconductor device as described above, the method comprising:

forming an oxide layer on the front film layer;

patterning the oxide layer to form a trench within the oxide layer, the trench separating the oxide layer into a plurality of oxide regions;

forming a surface metal layer on the oxidation area and the surface of the groove;

Patterning the surface metal layer, removing part of the oxidation region and the surface metal layer on the groove adjacent to the oxidation region, wherein the reserved surface metal layer is used as a preset metal layer, and the oxidation region covered by the preset metal layer is used as a preset oxidation region;

and removing the oxidation area outside the preset metal layer, and wrapping the preset oxidation area by the reserved preset metal layer.

Optionally, the patterning the surface metal layer, removing a part of the oxide region and the surface metal layer on the trench adjacent to the oxide region, where the remaining surface metal layer is used as a preset metal layer, and the oxide region covered by the preset metal layer is used as a preset oxide region, including:

the reserved preset metal layer covers the preset oxidation region and extends into the groove adjacent to the preset oxidation region.

Optionally, the patterning the surface metal layer, removing a part of the oxide region and the surface metal layer on the trench adjacent to the oxide region, where the remaining surface metal layer is used as a preset metal layer, and the oxide region covered by the preset metal layer is used as a preset oxide region, including:

And reserving the preset oxidation region and the metal layer in the groove as preset metal layers, so that the preset metal layers extend to the end parts of the upper surfaces of the oxidation regions adjacent to the preset oxidation regions through the grooves adjacent to the preset oxidation regions.

Optionally, the removing the oxidized area except for the preset metal layer, and the remaining preset metal layer wraps the preset oxidized area, including:

the preset metal layer is arranged along the upper surface and the side wall of the preset oxidation zone, and in the stacking direction, the bottom end of the side wall of the preset oxidation zone is provided with a folded edge, and the folded edge is attached to the upper surface of the film layer below the preset oxidation zone.

Optionally, the removing the oxidized area except for the preset metal layer, and the remaining preset metal layer wraps the preset oxidized area, including:

the preset metal layer is arranged along the upper surface and the side wall of the preset oxidation zone, and a metal layer structure matched with the groove is formed on two sides of the side wall of the preset oxidation zone.

The invention provides a semiconductor device and a preparation method thereof, the semiconductor device comprises a preposed film layer, an oxide layer and a surface metal layer which are sequentially laminated, wherein the oxide layer comprises a plurality of preset oxide areas which are separated by grooves, the surface metal layer comprises a preset metal layer corresponding to the preset oxide areas, and the preset metal layer wraps the preset oxide areas. The surface metal layer wraps the preset oxidation zone, so that the preset oxidation zone below the surface metal layer is prevented from being damaged during release, the stability of the surface metal layer is enhanced, the isolation protection of the surface metal layer on the preset oxidation zone below the surface metal layer is realized, and after the release process, the surface metal layer is completely displayed on the surface of the device and is free from falling off, insufficient support, breakage and the like.

Drawings

In order to more clearly illustrate the technical solutions of the present invention, the following brief description will be given of the drawings required for the present invention, it being understood that the following drawings only illustrate some examples of the present invention and should not be considered as limiting the scope, and that other relevant drawings can be obtained from these drawings without the inventive effort of a person skilled in the art.

FIG. 1 is a schematic diagram of a surface metal layer of a conventional semiconductor device;

FIG. 2 is a schematic cross-sectional view of a surface metal layer of a conventional semiconductor device;

FIG. 3 is a second schematic cross-sectional view of a surface metal layer of a conventional semiconductor device;

Fig. 4 is a schematic view of a semiconductor device structure provided by the present invention;

fig. 5 is a diagram showing a process of manufacturing a semiconductor device according to the present invention;

FIG. 6 is a second diagram of a semiconductor device manufacturing process according to the present invention;

FIG. 7 is a top view of FIG. 6;

FIG. 8 is a third view of a semiconductor device manufacturing process provided by the present invention;

fig. 9 is a diagram showing a process for manufacturing a semiconductor device according to the present invention;

fig. 10 is a fifth view of a semiconductor device manufacturing process provided by the present invention;

FIG. 11 is a top view of FIG. 10;

fig. 12 is a defect chart of a semiconductor device manufacturing process provided by the present invention;

FIG. 13 is a defect map after the molding of FIG. 12;

FIG. 14 is a top view of FIG. 13;

FIG. 15 is a schematic diagram of a semiconductor device manufacturing process layout provided by the present invention;

fig. 16 is a sixth view of a semiconductor device manufacturing process provided by the present invention;

Fig. 17 is a diagram of a semiconductor device manufacturing process according to the present invention.

The icons comprise 1-silicon oxide, 2-surface metal, 10-first film layer, 11-second film layer, 12-third film layer, 13-oxide layer, 130-preset oxide region, 131-oxide region, 14-surface metal layer, 140-preset metal layer, 141-first folded edge, 142-first metal layer, 143-U-shaped metal layer, 144-second folded edge, 15-groove, 151-first groove, 152-second groove, A-first virtual frame, B-second virtual frame and F-laminated direction.

Detailed Description

The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings.

In the description of the present invention, it should be noted that, the azimuth or positional relationship indicated by the terms "inner", "outer", etc. are based on the azimuth or positional relationship shown in the drawings, or the azimuth or positional relationship in which the inventive product is conventionally put in use, are merely for convenience of describing the present invention and simplifying the description, and are not indicative or implying that the apparatus or element to be referred to must have a specific azimuth, be configured and operated in a specific azimuth, and therefore, should not be construed as limiting the present invention. Furthermore, the terms "first," "second," and the like, are used merely to distinguish between descriptions and should not be construed as indicating or implying relative importance.

It should also be noted that, unless explicitly stated or limited otherwise, the terms "disposed" and "connected" should be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally connected, directly connected, indirectly connected through an intermediate medium, or communicating between two elements. The specific meaning of the above terms in the present invention will be understood in specific cases by those of ordinary skill in the art.

The invention provides a semiconductor device, please refer to fig. 4, which comprises a front film layer, an oxide layer 13 and a surface metal layer 14 sequentially stacked along a stacking direction F, wherein the oxide layer 13 comprises a plurality of preset oxide regions 130 separated by trenches 15, the surface metal layer 14 comprises a preset metal layer 140 corresponding to the preset oxide regions 130, and the preset metal layer 140 wraps the preset oxide regions 130.

The oxide layer 13 is divided into a plurality of preset oxide regions 130 by the trench 15, and the surface metal layer 14 is divided into a plurality of preset metal layers 140 by the trench 15, each preset metal layer 140 corresponds to one preset oxide region 130, and the preset metal layers 140 are arranged on the upper surface layer and the side wall of the preset oxide region 130 to wrap the preset oxide region 130, and the preset oxide region 130 can be prevented from being damaged by the protection of the preset metal layers 140.

The front film layer comprises at least one film layer, and the at least one film layer comprises a single film layer or a composite film layer.

As shown in fig. 4, the front film layer includes a first film layer 10, a second film layer 11, and a third film layer 12 stacked in this order, and an oxide layer 13 is located on the third film layer 12.

Further, the first film layer 10 may be a substrate, the substrate may be a single film layer such as a silicon substrate, or may be a composite film layer, the second film layer 11 may be a piezoelectric layer, and the third film layer 12 may be an electrode layer.

In some examples, the third film layer 12 partially covers the second film layer 11, the preset oxidized area 130 covers the second film layer 11, and/or the preset oxidized area 130 covers the third film layer 12, and/or the preset oxidized area 130 covers both the second film layer 11 and the third film layer 12, and fig. 4 shows a configuration of three preset oxidized areas 130, wherein one preset oxidized area 130 covered by one preset metal layer 140 is located on the surface of the second film layer 11, one preset oxidized area 130 covered by one preset metal layer 140 spans the surfaces of the second film layer 11 and the third film layer 12, and one preset oxidized area 130 covered by one preset metal layer 140 is located on the surface of the third film layer 12.

The above three arrangement modes basically cover the position state of the metal wire, when the preset oxidation area 130 covers the second film layer 11 and the third film layer 12 at the same time, the preset metal layer 140 wraps the preset oxidation area 130, part of the preset metal layer 140 is attached to the second film layer 11 at the bottom end of the sidewall of the preset oxidation area 130, and part of the preset metal layer 140 is attached to the third film layer 12 at the bottom end of the sidewall of the preset oxidation area 130, as in fig. 4, the middle preset oxidation area 130 spans the surfaces of the second film layer 11 and the third film layer 12.

The following process flow of the present invention is exemplified by the preset oxidation zone 130 covered by the preset metal layer 140 crossing the surfaces of the second film 11 and the third film 12, and other arrangement modes are referred to and executed.

Therefore, the invention also provides a preparation method of the semiconductor device, which is used for preparing the semiconductor device and comprises the following steps:

as shown in fig. 5, in step 200, an oxide layer 13 is formed on the pre-film layer.

Wherein, in the example of the invention, the front film layer comprises a first film layer 10, a second film layer 11 and a third film layer 12.

Further, the third film layer 12 partially covers the second film layer 11, and the oxide layer 13 fully covers the third film layer 12 and the second film layer 11, so that the partial oxide layer 13 directly covers the second film layer 11 and the partial oxide layer 13 covers the third film layer 12.

Since the thickness of the actual third film layer 12 is much smaller than the thickness of the oxide layer 13, the effect on the morphology of the oxide layer 13 surface is minimal, and thus the surface of the silicon oxide layer is drawn as a plane.

As shown in fig. 6, step 201, oxide layer 13 is patterned to form trenches 15 within oxide layer 13, trenches 15 separating oxide layer 13 into a plurality of oxide regions 131.

In fig. 6, a first trench 151 and a second trench 152 are formed, the first trench 151 and the second trench 152 dividing the oxide layer 13 into three oxide regions 131, as shown in fig. 7.

Since the aforementioned third film layer 12 partially covers the second film layer 11, the oxidized region 131 may be located on the second film layer 11, and/or the oxidized region 131 may be located on the second film layer 11 and the third film layer 12, i.e., the oxidized region 131 spans the second film layer 11 and the third film layer 12, and/or the oxidized region 131 may be located on the third film layer 12.

The present invention is exemplified by three oxide regions 131 respectively located on the second film 11, across the second film 11 and the third film 12, and located on the third film 12.

As shown in fig. 8, a surface metal layer 14 is formed on the oxide region 131 and the surface of the trench 15 at step 202.

The surface metal layer 14 can be formed by sputtering deposition, so that the corner protection effect of the surface metal layer 14 obtained by sputtering deposition is better, and defects at the side wall of the groove 15, the bottom surface of the oxide layer 13 and the corners at the two sides of the bottom surface can be avoided.

Experiments prove that the sealing effect of the surface metal layer 14 is poor by adopting an evaporation coating mode, and the wrapped oxide layer 13 is partially damaged in the process of releasing the fig. 9-10. However, even if the part of the structure is damaged, the final effect of the defective morphology obtained by the process is better than that of the structure before the structure is optimized. Therefore, the foregoing drawbacks can be partially ameliorated by employing an evaporation coating method, but a sputtering deposition method is more preferable.

Step 203, patterning the surface metal layer 14, removing a part of the oxidized region 131 and the surface metal layer 14 on the trench 15 adjacent to the part of the oxidized region 131, wherein the remained surface metal layer 14 is used as a preset metal layer 140, and the oxidized region 131 covered by the preset metal layer 140 is used as a preset oxidized region 130. After the surface metal layer 14 is deposited, the surface metal layer 14 is patterned, the oxidized region 131 under the relevant pattern region is blocked to be used as a preset oxidized region 130, the preset oxidized region 130 is wrapped by a corresponding preset metal layer 140, and the surface metal layer 14 covered on other oxidized regions 131 is removed, so that the appearance shown in fig. 9 is formed.

In fig. 9, the remaining preset metal layer 140 covers the preset oxidation region 130 and extends into the trench 15 adjacent to the preset oxidation region 130 to form a first folded edge 141.

As shown in fig. 10, in step 204, the oxide region 131 outside the preset metal layer 140 is removed, and the preset metal layer 140 is remained to wrap the preset oxide region 130.

And (3) performing a release process to remove the oxidized regions 131 in other areas of the surface, and only reserving the preset oxidized regions 130 and the preset metal layers 140 wrapping the preset oxidized regions 130 to obtain a device structure morphology schematic diagram shown in fig. 10.

In fig. 10, the preset metal layer 140 is disposed along the upper surface and the sidewall of the preset oxidation zone 130, such that the preset metal layer 140 covers the preset oxidation zone 130, and in the stacking direction F, the preset metal layer 140 further forms a first folded edge 141 at the bottom end of the sidewall of the preset oxidation zone 130, the first folded edge 141 extends into the trench 15 adjacent to the preset oxidation zone 130, and the first folded edge 141 is attached to the upper surface of the film layer below the preset oxidation zone 130. As shown in fig. 11, the first folding edges 141 are formed on two sides of the preset metal layer 140, and because the preset oxidation zone 130 spans across the second film layer 11 and the third film layer 12, part of the first folding edges 141 are attached to the second film layer 11 below the preset oxidation zone 130, and part of the first folding edges 141 are attached to the third film layer 12 below the preset oxidation zone 130.

The above structure and preparation process eventually achieve the stabilization of the surface metal layer 14, but when the surface metal layer 14 outside the first trench 151, the second trench 152, and the trench 15 is removed by etching, the film layer at the bottom of the trench 15 (for example, the third film layer 12 in fig. 12 and 13) is easily affected by over etching. Particularly, for the first trench 151, the thickness of the third film layer 12 in the region of the first trench 151 is thin (generally less than 100 nm), and the third film layer 12 is easily broken by etching when the surface metal layer 14 is over-etched.

Since both the surface metal layer 14 and the third film layer 12 are metal materials, the menu of etching alone cannot have an extremely high selection ratio when facing the menu of etching the surface metal layer 14, and thus this disadvantage can only be solved by structural improvement.

As shown in fig. 14, the third film layer 12 of the semiconductor device may be partially connected to the surface metal layer 14 (because the electrical connection is made to the circuit). Therefore, the connection portion (the portion in the dashed line frame in fig. 14) between the third film layer 12 and the surface metal layer 14 may be damaged as shown in the dashed line frame in fig. 13, so that the third film layer 12 may be broken, and the electrical signal on the third film layer 12 may not be transmitted to other areas through the conductive wires, thereby causing the device to fail.

In the above process, the above relationship between the third film layer 12 and the surface metal layer 14 of the semiconductor device is necessarily present, and although the damage problem of the surface metal layer 14 is improved by patterning the oxide layer 13, this results in that when the surface metal layer 14 is patterned, there is necessarily a direct etching relationship between the etched region of the surface metal layer 14 and a part of the connection region of the third film layer 12 (in the region of the trench 15, the surface metal layer 14 is directly deposited on the third film layer 12, so that when etching this part of the surface metal layer 14, etching of the third film layer 12 necessarily occurs during etching).

As shown in fig. 15, the first dummy frame a and the second dummy frame B are shown, wherein the first dummy frame a represents a certain electrical connection structure area of the surface layer, the second dummy frame B represents a connection area of the third film layer 12, and when the oxide layer 13 is not etched in advance, the first dummy frame a and the second dummy frame B overlap, but the blocking of the oxide layer 13 does not cause the etching of the surface metal layer 14 to directly etch the third film layer 12. However, after the trench 15 is prepared and the oxide layer 13 is removed, the surface metal layer 14 and the third film layer 12 are in direct contact in the trench 15 at the intersection area of the first virtual frame a and the second virtual frame B, so that the third film layer 12 is inevitably damaged by etching the surface metal layer 14, which is unavoidable as illustrated in fig. 14.

Thus, in other examples of step 203, as shown in fig. 16, step 203 comprises patterning the surface metal layer 14, removing the partial oxidation zone 131 and the surface metal layer 14 on the trench adjacent to the partial oxidation zone 131, and reserving the surface metal layer 14 as the preset metal layer 140, wherein the oxidation zone 131 covered by the preset metal layer 140 as the preset oxidation zone 130 further comprises:

the preset metal layer 140 extends to the end of the upper surface of the oxidation region 131 adjacent to the preset oxidation region 130 through the trench 15 adjacent to the preset oxidation region 130.

On the basis of fig. 9, the metal layer in the preset oxidation region 130 and the trench 15 is remained as the preset metal layer 140 in fig. 16, so that the preset metal layer 140 extends to the end of the upper surface of the oxidation region 131 adjacent to the preset oxidation region 130 through the trench 15 adjacent to the preset oxidation region 130.

In preparation, similar to the above, after depositing the surface metal layer 14, the surface metal layer 14 is patterned to seal off the preset oxidation region 130, and the surface metal layer 14 in the first trench 151 and the second trench 152 is reserved, so that the boundary of the surface metal layer 14 in the trench 15 is lapped on the surface of the adjacent oxidation region 131, and the morphology shown in fig. 16 is formed. The other oxidized regions 131 on the surface are then removed by a release process, resulting in a schematic structure morphology as shown in fig. 17.

In fig. 17, the preset metal layer 140 is disposed along the upper surface and the sidewall of the preset oxidation region 130, and the preset metal layer 140 further forms a metal layer structure matching the trench 15, such as a U-shaped metal layer 143, on both sides of the sidewall of the preset oxidation region 130.

The preset oxidation area 130 on the lower layer is wrapped by the preset metal layer 140, so that the part of the preset oxidation area 130 is prevented from being influenced by a release process, the supporting and adhering effects of the part of the preset oxidation area 130 are guaranteed, meanwhile, the actual shapes of the two sides of the preset metal layer 140 graph are fit with the shapes of the grooves 15, in the example of the invention, the characteristics similar to the U-shaped grooves 15 exist on the two sides of the preset metal layer 140 graph, therefore, the preset metal layer 140 comprises a first metal layer 142 (inverted U-shaped) wrapping the preset oxidation area 130 and a U-shaped metal layer 143 connected to the two sides of the first metal layer 142, the U-shaped metal layer 143 is matched with the U-shaped grooves 15, the side walls of the inverted U-shaped first metal layer 142 are overlapped with the side walls of the U-shaped metal layer 143, and the U-shaped metal layer 143 forms a second folded edge 144 at the end position corresponding to the upper surface of the adjacent oxidation area 131.

The preset metal layer 140 completely wraps the preset oxidation zone 130 below the preset metal layer, so that the preset oxidation zone 130 is not contacted with the outside, and the integrity and stability of the appearance and the structure of the preset metal layer 140 serving as the surface metal layer 14 after the other oxidation zones 131 are released are ensured. Furthermore, the U-shaped metal layer 143 also ensures the integrity of the film layer below the preset oxidation zone 130, solving the possible problems faced in FIG. 13.

In summary, the trench 15 is prepared by patterning the oxide layer 13 at the bottom layer, the surface metal layer 14 is prepared along the shape of the trench 15, and the oxide layer 13 is wrapped by the surface metal layer 14, so that the oxide layer 13 below the surface metal layer 14 is prevented from being damaged during release, the stability of the surface metal layer 14 is further enhanced, the isolation protection of the surface metal layer 14 on the oxide layer 13 below the surface metal layer is realized, and after the release process, the surface metal layer 14 is completely displayed on the surface of the device, and the conditions of falling, insufficient support, breakage and the like do not occur. Further, the surface metal layer 14 also fills the grooves 15, which ensures the integrity of the appearance of the film layers (such as the third film layer 12 in fig. 13) on both sides of the surface metal layer 14, avoids the damage of the third film layer 12, and further solves the problems of breakage, abnormal functions and the like of the third film layer 12, protects the top oxide layer 13, and simultaneously protects the lower third film layer 12. In addition, the invention realizes the preparation of the surface metal layer 14 by using PVD (physical vapor deposition) process technology, and can avoid the protection failure of the surface metal layer 14.

It should be noted that more than one second film layer 11 may be used in the present invention, and other film layers may be added between each second film layer 11 and the third film layer 12.

The surface metal layer 14 may be not only a metal layer but also a composite film layer with a metal film layer on the surface.

The above description is only exemplary of the present invention and is not intended to limit the scope of the present invention, and various modifications and variations may be made by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims (8)

1. The semiconductor device is characterized by comprising a preposed film layer, an oxide layer and a surface metal layer which are sequentially stacked, wherein the oxide layer comprises a plurality of preset oxide areas which are separated by grooves, the surface metal layer comprises a preset metal layer corresponding to the preset oxide areas, and the preset metal layer wraps the preset oxide areas;

Or the groove is a U-shaped groove, the preset metal layer comprises a first metal layer wrapping the preset oxidation area and U-shaped metal layers connected to two sides of the first metal layer, and the U-shaped metal layers are matched with the U-shaped groove.

2. The semiconductor device of claim 1, wherein the front-end film comprises at least one film, at least one of the films comprising a single film or a composite film.

3. The semiconductor device according to claim 2, wherein the front film layer includes a first film layer, a second film layer, and a third film layer stacked in this order, the oxide layer being on the third film layer;

The third film layer partially covers the second film layer, the preset oxidation zone covers the second film layer, and/or the preset oxidation zone covers the third film layer, and/or the preset oxidation zone covers the second film layer and the third film layer at the same time;

When the preset oxidation area covers the second film layer and the third film layer at the same time, part of the preset metal layer is attached to the second film layer at the bottom end of the side wall of the preset oxidation area, and part of the preset metal layer is attached to the third film layer at the bottom end of the side wall of the preset oxidation area.

4. A method for manufacturing a semiconductor device according to any one of claims 1 to 3, characterized by comprising:

forming an oxide layer on the front film layer;

patterning the oxide layer to form a trench within the oxide layer, the trench separating the oxide layer into a plurality of oxide regions;

forming a surface metal layer on the oxidation area and the surface of the groove;

Patterning the surface metal layer, removing part of the oxidation region and the surface metal layer on the groove adjacent to the oxidation region, wherein the reserved surface metal layer is used as a preset metal layer, and the oxidation region covered by the preset metal layer is used as a preset oxidation region;

and removing the oxidation area outside the preset metal layer, and wrapping the preset oxidation area by the reserved preset metal layer.

5. The method of manufacturing a semiconductor device according to claim 4, wherein the patterning the surface metal layer, removing a portion of the oxidized region and the surface metal layer on the trench adjacent to the oxidized region, leaving the surface metal layer as a predetermined metal layer, and the oxidized region covered by the predetermined metal layer as a predetermined oxidized region, comprises:

the reserved preset metal layer covers the preset oxidation region and extends into the groove adjacent to the preset oxidation region.

6. The method of manufacturing a semiconductor device according to claim 4, wherein the patterning the surface metal layer, removing a portion of the oxidized region and the surface metal layer on the trench adjacent to the oxidized region, leaving the surface metal layer as a predetermined metal layer, and the oxidized region covered by the predetermined metal layer as a predetermined oxidized region, comprises:

And reserving the preset oxidation region and the metal layer in the groove as preset metal layers, so that the preset metal layers extend to the end parts of the upper surfaces of the oxidation regions adjacent to the preset oxidation regions through the grooves adjacent to the preset oxidation regions.

7. The method of manufacturing a semiconductor device according to claim 5, wherein the removing the oxidized region outside the predetermined metal layer, the remaining predetermined metal layer surrounding the predetermined oxidized region, comprises:

The preset metal layer is arranged along the upper surface and the side wall of the preset oxidation zone, and in the stacking direction, the bottom end of the side wall of the preset oxidation zone is provided with a first folding edge, and the first folding edge is attached to the upper surface of the film layer below the preset oxidation zone.

8. The method of manufacturing a semiconductor device according to claim 6, wherein the removing the oxidized region outside the predetermined metal layer, the remaining predetermined metal layer surrounding the predetermined oxidized region, comprises:

the preset metal layer is arranged along the upper surface and the side wall of the preset oxidation zone, and a metal layer structure matched with the groove is formed on two sides of the side wall of the preset oxidation zone.