CN1275840A - Radio frequency circuit for identifying mark - Google Patents

Abstract

A radio frequency circuit for identifying a mark comprises a resonator, a rectifying and charging circuit connected with the resonator, a signal adjusting circuit electrically connected with the resonator and used for trimming a signal output by an antenna into a time sequence signal, a control and calculation circuit respectively connected with the rectifying and charging circuit and the signal adjusting circuit, a frequency divider connected with the output end of the signal adjusting circuit, and a shift register respectively connected with the frequency divider, the control and calculation circuit and the signal adjusting circuit and transmitted by the antenna of the resonator after modulation processing. The invention has the advantages of large signal modulation amplitude, long transmission distance and accurate data reading.

Description

Radio Frequency Circuits for Identification Marks

The invention relates to a radio frequency circuit for identification marks, in particular to a radio frequency circuit for identification marks with long identification distance, accurate data reading and stable working characteristics.

The radio frequency circuit products with identification marks in the prior art have gradually been widely used in access control systems, personnel check-in systems, warehouse inventory systems, goods delivery management systems, animal identification systems, and so on. In recent years, it has been widely used in the identification of car keys and commodity barcodes, so it has great potential for commercial applications. However, the existing radio frequency identification tags mainly transmit the corresponding zero-one data by controlling the change of the load impedance of the antenna. Whether the load impedance matching is appropriate or not will affect the rectification and charging efficiency of the received radio frequency electromagnetic wave to the DC power supply, and The card reader can only correctly sense the change of the load impedance within a short distance of less than ten centimeters, which is extremely inconvenient for users to use and operate.

Please refer to FIG. 1, which is a circuit block diagram of a proximity radio frequency identification tag in the prior art. The circuit of the proximity radio frequency identification tag of FIG. The rectification and charging circuit 121 is connected to a control logic circuit 62 , and then connected to a logic circuit 65 capable of storing data. The rectification and charging circuit 121 is also connected to a timing signal shaping circuit 61 and a modulation circuit 64 . Wherein, the rectification charging circuit 121 connects a voltage limiter 12 and a charging capacitor 21 through a rectification diode 11; the voltage limiter 12 is a Zener diode. In addition, the control logic circuit 62 is connected with a demodulation circuit 63 and so on, thereby forming a proximity identification mark circuit.

After the identification mark circuit enters the reading range of the card reader (not marked in the figure) (generally about ten centimeters), the antenna 31 of the identification mark begins to receive the radio frequency signal f ₀ emitted by the card reader, and The charging capacitor 21 is charged to the holding voltage of the Zener diode (i.e. voltage limiter 12) via the rectification charging circuit 121, and this voltage promptly forms a voltage source Vcc, which provides the power supply of the entire identification mark circuit; at the same time, the timing shaping circuit 61 will receive The radio frequency signal f ₀ is amplified and shaped into a digital timing signal, thereby providing the timing signal required by the entire identification mark circuit.

In addition, the logic circuit 65 for storing data sends the digital data of a temporary register or a memory (not shown in the figure) to the modulation circuit 64 in sequence according to the control of a certain timing signal, and transmits the digital data from the antenna 31 to a Card reader, the card reader intends to write data to the identification mark, which is received by the antenna 31 in the identification mark circuit and sent to the demodulation circuit 63, and the control logic circuit 62 controls the operation of the entire radio frequency identification mark circuit.

Regarding the existing foreign patent technology, for the existing proximity radio frequency identification marking circuit such as the case of US Patent No. 4,786,907 "Transponder useful in a system for identifying objects", when the modulated signal of the identification mark is sent from an antenna, it is directly by The signal controls a switch, which changes the load impedance of the antenna. This technology is the same as the proximity radio frequency identification marking technology disclosed in the aforementioned existing radio frequency identification tag circuit (as shown in Figure 1), in which the card reader senses the identification tag, and the electromagnetic field changes caused by the change of the antenna load impedance And interpret the corresponding "0", "1" data.

However, there are some disadvantages in this design, mainly because the matching of the antenna load impedance will affect the amplitude of the induced electromotive force of the antenna coil. (OFF), to generate input signals with different amplitudes, this feature will increase the complexity of the timing shaping circuit 61 . However, simply using the control switch 51 to cause load impedance changes can only cause a small change in the electromagnetic field, making it difficult for the card reader to sense these small changes. It can be applied in a very short distance, such as less than ten centimeters, so it is inconvenient to use, and the accuracy rate is low, which needs to be improved.

The main purpose of the present invention is to provide a battery-free identification mark radio frequency circuit with high data reading accuracy.

Another object of the present invention is to provide a radio frequency circuit for an identification mark with a long identification distance and a large angle.

Another object of the present invention is to provide a radio frequency circuit for identification marks with high circuit operation stability.

To achieve the above object, the present invention takes the following measures:

One of the characteristics of the radio frequency circuit of the identification mark of the present invention is that a rectifier diode with opposite polarity is respectively connected in series at both ends of an antenna, and the other ends of the two diodes are respectively lap-connected to the positive terminal of a charging capacitor Connect with a ground terminal. The positive end of one of the diodes is connected in parallel with a reverse diode connected to the ground, and the negative end of the other diode is connected in parallel with a switch that can be controlled by a modulation signal to ground or not.

The present invention takes following concrete structure:

The radio frequency circuit of the identification mark of the present invention includes:

a resonator including an antenna;

A rectification and charging circuit, connected to the resonator, used to rectify the signal received by the antenna and charge it to a charge storage device;

A signal adjustment circuit, electrically connected to the resonator, used to modify the signal output by the antenna into a time sequence signal for signal demodulation and modulation processing;

A control calculation circuit, respectively connected to the rectification and charging circuit and the signal adjustment circuit, to control the reshaped and processed timing signal;

A frequency divider, connected to the output end of the signal adjustment circuit, used to divide the timing signal into frequency, the input end of the frequency divider is connected to the control calculation circuit, and accepts the control of the control calculation circuit;

A shift register is respectively connected to the frequency divider and the control calculation circuit, performs the signal temporary storage operation, transmits the signal to the signal adjustment circuit, and transmits the signal from the antenna after modulation processing.

Wherein, a radio frequency limiter is also included, one end of which is connected to the rectification and charging circuit, and the other end is connected to the resonator.

Wherein, a modulation switch is also included, one end of which is connected to the resonator and the signal adjustment circuit, and the other end is grounded.

Wherein, the resonator is composed of an antenna connected with a capacitor.

Wherein, the signal adjustment circuit includes:

A timing shaping circuit, which is respectively connected to one end of the resonator to amplify and shape the radio frequency signal received by the resonator into a digital timing signal, and an output end to connect to the control calculation circuit to provide the control calculation circuit required timing signals;

A demodulation circuit, connected to an output terminal of the timing shaping circuit, used to demodulate the signal received by the antenna after amplification and shaping, and transmit the signal to the control calculation circuit;

A modulation circuit is connected with an output terminal of the timing shaping circuit, and is used for modulating the signal from a shift register, and then sending it out through the antenna.

Wherein, the control calculation circuit includes:

A control logic circuit, one input end of which is connected to the output end of the signal adjustment circuit and the rectification and charging circuit, receives the digital clock signal after the antenna has been amplified and shaped, and accepts the demodulated signal to perform logic calculation operations;

A logic circuit for storing data is connected with the control logic circuit for storing the data after logic calculation, and is connected with the shift register for storing the data after calculation and processing.

Wherein, the rectification and charging circuit includes at least two diodes, wherein the positive terminal of the first diode is connected to the negative terminal of the second diode, the positive terminal of the second diode is grounded, and the negative terminal of the first diode is respectively connected to a voltage The limiter is connected to a charging capacitor, and the other end of the charging capacitor is grounded.

Wherein, the radio frequency limiter is a Zener diode.

Wherein, the voltage limiter is a Zener diode, which is a DC voltage limiter on the rectification and charging circuit.

Compared with the prior art, the present invention has the following effects:

The main feature of the present invention is that the electromotive force generated by the AC magnetic field induced by the coil of the antenna will not be affected by the modulation switch of data transmission during the positive half cycle, so during the data transmission period, a certain rectification and charging efficiency can be maintained, and the positive half cycle The system timing signal extracted by signal shaping and amplification will not be interfered by the modulation signal, and the transmission of the data modulation signal is realized by controlling the voltage drop at both ends of the negative half cycle antenna, and the signal change ratio increases, so the transmission distance can be compared with the aforementioned existing The transmission distance of the technology is longer, and this circuit does not need an additional battery.

Brief description of the drawings:

Fig. 1 is a block diagram of a radio frequency circuit of a proximity identification tag used in the prior art.

Fig. 2: It is a block diagram of the radio frequency circuit of the identification mark proposed by the embodiment of the present invention.

FIG. 3 is a further circuit block diagram of the radio frequency circuit of the identification mark in FIG. 2 in the embodiment of the present invention.

FIG. 4A is a schematic diagram of the clock waveform of the signal from the high-frequency end of the antenna to the ground versus the time axis in an embodiment of the present invention.

Fig. 4B: A waveform diagram of a DC voltage source with stable efficiency obtained by performing half-wave rectification on the high-frequency end signal of the antenna.

FIG. 4C is a schematic diagram of a waveform of a system timing signal generated by timing shaping of an antenna high-frequency signal.

Fig. 4D: It is a schematic diagram of the voltage drop VL at both ends of the antenna coil, where the amplitude of the negative half-cycle part is suppressed only when the switch is turned on and grounded.

The circuit of the present invention is described in detail as follows in conjunction with accompanying drawings and embodiments:

The main feature of the identification mark radio frequency circuit of the present invention is that a rectifier diode with opposite polarity is respectively connected in series at both ends of the antenna, and the other ends of the two diodes are respectively lap-connected to the positive end and the ground end of a charging capacitor, wherein The positive end of one diode is connected to a reverse diode to the ground, and the negative end of the other diode is connected to a switch that can be controlled by a modulation signal to ground or not; and the principle of the present invention is that the electromotive force generated by the AC magnetic field induced by the antenna coil is in the positive direction. The half cycle will not be affected by the modulation switch of data transmission, so during the data transmission period, a certain rectification efficiency can be maintained, and the system timing signal obtained by shaping and amplifying the positive half cycle signal will not be interfered by the modulation signal, and the identification mark The modulated transmission of the radio frequency identification signal is accomplished by controlling the voltage drop at both ends of the negative half-circle antenna. Since the modulation range of the signal is increased, the transmission distance can be longer than that of the prior art.

Please refer to Fig. 2, Fig. 2 is the radio frequency circuit block diagram of the identification mark that the present embodiment proposes, wherein mainly comprises a resonator 32, and resonator 32 comprises an antenna 31 (shown in Fig. 3), and one end of resonator 32 is connected There is a rectification and charging circuit 10 which includes a diode 11 (as shown in FIG. 3 ) connected to one end of the antenna 31 of the resonator 32 to rectify the signal received by the antenna 31 . The other output end of the resonator 32 is connected with a signal adjustment circuit 60 for modifying the signal output by the antenna 31 into a waveform that can be processed by the demodulation and modulation circuit.

In addition, FIG. 2 includes a control calculation circuit 625, which is connected to the rectification and charging circuit 10 and the signal adjustment circuit 60 at the same time, to control the signal that has been shaped and to control the operation of the radio frequency identification tag circuit; a frequency divider 67, Connected to the output terminal of the signal adjustment circuit 60, in order to divide the frequency of the clock signal, one end of the frequency divider 67 is connected to the control calculation circuit 625, and accepts the control of the control calculation circuit 625; a shift register 66 is connected simultaneously In the frequency divider 67 and the control calculation circuit 625, the signal is temporarily stored and shifted, and then the signal is sent back to the signal adjustment circuit 60, and then the signal is modulated and then transmitted through the antenna 31.

In addition, the radio frequency identification tag circuit as shown in Figure 2 includes a radio frequency limiter 145, one end of which is connected to the rectification and charging circuit 10, and the other end is connected to the resonator 32, as an AC limiter, the signal of the antenna 31 can be Improve rectification and charging efficiency. On the other hand, the present invention is more suitable for connecting a modulation switch 51, one end of which is connected to the resonator 32, and the other end is directly grounded, and its switching action (i.e. ON/OFF), that is, whether it is grounded or not, is controlled by the signal adjustment circuit.

For further detailing the radio frequency identification tag circuit of the present invention, please refer to FIG. 3 , which is a further circuit block diagram of the radio frequency identification tag in accordance with FIG. 2 in the embodiment of the present invention. Among them, a resonator 32 is mainly disclosed, and an antenna 31 is connected in parallel with a capacitor to form a resonant circuit to perform signal resonance processing.

The signal adjustment circuit 60 shown in Figure 3 includes a timing shaping circuit 61, which is connected to one end of the resonator 32 at the same time, in order to amplify a radio frequency signal _f0 received by the resonator 32, and shape it into a digital level The timing signal provides the system of the entire identification mark circuit. In order not to be affected by the modulation signal, an output end of the timing shaping circuit 61 is connected to the control calculation circuit 625, so as to provide the required clock signal for the control calculation circuit 625. The signal adjustment circuit 60 further includes a demodulation circuit 63, which is connected to an output end of the timing shaping circuit 61 to demodulate the signal received by the antenna 31 after amplification and shaping, and then transmit the signal to the control Calculation circuit 625 . And it includes a modulation circuit 64 connected to the timing shaping circuit 61 and the shift register 66 for modulating the signal to be transmitted, and then sending it out through the antenna 31 of the resonator 32 .

The control calculation circuit 625 includes a control logic circuit 62 , one input terminal of which is connected to the output terminal of the signal adjustment circuit 60 and the rectification and charging circuit 10 , wherein the connection to the rectification and charging circuit 10 is a power supply signal supply control logic circuit 62 . The control logic circuit 62 receives the amplified and shaped digital clock signal from the antenna 31 and receives the demodulated signal to perform logic calculation operations, that is, to execute the operation procedure of the entire radio frequency identification tag connection circuit. The control calculation circuit 625 also includes a logic circuit 65 for storing data, which is connected with the control logic circuit 62 to store the data after logic calculation, and connected to the shift register 66, which can store the data after calculation and processing. Digital signal.

As shown in FIG. 3 , the rectifying and charging circuit 10 includes several diodes 11 and 13 , wherein the positive terminal of the diode 11 is connected to the negative terminal of another diode 13 , and the positive terminal of the diode 13 is grounded. The negative end of the diode 11 is respectively connected to a voltage limiter 12 and a charging capacitor 21 , the voltage limiter 12 is a Zener diode; one end of the charging capacitor 21 is grounded. In addition, the radio frequency limiter 145 in FIG. 3 is mainly composed of an AC limiter 15 connected with a diode 14, and the AC limiter is a Zener diode.

The main feature of the present invention is that a rectifier diode 11, 14 with opposite polarity is respectively connected in series at both ends of the antenna 31, and the other ends of the two diodes 11, 14 are lap-connected to the positive terminal of the charging capacitor 21 and grounded respectively. terminal, wherein the positive terminal of the diode 11 is connected in parallel with a diode 13 that is grounded at one end, and the negative terminal of the diode 14 is connected in parallel with a switch 51 that can be controlled by a modulation signal to ground or not, so that the electromotive force generated by the AC magnetic field induced by the coil of the antenna 31 is on the positive side. The half cycle is not affected by the modulation switch of the data transmission.

In order to illustrate the effects that the present invention can produce, it will be explained in conjunction with the relevant waveform diagrams disclosed in Figure 4: first, when the card reader sends a radio frequency signal and is received by the antenna 31 of the "identification mark circuit", a high-frequency HF signal is generated , as shown in Figure 4A, which is a schematic diagram of signal waveforms from one end of the antenna to the ground at the high-frequency end in this embodiment, regardless of whether the modulation signal controls the modulation switch 51 to an on or off state, it will not cause damage to the high-frequency HF signal. Influence. Therefore, half-wave rectification and charging of the high-frequency HF signal can obtain a DC voltage source with stable efficiency. This voltage source Vcc provides the power supply for the entire identification mark circuit. The signal waveform of the power supply is shown in Figure 4B, Figure 4B It is the waveform diagram obtained from the half-wave rectification and charging from the high-frequency end HF.

In addition, the timing shaping circuit 61 amplifies and shapes the radio frequency signal _f0 of the high-frequency end HF into a digital timing signal, which is used as the system timing signal of the entire identification mark circuit, and the signal will not be affected by the modulation signal. The timing signal is shown in FIG. 4C , and it can be seen from the figure that it will not be affected by the modulating signal. In addition, the shift register 66, the frequency divider 67, and the logic circuit 65 for storing data will sequentially send the data of the register or memory to the modulation circuit 64 according to a certain sequence, and through the modulation switch 51, the data from the antenna 31 transmits a radio frequency signal, and it is received by the card reader. If the card reader intends to write data to the identification mark, it modulates the radio frequency signal _f0 and then transmits it. After being received by the antenna 31 of the identification mark circuit, it is sent to the demodulation circuit 63 processing, and the control logic circuit 62 controls the operation of the entire "radio frequency identification tag".

As shown in Fig. 4D, it is a schematic waveform diagram of the voltage drop VL at both ends of the coil of the antenna 31, in which the amplitude of the negative half cycle is suppressed only when the modulating switch 51 is turned on and grounded, and it also shows that the modulating switch 51 has a corresponding waveform. The transmission of the data modulation signal in the present invention is accomplished by controlling the magnitude comparison of the negative half cycle of the voltage drop at both ends of the antenna. In other words, the circuit of the present invention uses the negative half cycle of electromagnetic waves to transmit signals, uses the positive half cycle to rectify and charge and generate system timing signals, and the opening and closing of the modulation switch 51 will only affect the signal of the negative half cycle, and will not affect the positive half cycle Periodic signal, so neither the rectification charging efficiency nor the system timing signal will be interfered by the modulation signal. Moreover, since the negative half cycle is affected by the modulation switch 51 and can generate a higher contrast antenna terminal voltage, the transmission distance of the circuit of the present invention is longer.

The above description is to illustrate the structural features of the present invention by means of preferred embodiments, and is not intended to limit the protection scope of the present invention.

Claims (16)

1. A radio frequency circuit for identifying marks, comprising: A resonator, including an antenna; It is characterized in that, also includes: A rectification and charging circuit, connected to the resonator, used to rectify the signal received by the antenna and charge it to a charge storage device; A signal adjustment circuit, electrically connected to the resonator, used to modify the signal output by the antenna into a time sequence signal for signal demodulation and modulation processing; A control calculation circuit, respectively connected to the rectification and charging circuit and the signal adjustment circuit, to control the reshaped and processed timing signal; A frequency divider, connected to the output end of the signal adjustment circuit, used to divide the timing signal into frequency, the input end of the frequency divider is connected to the control calculation circuit, and accepts the control of the control calculation circuit; A shift register is respectively connected to the frequency divider and the control calculation circuit, performs the signal temporary storage operation, transmits the signal to the signal adjustment circuit, and transmits the signal from the antenna after modulation processing. 2. The circuit according to claim 1, further comprising a radio frequency limiter, one end of which is connected to the rectification and charging circuit, and the other end is connected to the resonator. 3. The circuit according to claim 1, further comprising a modulation switch, one end of which is connected to the resonator and the signal adjustment circuit, and the other end is grounded. 4. The circuit according to claim 1, wherein the resonator is composed of an antenna connected in parallel with a capacitor. 5. The circuit according to claim 1, wherein the signal adjustment circuit comprises: A timing shaping circuit, which is respectively connected to one end of the resonator to amplify and shape the radio frequency signal received by the resonator into a digital timing signal, and an output end to connect to the control calculation circuit to provide the control calculation circuit required timing signals; A demodulation circuit, connected to an output terminal of the timing shaping circuit, used to demodulate the signal received by the antenna after amplification and shaping, and transmit the signal to the control calculation circuit; A modulation circuit is connected with an output terminal of the timing shaping circuit, and is used for modulating the signal from a shift register, and then sending it out through the antenna. 6. The circuit according to claim 5, wherein the control calculation circuit comprises: A control logic circuit, one input end of which is connected to the output end of the signal adjustment circuit and the rectification and charging circuit, receives the digital clock signal after the antenna has been amplified and shaped, and accepts the demodulated signal to perform logic calculation operations; A logic circuit for storing data is connected with the control logic circuit for storing the data after logic calculation, and is connected with the shift register for storing the data after calculation and processing. 7. The circuit according to claim 1, wherein the rectification and charging circuit comprises at least two diodes, wherein the positive terminal of the first diode is connected to the negative terminal of the second diode, and the positive terminal of the second diode is grounded, the negative end of the first diode is respectively connected to a voltage limiter and a charging capacitor, and the other end of the charging capacitor is grounded. 8. The circuit of claim 2, wherein said radio frequency limiter is a Zener diode. 9. The circuit according to claim 7, wherein the voltage limiter is a Zener diode, which is a DC voltage limiter on the rectification and charging circuit. 10. A radio frequency circuit for identifying marks, comprising: A resonator, including an antenna; It is characterized in that, also includes: The signal received by the antenna can be processed by resonance; A rectification and charging circuit, connected to the resonator, used to rectify the signal received by the antenna to the required power state; A signal adjustment circuit, connected to the output end of the resonator, used to modify the signal output by the resonator into a timing signal, and perform modulation/demodulation processing of output/input signals; A control calculation circuit, which is connected to the rectification and charging circuit and the signal adjustment circuit, to calculate and control the adjusted and processed signal, and to control the entire circuit; A frequency divider, connected to the output end of the signal adjustment circuit, used to divide the timing signal into frequency, and the other end of the frequency divider is connected to the control calculation circuit; A shift register, which is respectively connected to the frequency divider and the control calculation circuit, performs signal temporary storage and shift operations, transmits the signal to the signal adjustment circuit, and transmits it through the antenna after modulation; A radio frequency limiter, one end of which is connected to the rectification and charging circuit, and the other end is connected to the resonator, as an AC limiter; A modulation switch, one end of which is connected to the resonator and the other end is grounded, and its switching action is controlled by the signal adjustment circuit. 11. The circuit according to claim 10, wherein the antenna in the resonator is connected in parallel with a capacitor. 12. The circuit according to claim 10, wherein the signal adjustment circuit comprises: A timing shaping circuit, connected to the resonator, for amplifying and shaping the radio frequency signal received by the resonator into a digital timing signal; A demodulation circuit, connected to an output end of the timing shaping circuit, used to demodulate the signal received by the antenna and send it to the control calculation circuit; A modulation circuit is connected to an output terminal of the timing shaping circuit, and is used for modulating the signal to be transmitted, and then transmitting it through the antenna of the resonator. 13. The circuit according to claim 10, wherein the control calculation circuit comprises: A control logic circuit, one input end of which is connected to the output end of the signal adjustment circuit and the rectification and charging circuit, receives the reshaped digital timing signal, and accepts the demodulated signal to perform logic calculation operations; A logic circuit for storing data is connected with the control logic circuit for storing the data after logic calculation, and is connected with the shift register for storing the data after calculation and processing. 14. The circuit according to claim 10, characterized in that the rectification and charging circuit includes at least two diodes, wherein the positive terminal of the first diode is connected to the negative terminal of the second diode, and the negative terminal of the second diode The negative terminal is grounded, the negative terminal of the first diode is respectively connected to a voltage limiter and a charging capacitor, and one end of the charging capacitor is grounded. 15. The circuit according to claim 10, wherein the radio frequency limiter is a Zener diode for limiting AC signals. 16. The circuit according to claim 14, wherein the voltage limiter is a Zener diode, which is a DC voltage limiter on the rectification and charging circuit.

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