CN113764456B - LED chip light source and preparation method thereof - Google Patents
LED chip light source and preparation method thereof Download PDFInfo
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Abstract
本发明提供了一种LED芯片光源及其制备方法,在形成LED晶圆之后,利用晶圆级键合工艺将所述LED晶圆键合至一柔性布线晶圆上,令所述LED晶圆的LED功能层与所述柔性布线晶圆的第二表面贴合,再去除所述LED晶圆的衬底并在所述LED功能层中形成划片槽即可定义出单个的芯片区;沿所述划片槽可将所述柔性布线晶圆裁剪为预定的形状和尺寸,形成若干包含至少一个所述芯片区的LED芯片光源,裁剪后的所述柔性布线晶圆构成所述LED芯片光源的柔性基底,如此每个所述LED芯片光源均具备柔性,容易弯曲和折叠,避免将LED芯片制备好后再转移至柔性电路基板上产生的不良率高、效率低、返修率高及成本高等问题,使利用Mini/Micro LED芯片制备柔性显示屏具备量产可行性。
The present invention provides an LED chip light source and a preparation method thereof. After forming an LED wafer, the LED wafer is bonded to a flexible wiring wafer by using a wafer-level bonding process, so that the LED functional layer of the LED wafer is bonded to the second surface of the flexible wiring wafer, and then the substrate of the LED wafer is removed and a scribe groove is formed in the LED functional layer to define a single chip area; the flexible wiring wafer can be cut into a predetermined shape and size along the scribe groove to form a plurality of LED chip light sources including at least one chip area, and the cut flexible wiring wafer constitutes a flexible substrate of the LED chip light source, so that each of the LED chip light sources is flexible and easy to bend and fold, avoiding the problems of high defective rate, low efficiency, high rework rate and high cost caused by transferring the prepared LED chip to a flexible circuit substrate, so that the preparation of flexible display screens using Mini/Micro LED chips has mass production feasibility.
Description
技术领域Technical Field
本发明涉及半导体制备技术领域,尤其涉及一种LED芯片光源及其制备方 法。The present invention relates to the field of semiconductor manufacturing technology, and in particular to an LED chip light source and a manufacturing method thereof.
背景技术Background technique
目前能够用于量产的柔性显示屏的光源只有OLED(Organic Light-EmittingDiode,有机发光二极管)光源,该光源主要有以下几个缺点:1)亮度低,功 率小,屏幕不能做很大;2)光衰大,易烧屏,寿命短;3)投资成本高,价格 贵;4)技术门槛高,目前只掌握在三星等少数厂家手里。Currently, the only light source that can be used for mass production of flexible display screens is OLED (Organic Light-Emitting Diode), which has the following main disadvantages: 1) low brightness, low power, and the screen cannot be made very large; 2) large light decay, easy screen burn-in, and short life; 3) high investment cost and expensive price; 4) high technical threshold, currently only in the hands of a few manufacturers such as Samsung.
另一方面,利用Mini/Micro LED芯片制作显示屏(非柔性显示屏)的概念 火爆,但是都很难实现量产,归结原因还是芯片面积太小,要制作一块完整的 显示屏需要大量的时间把Mini/Micro LED芯片巨量转移到电路基板上去进行封 装。目前芯片巨量转移的效率非常低,且转移位置易偏移,导致不良率高、返修率高及成本高等问题,设备机台能力也达不到要求的精度,基本不具备量产 的可行性。若想要利用Mini/Micro LED芯片制备出柔性显示屏,则需要把 Mini/Micro LED芯片巨量转移到柔性电路基板上,因柔性电路基板易变形、难 固定,做出柔性显示屏更是难上加难。On the other hand, the concept of using Mini/Micro LED chips to make display screens (non-flexible display screens) is very popular, but it is difficult to achieve mass production. The reason is that the chip area is too small. To make a complete display screen, it takes a lot of time to transfer a large number of Mini/Micro LED chips to the circuit substrate for packaging. At present, the efficiency of mass chip transfer is very low, and the transfer position is easy to shift, resulting in high defective rate, high repair rate and high cost. The equipment and machine capabilities cannot meet the required accuracy, and it is basically not feasible to mass produce. If you want to use Mini/Micro LED chips to make flexible display screens, you need to transfer a large number of Mini/Micro LED chips to flexible circuit substrates. Because flexible circuit substrates are easy to deform and difficult to fix, it is even more difficult to make flexible display screens.
发明内容Summary of the invention
本发明的目的在于提供一种LED芯片光源及其制备方法,以解决目前难以 利用Mini/Micro LED量产柔性显示屏的问题。The purpose of the present invention is to provide an LED chip light source and a method for preparing the same, so as to solve the problem that it is currently difficult to mass-produce flexible display screens using Mini/Micro LEDs.
为了达到上述目的,本发明提供了一种LED芯片光源的制备方法,包括:In order to achieve the above object, the present invention provides a method for preparing an LED chip light source, comprising:
提供衬底,在所述衬底上形成LED功能层,所述衬底与所述LED功能层构 成LED晶圆;Providing a substrate, forming an LED functional layer on the substrate, wherein the substrate and the LED functional layer constitute an LED wafer;
将所述LED晶圆键合至一柔性布线晶圆上,且所述LED功能层与所述柔性 布线晶圆的第二表面贴合;Bonding the LED wafer to a flexible wiring wafer, and laminating the LED functional layer to the second surface of the flexible wiring wafer;
去除所述衬底,并在所述LED功能层中形成划片槽,以定义出单个的芯片 区;以及,removing the substrate and forming scribe lines in the LED functional layer to define individual chip regions; and,
沿所述划片槽将所述柔性布线晶圆裁剪为预定的形状和尺寸,以形成若干 包含至少一个所述芯片区的LED芯片光源,裁剪后的所述柔性布线晶圆构成所 述LED芯片光源的柔性基底。The flexible wiring wafer is cut into a predetermined shape and size along the scribe line to form a plurality of LED chip light sources including at least one chip area. The cut flexible wiring wafer constitutes a flexible substrate of the LED chip light source.
可选的,所述LED芯片光源包含的所述芯片区的数量相同或不相同。Optionally, the number of chip areas included in the LED chip light source is the same or different.
可选的,所述LED芯片光源的形状相同或不相同。Optionally, the shapes of the LED chip light sources are the same or different.
可选的,所述LED芯片光源的尺寸相同或不相同。Optionally, the sizes of the LED chip light sources are the same or different.
可选的,所述LED功能层为倒装结构的LED功能层,所述LED芯片光源 为倒装结构的LED芯片光源。Optionally, the LED functional layer is an LED functional layer of a flip-chip structure, and the LED chip light source is an LED chip light source of a flip-chip structure.
可选的,所述倒装结构的LED功能层包括外延层、凹槽、反射镜层及若干 电极组;在所述衬底上形成所述倒装结构的LED功能层的步骤包括:Optionally, the LED functional layer of the flip-chip structure includes an epitaxial layer, a groove, a reflector layer and a plurality of electrode groups; and the steps of forming the LED functional layer of the flip-chip structure on the substrate include:
在所述衬底上形成所述外延层,所述外延层包括顺次设置于所述衬底上的 第一半导体层、发光层及第二半导体层;forming the epitaxial layer on the substrate, wherein the epitaxial layer comprises a first semiconductor layer, a light emitting layer and a second semiconductor layer which are sequentially arranged on the substrate;
刻蚀所述外延层以形成所述凹槽,所述凹槽从所述第二半导体层的第一表 面延伸至所述第一半导体层中;Etching the epitaxial layer to form the groove, wherein the groove extends from the first surface of the second semiconductor layer into the first semiconductor layer;
在所述第二半导体层的部分第一表面上形成所述反射镜层;以及,forming the reflector layer on a portion of the first surface of the second semiconductor layer; and,
在所述反射镜层上形成所述电极组,每个所述电极组均包括两个相互绝缘 的电极,两个所述电极分别与所述第一半导体层及所述第二半导体层电性连接。The electrode groups are formed on the reflector layer, and each of the electrode groups includes two electrodes insulated from each other, and the two electrodes are electrically connected to the first semiconductor layer and the second semiconductor layer respectively.
可选的,所述倒装结构的LED功能层还包括第一绝缘层及第一开口;形成 所述凹槽之后,形成所述反射镜层之前,形成所述倒装结构的LED功能层的步 骤还包括:Optionally, the LED functional layer of the flip-chip structure further includes a first insulating layer and a first opening; after forming the groove and before forming the reflector layer, the step of forming the LED functional layer of the flip-chip structure further includes:
在所述第二半导体层上以及所述凹槽的内壁上形成所述第一绝缘层,所述 第一绝缘层具有所述第一开口,一部分所述第一开口露出所述凹槽底部的部分 所述第一半导体层,另一部分所述第一开口露出部分所述第二半导体层;以及,forming the first insulating layer on the second semiconductor layer and the inner wall of the groove, wherein the first insulating layer has the first opening, a portion of the first opening exposes a portion of the first semiconductor layer at the bottom of the groove, and another portion of the first opening exposes a portion of the second semiconductor layer; and
形成所述反射镜层时,将所述反射镜层形成于露出部分所述第二半导体层 的所述第一开口中。When forming the reflector layer, the reflector layer is formed in the first opening that exposes a portion of the second semiconductor layer.
可选的,所述倒装结构的LED功能层还包括电流扩展层及连接金属层;形 成所述反射镜层之后,形成所述电极组之前,形成所述倒装结构的LED功能层 的步骤还包括:Optionally, the LED functional layer of the flip-chip structure further includes a current spreading layer and a connecting metal layer; after forming the reflector layer and before forming the electrode group, the step of forming the LED functional layer of the flip-chip structure further includes:
在所述反射镜层上形成所述电流扩展层,所述电流扩展层通过所述反射镜 层与所述第二半导体层电性连接;forming the current spreading layer on the reflector layer, wherein the current spreading layer is electrically connected to the second semiconductor layer through the reflector layer;
在所述电流扩展层上及所述凹槽中形成所述连接金属层,所述连接金属层 与所述第一半导体层电性连接,所述连接金属层与所述电流扩展层彼此电性隔 离;以及,forming the connection metal layer on the current spreading layer and in the groove, the connection metal layer being electrically connected to the first semiconductor layer, and the connection metal layer and the current spreading layer being electrically isolated from each other; and
两个所述电极中的一个通过所述电流扩展层与所述第二半导体层电性连 接,另一个通过所述连接金属层与所述第一半导体层电性连接。One of the two electrodes is electrically connected to the second semiconductor layer through the current spreading layer, and the other is electrically connected to the first semiconductor layer through the connecting metal layer.
可选的,所述倒装结构的LED功能层还包括第二绝缘层及第二开口;形成 所述电流扩展层之后,形成所述连接金属层之前,形成所述倒装结构的LED功 能层的步骤还包括:Optionally, the LED functional layer of the flip-chip structure further includes a second insulating layer and a second opening; after forming the current spreading layer and before forming the connecting metal layer, the step of forming the LED functional layer of the flip-chip structure further includes:
在所述第一绝缘层及所述电流扩展层上形成所述第二绝缘层,其中,所述 第二绝缘层中具有所述第二开口,一部分所述第二开口与一部分所述第一开口 连通以露出部分所述第一半导体层,另一部分所述第二开口露出部分所述电流 扩展层;以及,forming the second insulating layer on the first insulating layer and the current spreading layer, wherein the second insulating layer has the second opening, a portion of the second opening is connected to a portion of the first opening to expose a portion of the first semiconductor layer, and another portion of the second opening exposes a portion of the current spreading layer; and
形成所述连接金属层时,将所述连接金属层形成于所述第二绝缘层上并填 充连通的所述第一开口及所述第二开口。When forming the connection metal layer, the connection metal layer is formed on the second insulating layer and fills the connected first opening and the second opening.
可选的,所述倒装结构的LED功能层还包括第三绝缘层及第三开口;形成 所述连接金属层之后,形成所述电极组之前,形成所述倒装结构的LED功能层 的步骤还包括:Optionally, the LED functional layer of the flip-chip structure further includes a third insulating layer and a third opening; after forming the connecting metal layer and before forming the electrode group, the step of forming the LED functional layer of the flip-chip structure further includes:
在所述第二绝缘层及所述连接金属层上形成所述第三绝缘层,所述第三绝 缘层中具有所述第三开口,一部分所述第三开口与一部分所述第二开口连通以 露出部分所述电流扩展层,另一部分所述第三开口露出部分所述连接金属层。The third insulating layer is formed on the second insulating layer and the connecting metal layer. The third insulating layer has the third opening. A part of the third opening is connected with a part of the second opening to expose a part of the current spreading layer, and another part of the third opening exposes a part of the connecting metal layer.
可选的,两个所述电极均形成于所述第三绝缘层上,且一个所述电极填充 连通的所述第二开口及所述第三开口,以与所述电流扩展层电性连接;另一个 所述电极填充剩余的所述第三开口,以与所述连接金属层电性连接。Optionally, both electrodes are formed on the third insulating layer, and one electrode fills the connected second opening and the third opening to be electrically connected to the current spreading layer; the other electrode fills the remaining third opening to be electrically connected to the connecting metal layer.
可选的,刻蚀所述第一半导体层以形成贯穿所述第一半导体层的所述划片 槽,沿所述划片槽裁剪所述柔性布线晶圆之前,弯曲所述柔性布线晶圆,以使 所述第一绝缘层、第二绝缘层及第三绝缘层自所述划片槽处断裂。Optionally, the first semiconductor layer is etched to form the scribe groove penetrating the first semiconductor layer, and before the flexible wiring wafer is cut along the scribe groove, the flexible wiring wafer is bent so that the first insulating layer, the second insulating layer and the third insulating layer are broken at the scribe groove.
可选的,所述倒装结构的LED功能层包括外延层、凹槽、绝缘反射层及若 干电极组;在所述衬底上形成所述倒装结构的LED功能层的步骤包括:Optionally, the LED functional layer of the flip-chip structure includes an epitaxial layer, a groove, an insulating reflective layer and a plurality of electrode groups; the steps of forming the LED functional layer of the flip-chip structure on the substrate include:
在所述衬底上形成所述外延层,所述外延层包括顺次设置于所述衬底上的 第一半导体层、发光层及第二半导体层;forming the epitaxial layer on the substrate, wherein the epitaxial layer comprises a first semiconductor layer, a light emitting layer and a second semiconductor layer which are sequentially arranged on the substrate;
刻蚀所述外延层以形成所述凹槽,所述凹槽从所述第二半导体层的第一表 面延伸至所述第一半导体层中;Etching the epitaxial layer to form the groove, wherein the groove extends from the first surface of the second semiconductor layer into the first semiconductor layer;
在所述第二半导体层上形成所述绝缘反射层,所述绝缘反射层填充所述凹 槽;以及,forming the insulating reflective layer on the second semiconductor layer, wherein the insulating reflective layer fills the groove; and
在所述绝缘反射层上形成所述电极组,每个所述电极组均包括两个相互绝 缘的电极,两个所述电极均穿过所述绝缘反射层并分别与所述第一半导体层及 所述第二半导体层电性连接。The electrode groups are formed on the insulating reflective layer, each of the electrode groups includes two mutually insulated electrodes, and the two electrodes pass through the insulating reflective layer and are electrically connected to the first semiconductor layer and the second semiconductor layer respectively.
可选的,所述倒装结构的LED功能层还包括两个第一层金属;在所述第二 半导体层上形成所述绝缘反射层之前,形成所述倒装结构的LED功能层的步骤 还包括:Optionally, the LED functional layer of the flip-chip structure further includes two first metal layers; before forming the insulating reflective layer on the second semiconductor layer, the step of forming the LED functional layer of the flip-chip structure further includes:
分别在所述凹槽底部的所述第一半导体层上以及所述第二半导体层上形成 一个所述第一层金属,两个所述第一层金属分别与所述第一半导体层和所述第 二半导体层电性连接;以及,forming one first layer of metal on the first semiconductor layer and the second semiconductor layer at the bottom of the groove, respectively, and the two first layers of metal are electrically connected to the first semiconductor layer and the second semiconductor layer, respectively; and
在所述绝缘反射层上形成所述电极组之后,两个所述电极均穿过所述绝缘 反射层并分别与一个所述第一层金属电性连接。After the electrode group is formed on the insulating reflective layer, the two electrodes pass through the insulating reflective layer and are electrically connected to one of the first metal layers respectively.
可选的,所述倒装结构的LED功能层还包括电流阻挡层及电流扩展层;形 成所述第一层金属之前,形成所述倒装结构的LED功能层的步骤还包括:Optionally, the LED functional layer of the flip-chip structure further includes a current blocking layer and a current spreading layer; before forming the first metal layer, the step of forming the LED functional layer of the flip-chip structure further includes:
在所述第二半导体层的部分第一表面上形成所述电流阻挡层;以及forming the current blocking layer on a portion of the first surface of the second semiconductor layer; and
在所述第二半导体层的至少部分第一表面及所述电流阻挡层上形成所述电 流扩展层。The current spreading layer is formed on at least a portion of the first surface of the second semiconductor layer and the current blocking layer.
可选的,刻蚀所述第一半导体层以形成贯穿所述第一半导体层的所述划片 槽,沿所述划片槽裁剪所述柔性布线晶圆之前,弯曲所述柔性布线晶圆,以使 所述绝缘反射层自所述划片槽处断裂。Optionally, the first semiconductor layer is etched to form the scribe groove penetrating the first semiconductor layer, and before the flexible wiring wafer is cut along the scribe groove, the flexible wiring wafer is bent so that the insulating reflective layer is broken at the scribe groove.
可选的,所述LED功能层为垂直结构的LED功能层,所述LED芯片光源 为垂直结构的LED芯片光源。Optionally, the LED functional layer is a vertically structured LED functional layer, and the LED chip light source is a vertically structured LED chip light source.
可选的,所述垂直结构的LED功能层包括外延层、反射镜层、两个绝缘保 护层及若干电极组;在所述衬底上形成所述垂直结构的LED功能层的步骤包括:Optionally, the vertically structured LED functional layer comprises an epitaxial layer, a reflector layer, two insulating protective layers and a plurality of electrode groups; and the steps of forming the vertically structured LED functional layer on the substrate comprise:
在所述衬底上形成所述外延层,所述外延层包括顺次设置于所述衬底上的 第一半导体层、发光层及第二半导体层;forming the epitaxial layer on the substrate, wherein the epitaxial layer comprises a first semiconductor layer, a light emitting layer and a second semiconductor layer which are sequentially arranged on the substrate;
在所述第二半导体层的部分第一表面上形成所述反射镜层;forming the reflector layer on a portion of the first surface of the second semiconductor layer;
在所述第二半导体层上以及所述反射镜层上形成第一绝缘保护层;forming a first insulating protection layer on the second semiconductor layer and the reflector layer;
在所述第一绝缘保护层上形成所述电极组中的一个电极,所述一个电极穿 过所述第一绝缘保护层并与所述第二半导体层电性连接;forming one electrode in the electrode group on the first insulating protective layer, wherein the one electrode passes through the first insulating protective layer and is electrically connected to the second semiconductor layer;
在所述LED功能层中形成所述划片槽之后,在所述第一半导体层以及所述 柔性布线晶圆的第二表面形成第二绝缘保护层;以及,After forming the scribe groove in the LED functional layer, forming a second insulating protection layer on the first semiconductor layer and the second surface of the flexible wiring wafer; and,
在所述第二绝缘保护层上形成所述电极组中的另一个电极,所述另一个电 极的一端穿过所述第二绝缘保护层与所述第一半导体层电性连接,另一端延伸 至所述划片槽内,并穿过所述划片槽底部的所述第二绝缘保护层与所述柔性布 线晶圆电性连接。Another electrode in the electrode group is formed on the second insulating protective layer, one end of the other electrode passes through the second insulating protective layer to be electrically connected to the first semiconductor layer, and the other end extends into the scribe groove and passes through the second insulating protective layer at the bottom of the scribe groove to be electrically connected to the flexible wiring wafer.
可选的,所述垂直结构的LED功能层还包括金属保护层;形成所述反射镜 层之后,形成所述第一绝缘保护层之前,形成所述垂直结构的LED功能层的步 骤还包括:Optionally, the vertical structure LED functional layer further includes a metal protective layer; after forming the reflector layer and before forming the first insulating protective layer, the step of forming the vertical structure LED functional layer further includes:
在所述第二半导体层的至少部分第一表面及所述反射镜层上形成所述金属 保护层。The metal protection layer is formed on at least a portion of the first surface of the second semiconductor layer and the reflector layer.
可选的,刻蚀所述外延层及所述第一绝缘保护层以形成贯穿所述外延层及 所述第一绝缘保护层的所述划片槽;或者,刻蚀所述外延层以形成贯穿所述外 延层的所述划片槽,然后弯曲所述第一绝缘保护层,以使所述第一绝缘保护层 自所述划片槽处断裂;以及,Optionally, the epitaxial layer and the first insulating protective layer are etched to form the scribe groove penetrating the epitaxial layer and the first insulating protective layer; or, the epitaxial layer is etched to form the scribe groove penetrating the epitaxial layer, and then the first insulating protective layer is bent to break the first insulating protective layer at the scribe groove; and,
沿所述划片槽裁剪所述柔性布线晶圆之前,弯曲所述柔性布线晶圆,以使 所述第二绝缘保护层自所述划片槽处断裂。Before cutting the flexible wiring wafer along the scribe line, the flexible wiring wafer is bent so that the second insulating protection layer is broken at the scribe line.
可选的,所述电极的材料均为键合金属材料,利用所有所述电极将所述LED 晶圆键合至所述柔性布线晶圆上。Optionally, the materials of the electrodes are all bonding metal materials, and the LED wafer is bonded to the flexible wiring wafer using all the electrodes.
可选的,所述键合金属材料包括金、锡、镍、银及铜中的至少两种。Optionally, the bonding metal material includes at least two of gold, tin, nickel, silver and copper.
可选的,将所述LED晶圆键合至所述柔性布线晶圆上之前,还包括:Optionally, before bonding the LED wafer to the flexible wiring wafer, the method further includes:
将所述柔性布线晶圆固定在一支撑晶圆上;以及,fixing the flexible wiring wafer on a supporting wafer; and,
在裁剪所述柔性布线晶圆之前,将所述柔性布线晶圆与所述支撑晶圆分离。Before cutting the flexible wiring wafer, the flexible wiring wafer is separated from the supporting wafer.
可选的,将所述柔性布线晶圆固定在所述支撑晶圆上的步骤包括:Optionally, the step of fixing the flexible wiring wafer on the supporting wafer includes:
在所述支撑晶圆上形成一粘合层,通过所述粘合层将所述柔性布线晶圆固 定在所述支撑晶圆上;当所述粘合层的材料为金属材料时,采用研磨工艺去除 所述支撑晶圆及所述粘合层,以将所述柔性布线晶圆与所述支撑晶圆分离;当 所述粘合层的材料为有机胶材时,采用有机清洗溶剂分解所述粘合层,以将所 述柔性布线晶圆与所述支撑晶圆分离。An adhesive layer is formed on the support wafer, and the flexible wiring wafer is fixed on the support wafer through the adhesive layer; when the material of the adhesive layer is a metal material, a grinding process is used to remove the support wafer and the adhesive layer to separate the flexible wiring wafer from the support wafer; when the material of the adhesive layer is an organic adhesive material, an organic cleaning solvent is used to decompose the adhesive layer to separate the flexible wiring wafer from the support wafer.
可选的,所述支撑晶圆的厚度大于或等于250μm。Optionally, the thickness of the supporting wafer is greater than or equal to 250 μm.
可选的,所述支撑晶圆为含硅晶圆或蓝宝石晶圆。Optionally, the supporting wafer is a silicon-containing wafer or a sapphire wafer.
可选的,所述柔性布线晶圆的第二表面具有金属布线层,将所述柔性布线 晶圆的第一表面固定在所述支撑晶圆上,并将所述LED功能层与所述柔性布线 晶圆的第二表面贴合。Optionally, the second surface of the flexible wiring wafer has a metal wiring layer, the first surface of the flexible wiring wafer is fixed on the supporting wafer, and the LED functional layer is bonded to the second surface of the flexible wiring wafer.
可选的,所述金属布线层包括若干布线区,每个所述布线区内均具有至少 一条金属线,将所述LED晶圆键合至所述柔性布线晶圆上之后,一个所述芯片 区对准一个所述布线区,每个所述芯片区对应的电极分别与对应的所述布线区 的金属线电性连接。Optionally, the metal wiring layer includes a plurality of wiring areas, each of which has at least one metal wire. After the LED wafer is bonded to the flexible wiring wafer, one chip area is aligned with one wiring area, and the electrodes corresponding to each chip area are electrically connected to the metal wires of the corresponding wiring area.
可选的,所述柔性布线晶圆的材料为柔性玻璃、硅胶或环氧树脂或含氧化 硅的柔性高分子聚合物。Optionally, the material of the flexible wiring wafer is flexible glass, silicone or epoxy resin or a flexible high molecular polymer containing silicon oxide.
可选的,采用激光剥离工艺或研磨工艺去除所述衬底。Optionally, the substrate is removed by a laser lift-off process or a grinding process.
可选的,去除所述衬底之后,还包括:Optionally, after removing the substrate, the method further includes:
采用碱性溶液对所述LED功能层的所述第一半导体层的第二表面进行粗 化。The second surface of the first semiconductor layer of the LED functional layer is roughened using an alkaline solution.
本发明还提供一种LED芯片光源,包括:The present invention also provides an LED chip light source, comprising:
柔性基底,具有预定的形状和尺寸;以及,a flexible substrate having a predetermined shape and size; and,
LED功能层,具有电极面,所述LED功能层位于所述柔性基底上且所述电 极面与所述柔性基底贴合,所述LED功能层包括至少一个芯片区。The LED functional layer has an electrode surface. The LED functional layer is located on the flexible substrate and the electrode surface is attached to the flexible substrate. The LED functional layer includes at least one chip area.
可选的,所述LED芯片光源为倒装结构的LED芯片光源,所述LED功能 层为倒装结构的LED功能层。Optionally, the LED chip light source is an LED chip light source with a flip-chip structure, and the LED functional layer is an LED functional layer with a flip-chip structure.
可选的,所述倒装结构的LED功能层包括:Optionally, the LED functional layer of the flip-chip structure includes:
外延层,包括由上至下依次设置的第一半导体层、发光层及第二半导体层;The epitaxial layer includes a first semiconductor layer, a light emitting layer and a second semiconductor layer arranged in sequence from top to bottom;
凹槽,位于所述外延层中,并从所述第二半导体层的第一表面延伸至所述 第一半导体层中;a groove located in the epitaxial layer and extending from the first surface of the second semiconductor layer into the first semiconductor layer;
反射镜层,形成于所述第二半导体层的第一表面并覆盖部分所述第二半导 体层;以及,a reflector layer formed on the first surface of the second semiconductor layer and covering a portion of the second semiconductor layer; and
电极组,形成于所述反射镜层的第一表面,包括两个相互绝缘的电极,两 个所述电极分别与所述第一半导体层及所述第二半导体层电性连接,所述电极的第一表面为所述电极面。The electrode group is formed on the first surface of the reflector layer, and includes two electrodes insulated from each other. The two electrodes are electrically connected to the first semiconductor layer and the second semiconductor layer respectively, and the first surface of the electrode is the electrode surface.
可选的,所述倒装结构的LED功能层还包括:Optionally, the LED functional layer of the flip-chip structure further includes:
电流扩展层,形成于所述反射镜层的第一表面,并通过所述反射镜层与所 述第二半导体层电性连接;a current spreading layer, formed on the first surface of the reflector layer and electrically connected to the second semiconductor layer through the reflector layer;
连接金属层,形成于所述电流扩展层的第一表面并填充所述凹槽,以与所 述第一半导体层电性连接,所述连接金属层与所述电流扩展层彼此电性隔离; 以及,a connecting metal layer, formed on the first surface of the current spreading layer and filling the groove to be electrically connected to the first semiconductor layer, the connecting metal layer and the current spreading layer being electrically isolated from each other; and
两个所述电极中的一个通过所述电流扩展层与所述第二半导体层电性连 接,另一个通过所述连接金属层与所述第一半导体层电性连接。One of the two electrodes is electrically connected to the second semiconductor layer through the current spreading layer, and the other is electrically connected to the first semiconductor layer through the connecting metal layer.
可选的,所述倒装结构的LED功能层还包括:Optionally, the LED functional layer of the flip-chip structure further includes:
第一绝缘层,形成于所述第二半导体层的第一表面并覆盖所述凹槽的内壁, 所述第一绝缘层具有第一开口,一部分所述第一开口露出所述凹槽底部的部分 所述第一半导体层,另一部分所述第一开口露出部分所述第二半导体层,所述 反射镜层位于露出部分所述第二半导体层的所述第一开口中。A first insulating layer is formed on the first surface of the second semiconductor layer and covers the inner wall of the groove. The first insulating layer has a first opening. A portion of the first opening exposes a portion of the first semiconductor layer at the bottom of the groove, and another portion of the first opening exposes a portion of the second semiconductor layer. The reflector layer is located in the first opening that exposes a portion of the second semiconductor layer.
可选的,所述倒装结构的LED功能层还包括:Optionally, the LED functional layer of the flip-chip structure further includes:
第二绝缘层,形成于所述第一绝缘层及所述电流扩展层的第一表面,以电 性隔离所述电流扩展层与所述连接金属层,其中,所述第二绝缘层中具有第二 开口,一部分所述第二开口与一部分所述第一开口连通以露出部分所述第一半 导体层,另一部分所述第二开口露出部分所述电流扩展层。A second insulating layer is formed on the first surface of the first insulating layer and the current spreading layer to electrically isolate the current spreading layer from the connecting metal layer, wherein the second insulating layer has a second opening, a portion of the second opening is connected to a portion of the first opening to expose a portion of the first semiconductor layer, and another portion of the second opening exposes a portion of the current spreading layer.
可选的,所述连接金属层形成于所述第二绝缘层的第一表面并填充连通的 所述第一开口及所述第二开口,以与所述第一半导体层电性连接。Optionally, the connecting metal layer is formed on the first surface of the second insulating layer and fills the connected first opening and the second opening to be electrically connected to the first semiconductor layer.
可选的,所述倒装结构的LED功能层还包括:Optionally, the LED functional layer of the flip-chip structure further includes:
第三绝缘层,形成于所述第二绝缘层及所述连接金属层的第一表面,以电 性隔离两个所述电极,其中,所述第三绝缘层中具有第三开口,一部分所述第 三开口与一部分所述第二开口连通以露出部分所述电流扩展层,另一部分所述 第三开口露出部分所述连接金属层。A third insulating layer is formed on the first surface of the second insulating layer and the connecting metal layer to electrically isolate the two electrodes, wherein the third insulating layer has a third opening, a portion of the third opening is connected to a portion of the second opening to expose a portion of the current spreading layer, and another portion of the third opening exposes a portion of the connecting metal layer.
可选的,两个所述电极均位于所述第三绝缘层的第一表面,且一个所述电 极填充连通的所述第二开口及所述第三开口,以与所述电流扩展层电性连接; 另一个所述电极填充剩余的所述第三开口,以与所述连接金属层电性连接。Optionally, both electrodes are located on the first surface of the third insulating layer, and one electrode fills the connected second opening and the third opening to be electrically connected to the current spreading layer; the other electrode fills the remaining third opening to be electrically connected to the connecting metal layer.
可选的,所述倒装结构的LED功能层包括:Optionally, the LED functional layer of the flip-chip structure includes:
外延层,所述外延层包括由上至下依次设置的第一半导体层、发光层及第 二半导体层;An epitaxial layer, wherein the epitaxial layer comprises a first semiconductor layer, a light-emitting layer and a second semiconductor layer arranged in sequence from top to bottom;
凹槽,所述凹槽从所述第二半导体层的第一表面延伸至所述第一半导体层 中;a groove extending from the first surface of the second semiconductor layer into the first semiconductor layer;
绝缘反射层,形成于所述第二半导体层的第一表面并填充所述凹槽;以及,an insulating reflective layer, formed on the first surface of the second semiconductor layer and filling the groove; and
电极组,形成于所述绝缘反射层的第一表面,每个所述电极组均包括两个 相互绝缘的电极,两个所述电极均穿过所述绝缘反射层并分别与所述第一半导 体层及所述第二半导体层电性连接,所述电极的第一表面为所述电极面。An electrode group is formed on the first surface of the insulating reflective layer, each of the electrode groups includes two electrodes insulated from each other, both of the two electrodes pass through the insulating reflective layer and are electrically connected to the first semiconductor layer and the second semiconductor layer respectively, and the first surface of the electrode is the electrode surface.
可选的,所述倒装结构的LED功能层还包括:Optionally, the LED functional layer of the flip-chip structure further includes:
两个第一层金属,分别形成于所述凹槽底部的所述第一半导体层以及所述 第二半导体层的第一表面,两个所述第一层金属分别与所述第一半导体层和所 述第二半导体层电性连接;以及,Two first metal layers are respectively formed on the first semiconductor layer at the bottom of the groove and the first surface of the second semiconductor layer, and the two first metal layers are respectively electrically connected to the first semiconductor layer and the second semiconductor layer; and
两个所述电极均穿过所述绝缘反射层并分别与一个所述第一层金属电性连 接。The two electrodes both pass through the insulating reflective layer and are electrically connected to one of the first metal layers respectively.
可选的,所述倒装结构的LED功能层还包括:Optionally, the LED functional layer of the flip-chip structure further includes:
电流阻挡层,形成于所述第二半导体层的部分第一表面;以及a current blocking layer formed on a portion of the first surface of the second semiconductor layer; and
电流扩展层,形成于所述第二半导体层的至少部分第一表面及所述电流阻 挡层的第一表面。A current spreading layer is formed on at least a portion of the first surface of the second semiconductor layer and the first surface of the current blocking layer.
可选的,所述LED芯片光源为垂直结构的LED芯片光源,所述LED功能 层为垂直结构的LED功能层。Optionally, the LED chip light source is a vertically structured LED chip light source, and the LED functional layer is a vertically structured LED functional layer.
可选的,所述垂直结构的LED功能层包括:Optionally, the vertically structured LED functional layer includes:
外延层,包括由上至下依次设置的第一半导体层、发光层及第二半导体层;The epitaxial layer includes a first semiconductor layer, a light emitting layer and a second semiconductor layer arranged in sequence from top to bottom;
反射镜层,形成于所述第二半导体层的部分第一表面上;a reflector layer formed on a portion of the first surface of the second semiconductor layer;
两个绝缘保护层,其中,第一绝缘保护层形成于所述第二半导体层以及所 述反射镜层的第一表面,第二绝缘保护层形成于所述第一半导体层的第二表面 及所述柔性布线晶圆露出的第二表面;Two insulating protective layers, wherein a first insulating protective layer is formed on the second semiconductor layer and the first surface of the reflector layer, and a second insulating protective layer is formed on the second surface of the first semiconductor layer and the exposed second surface of the flexible wiring wafer;
若干电极组,所述电极组中的一个电极形成于所述第一绝缘保护层的第一 表面,并穿过所述第一绝缘保护层与所述第二半导体层电性连接,所述电极组 中的另一个电极形成于所述第二绝缘保护层的第二表面,且两端穿过所述第二 绝缘保护层分别与所述第一半导体层及所述柔性布线晶圆电性连接,所述一个 电极及所述另一个电极的第一表面为所述电极面。A plurality of electrode groups, wherein one electrode in the electrode group is formed on the first surface of the first insulating protective layer and is electrically connected to the second semiconductor layer through the first insulating protective layer, another electrode in the electrode group is formed on the second surface of the second insulating protective layer, and two ends thereof are electrically connected to the first semiconductor layer and the flexible wiring wafer respectively through the second insulating protective layer, and the first surfaces of the one electrode and the other electrode are the electrode surfaces.
可选的,所述垂直结构的LED功能层还包括:Optionally, the vertically structured LED functional layer further includes:
金属保护层,形成于所述第二半导体层的至少部分第一表面及所述反射镜 层的第一表面。A metal protection layer is formed on at least a portion of the first surface of the second semiconductor layer and the first surface of the reflector layer.
可选的,所述柔性基底的第二表面具有金属布线层,所述电极面与所述柔 性基底的第二表面贴合。Optionally, the second surface of the flexible substrate has a metal wiring layer, and the electrode surface is attached to the second surface of the flexible substrate.
可选的,所述金属布线层包括至少一个布线区,每个所述布线区内均具有 至少一条金属线,一个所述芯片区对准一个所述布线区,每个所述芯片区对应 的电极分别与对应的所述布线区的金属线电性连接。Optionally, the metal wiring layer includes at least one wiring area, each wiring area has at least one metal wire, one chip area is aligned with one wiring area, and electrodes corresponding to each chip area are electrically connected to the metal wires of the corresponding wiring area.
可选的,所述柔性基底的材料为柔性玻璃、硅胶或环氧树脂或含氧化硅的 柔性高分子聚合物。Optionally, the material of the flexible substrate is flexible glass, silica gel or epoxy resin or a flexible high molecular polymer containing silicon oxide.
在本发明提供的LED芯片光源及其制备方法中,在形成LED晶圆之后,利 用晶圆级键合工艺将所述LED晶圆键合至一柔性布线晶圆上,令所述LED晶圆 的LED功能层与所述柔性布线晶圆的第二表面贴合,再去除所述LED晶圆的衬 底并在所述LED功能层中形成划片槽即可定义出单个的芯片区;沿所述划片槽 可将所述柔性布线晶圆裁剪为预定的形状和尺寸,形成若干包含至少一个所述 芯片区的LED芯片光源,可制备出多种形状和尺寸的LED芯片光源,裁剪后的 所述柔性布线晶圆构成所述LED芯片光源的柔性基底,如此每个所述LED芯片 光源均具备柔性,容易弯曲和折叠,避免将LED芯片制备好后再转移至柔性电路基板上产生的不良率高、效率低、返修率高及成本高等问题,使利用 Mini/Micro LED芯片制备柔性显示屏具备量产可行性。In the LED chip light source and the preparation method thereof provided by the present invention, after forming an LED wafer, the LED wafer is bonded to a flexible wiring wafer by using a wafer-level bonding process, so that the LED functional layer of the LED wafer is bonded to the second surface of the flexible wiring wafer, and then the substrate of the LED wafer is removed and a scribe groove is formed in the LED functional layer to define a single chip area; the flexible wiring wafer can be cut into a predetermined shape and size along the scribe groove to form a plurality of LED chip light sources including at least one chip area, and LED chip light sources of various shapes and sizes can be prepared. The cut flexible wiring wafer constitutes a flexible substrate of the LED chip light source, so that each of the LED chip light sources is flexible and easy to bend and fold, avoiding the problems of high defective rate, low efficiency, high rework rate and high cost caused by transferring the prepared LED chip to the flexible circuit substrate, so that the preparation of flexible display screens using Mini/Micro LED chips has mass production feasibility.
进一步的,本发明提供的柔性LED芯片光源的单位面积亮度比OLED高数 倍,并且可以做大尺寸屏,具有光衰极小、不烧屏、寿命长、成本低的优点。Furthermore, the brightness per unit area of the flexible LED chip light source provided by the present invention is several times higher than that of OLED, and can be made into large-size screens. It has the advantages of extremely low light decay, no screen burn-in, long life and low cost.
附图说明BRIEF DESCRIPTION OF THE DRAWINGS
图1为本发明实施例一提供的LED芯片光源的制备方法的流程图;FIG1 is a flow chart of a method for preparing an LED chip light source provided in Embodiment 1 of the present invention;
图2~图18为本发明实施例一提供的倒装结构的LED芯片光源的制备方法 的相应步骤的结构示意图;2 to 18 are schematic structural diagrams of corresponding steps of a method for preparing a flip-chip LED chip light source provided in Embodiment 1 of the present invention;
图19~图29为本发明实施例二提供的倒装结构的LED芯片光源的制备方法 的相应步骤的结构示意图;19 to 29 are schematic structural diagrams of corresponding steps of a method for preparing a flip-chip LED chip light source according to a second embodiment of the present invention;
图30~图39为本发明实施例三提供的垂直结构的LED芯片光源的制备方法 的相应步骤的结构示意图;30 to 39 are schematic structural diagrams of corresponding steps of a method for preparing a vertically structured LED chip light source provided in Embodiment 3 of the present invention;
其中,附图标记为:Wherein, the accompanying drawings are marked as follows:
100-衬底;200-外延层;201-第一半导体层;202-发光层;203-第二半导体 层;200a-凹槽;300-电流阻挡层;301-第一绝缘层;302-第二绝缘层;303-第三 绝缘层;304-第一绝缘保护层;305-第二绝缘保护层;400、405-反射镜层;401- 绝缘反射层;403-第四开口;404-第五开口;406-金属保护层;500-电流扩展层; 501-电流扩展层;502-连接金属层;503-第一层N金属;504-第一层P金属;60- 芯片区;600-电极;601-第一电极;602-第二电极;700-划片槽;80-布线区;801- 第一金属线;802-第二金属线;100-substrate; 200-epitaxial layer; 201-first semiconductor layer; 202-light emitting layer; 203-second semiconductor layer; 200a-groove; 300-current blocking layer; 301-first insulating layer; 302-second insulating layer; 303-third insulating layer; 304-first insulating protection layer; 305-second insulating protection layer; 400, 405-reflector layer; 401-insulating reflective layer; 403-fourth opening; 404-fifth opening; 406-metal protection layer; 500-current spreading layer; 501-current spreading layer; 502-connecting metal layer; 503-first layer of N metal; 504-first layer of P metal; 60-chip area; 600-electrode; 601-first electrode; 602-second electrode; 700-slice groove; 80-wiring area; 801-first metal line; 802-second metal line;
001-支撑晶圆;002-柔性布线晶圆;012-柔性基底;003-粘合层;004-LED 晶圆。001-support wafer; 002-flexible wiring wafer; 012-flexible substrate; 003-adhesive layer; 004-LED wafer.
具体实施方式Detailed ways
下面将结合示意图对本发明的具体实施方式进行更详细的描述。根据下列 描述,本发明的优点和特征将更清楚。需说明的是,附图均采用非常简化的形 式且均使用非精准的比例,仅用以方便、明晰地辅助说明本发明实施例的目 的。The specific embodiments of the present invention will be described in more detail below in conjunction with the schematic diagrams. The advantages and features of the present invention will become more apparent from the following description. It should be noted that the drawings are all in a very simplified form and are not in exact proportions, and are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention.
实施例一Embodiment 1
图18为本实施例提供的LED芯片光源的结构示意图。如图18所示,所述 LED芯片光源包括柔性基底012及LED功能层,所述柔性基底012具有预定的 形状和尺寸,所述LED功能层位于所述柔性基底012上,且所述LED功能层包 含至少一个芯片区。Fig. 18 is a schematic diagram of the structure of the LED chip light source provided in this embodiment. As shown in Fig. 18, the LED chip light source includes a flexible substrate 012 and an LED functional layer, the flexible substrate 012 has a predetermined shape and size, the LED functional layer is located on the flexible substrate 012, and the LED functional layer includes at least one chip area.
请参阅图15,本实施例中,所述LED功能层仅包含一个所述芯片区60, 但并不以此为限,在其他实施例中,所述LED功能层还可以包含多个所述芯片 区60,如此一来,所述LED芯片光源可以是任何可能的形状和尺寸,适用范围 非常广泛。Please refer to Figure 15. In this embodiment, the LED functional layer only includes one chip area 60, but it is not limited to this. In other embodiments, the LED functional layer can also include multiple chip areas 60. In this way, the LED chip light source can be of any possible shape and size, and has a very wide range of applications.
进一步地,所述柔性基底012的第二表面具有金属布线层,所述LED功能 层与所述柔性基底012的第二表面贴合,相当于将所述LED功能层与所述金属 布线层贴合。所述金属布线层包括至少一个布线区80,每个所述布线区内均具 有至少一条金属线,一个所述芯片区60对准一个所述布线区80,每个所述芯片区60对应的电极分别与对应的所述布线区80的金属线电性连接。Furthermore, the second surface of the flexible substrate 012 has a metal wiring layer, and the LED functional layer is bonded to the second surface of the flexible substrate 012, which is equivalent to bonding the LED functional layer to the metal wiring layer. The metal wiring layer includes at least one wiring area 80, each of which has at least one metal wire, one chip area 60 is aligned with one wiring area 80, and the electrodes corresponding to each chip area 60 are electrically connected to the metal wires of the corresponding wiring area 80.
本实施例中,所述布线区80内均具有两条金属线,分别为第一金属线801 和第二金属线802,所述芯片区60对应两个电极,分别为第一电极601和第二 电极602,所述第一电极601与所述第一金属线801电性连接,所述第二电极 602与所述第二金属线802电性连接。In this embodiment, the wiring area 80 has two metal wires, namely the first metal wire 801 and the second metal wire 802. The chip area 60 corresponds to two electrodes, namely the first electrode 601 and the second electrode 602. The first electrode 601 is electrically connected to the first metal wire 801, and the second electrode 602 is electrically connected to the second metal wire 802.
进一步地,所述柔性基底012的材料为柔性玻璃、硅胶或环氧树脂或含氧 化硅的柔性高分子聚合物,如此可使所述LED芯片光源均具备柔性,容易弯曲 和折叠。Furthermore, the material of the flexible substrate 012 is flexible glass, silicone or epoxy resin or a flexible high molecular polymer containing silicon oxide, so that the LED chip light source is flexible and easy to bend and fold.
具体而言,本实施例中,所述LED芯片光源为倒装结构的LED芯片光源, 所述LED功能层为倒装结构的LED功能层。Specifically, in this embodiment, the LED chip light source is an LED chip light source with a flip-chip structure, and the LED functional layer is an LED functional layer with a flip-chip structure.
请参阅图10,所述倒装结构的LED功能层包括外延层200、凹槽200a、反 射镜层400、电流扩展层501、连接金属层502、第一绝缘层301、第二绝缘层301、第三绝缘层303、第一开口、第二开口、第三开口及电极组。Please refer to Figure 10, the LED functional layer of the flip-chip structure includes an epitaxial layer 200, a groove 200a, a reflector layer 400, a current spreading layer 501, a connecting metal layer 502, a first insulating layer 301, a second insulating layer 301, a third insulating layer 303, a first opening, a second opening, a third opening and an electrode group.
具体而言,所述外延层200包括由下至上依次设置的第一半导体层201、发 光层202和第二半导体层203。本实施例中,所述外延层200中的第一半导体层201为N型半导体层,所述第一半导体层201的材料为N-GaN;所述发光层202 为多周期量子阱层(MQWS),量子阱层的材料为AlN、GaN、AlGaN、InGaN、 AlInGaN中的任意一种或几种的结合;所述第二半导体层203为P型半导体层, 所述第二半导体层203的材料为P-GaN。Specifically, the epitaxial layer 200 includes a first semiconductor layer 201, a light-emitting layer 202, and a second semiconductor layer 203 arranged in sequence from bottom to top. In this embodiment, the first semiconductor layer 201 in the epitaxial layer 200 is an N-type semiconductor layer, and the material of the first semiconductor layer 201 is N-GaN; the light-emitting layer 202 is a multi-period quantum well layer (MQWS), and the material of the quantum well layer is any one or a combination of AlN, GaN, AlGaN, InGaN, and AlInGaN; the second semiconductor layer 203 is a P-type semiconductor layer, and the material of the second semiconductor layer 203 is P-GaN.
本实施例中,所述外延层200的总厚度为5μm~10μm。In this embodiment, the total thickness of the epitaxial layer 200 is 5 μm to 10 μm.
进一步地,所述凹槽200a位于所述外延层200中,所述凹槽200a从所述第 二半导体层203的第一表面贯穿所述发光层202并延伸至所述第一半导体层201 中,所述凹槽200a构成了MESA台阶,所述MESA台阶的上台阶面为所述第 二半导体层203,下台阶面为所述第一半导体层201,上台阶面和下台阶面之间 连接形成MESA台阶侧面。Furthermore, the groove 200a is located in the epitaxial layer 200, and the groove 200a passes through the light-emitting layer 202 from the first surface of the second semiconductor layer 203 and extends into the first semiconductor layer 201. The groove 200a constitutes a MESA step, and the upper step surface of the MESA step is the second semiconductor layer 203, and the lower step surface is the first semiconductor layer 201. The upper step surface and the lower step surface are connected to form a MESA step side surface.
请继续参阅图10,所述第一绝缘层301覆盖所述凹槽200a的侧壁及部分底 面,并且还横向延伸至覆盖部分所述第二半导体层203的第一表面,也就是说, 所述第一绝缘层301覆盖所述MESA台阶侧面、部分上台阶面以及部分下台阶 面,暴露出部分所述第一半导体层201和部分所述第二半导体层203。或者也可 以理解为,所述第一绝缘层301覆盖所述第二半导体层203及所述凹槽200a的 内壁,并且,所述第一绝缘层301中形成有若干第一开口,一部分所述第一开 口位于所述凹槽200a内,以露出所述凹槽200a底部的部分所述第一半导体层 201,另一部分所述第一开口位于所述第二半导体层203上,以露出部分所述第二半导体层203。Please continue to refer to FIG. 10 , the first insulating layer 301 covers the sidewalls and part of the bottom surface of the groove 200a, and also extends laterally to cover part of the first surface of the second semiconductor layer 203, that is, the first insulating layer 301 covers the side surface of the MESA step, part of the upper step surface and part of the lower step surface, exposing part of the first semiconductor layer 201 and part of the second semiconductor layer 203. Alternatively, it can be understood that the first insulating layer 301 covers the second semiconductor layer 203 and the inner wall of the groove 200a, and a plurality of first openings are formed in the first insulating layer 301, a portion of the first openings are located in the groove 200a to expose part of the first semiconductor layer 201 at the bottom of the groove 200a, and another portion of the first openings are located on the second semiconductor layer 203 to expose part of the second semiconductor layer 203.
本实施例中,所述第一绝缘层301的厚度为10nm~10μm。所述第一绝缘层 301的材料包括氧化硅、氮化硅及DBR中的至少一种。第一绝缘层301的作用 是预先保护MESA台阶侧面,免于MESA台阶侧面长期暴露在空气中受污染, 从而避免开启电压VFin和/或漏电流IR失效。In this embodiment, the thickness of the first insulating layer 301 is 10nm-10μm. The material of the first insulating layer 301 includes at least one of silicon oxide, silicon nitride and DBR. The function of the first insulating layer 301 is to protect the side of the MESA step in advance, so as to prevent the side of the MESA step from being contaminated by long-term exposure to the air, thereby avoiding the failure of the turn-on voltage VFin and/or the leakage current IR.
所述反射镜层400形成于所述第二半导体层203的第一表面,且位于露出 部分所述第二半导体层203的所述第一开口中,且所述反射镜层400覆盖所述 第一开口露出的所述第二半导体层203的第一表面,如此一来,所述反射镜层 400即可与所述第二半导体层203电性连接。所述反射镜层400具有反光作用, 可将所述发光层202发出的光中射向所述第二半导体层203的那部分光反射回 去。所述反射镜层400包括银(Ag)、铝(Al)及ITO中的一种或多种,本实施 例中,所述反射镜层400为银层。The reflector layer 400 is formed on the first surface of the second semiconductor layer 203 and is located in the first opening that exposes a portion of the second semiconductor layer 203. The reflector layer 400 covers the first surface of the second semiconductor layer 203 exposed by the first opening, so that the reflector layer 400 can be electrically connected to the second semiconductor layer 203. The reflector layer 400 has a light-reflecting effect and can reflect back the portion of light emitted by the light-emitting layer 202 that is directed toward the second semiconductor layer 203. The reflector layer 400 includes one or more of silver (Ag), aluminum (Al) and ITO. In this embodiment, the reflector layer 400 is a silver layer.
本实施例中,所述反射镜层400的厚度为100nm~2μm,所述反射镜层400 距离MESA台阶侧面之间具有0um~6um的间距,也就是说,所述反射镜层400 距离MESA台阶侧面具有0um~6um的横向间隔,与现有技术中的反射镜层400 距离MESA台阶侧面的大间隔相比,本实施例由于预先设置了第一绝缘层301, 因此不再需要考虑MESA台阶的污染问题,所以反射镜层400距MESA台阶的 侧面的距离可以大大缩小,也就是本申请的反射镜层400的面积可以做的更大, 那么此时反光的效果会更好。In this embodiment, the thickness of the reflector layer 400 is 100nm~2μm, and the reflector layer 400 has a spacing of 0um~6um from the side of the MESA step, that is, the reflector layer 400 has a lateral spacing of 0um~6um from the side of the MESA step. Compared with the large spacing between the reflector layer 400 and the side of the MESA step in the prior art, since the first insulating layer 301 is pre-set in this embodiment, there is no need to consider the contamination problem of the MESA step, so the distance between the reflector layer 400 and the side of the MESA step can be greatly reduced, that is, the area of the reflector layer 400 of the present application can be made larger, and then the reflection effect will be better.
所述电流扩展层501形成于所述反射镜层400的第一表面,覆盖所述反射 镜层400和部分所述第一绝缘层301的第一表面,并通过所述反射镜层400与 所述第二半导体层203电性连接,所述电流扩展层501作为P层电流扩展层。 本实施例中,所述电流扩展层501完全覆盖所述反射镜层400从而对所述反射镜层400起到保护作用,防止发生电子迁移引起的漏电。所述电流扩展层501 的材料包括钛(Ti)、铂(Pt)、铝(Al)、镍(Ni)、铬(Cr)及金(Au)中的一 种或多种。所述电流扩展层501除了保护所述反射镜层400之外,还具有电流整面扩展的作用,因此对其厚度有要求,太薄电流扩展不好,优选地,所述电 流扩展层501的厚度为0.5μm~3μm。The current spreading layer 501 is formed on the first surface of the reflector layer 400, covers the first surface of the reflector layer 400 and part of the first insulating layer 301, and is electrically connected to the second semiconductor layer 203 through the reflector layer 400. The current spreading layer 501 serves as a P-layer current spreading layer. In this embodiment, the current spreading layer 501 completely covers the reflector layer 400, thereby protecting the reflector layer 400 and preventing leakage caused by electron migration. The material of the current spreading layer 501 includes one or more of titanium (Ti), platinum (Pt), aluminum (Al), nickel (Ni), chromium (Cr) and gold (Au). In addition to protecting the reflector layer 400, the current spreading layer 501 also has the function of spreading the current over the entire surface, so there is a requirement for its thickness. If it is too thin, the current spreading is not good. Preferably, the thickness of the current spreading layer 501 is 0.5μm to 3μm.
作为可选实施例,所述电流扩展层501也可以仅位于所述反射镜层400的 第一表面并覆盖所述反射镜层400的第一表面,所述第一绝缘层301的第一表 面可以没有所述电流扩展层501。As an optional embodiment, the current spreading layer 501 may also be located only on the first surface of the reflector layer 400 and cover the first surface of the reflector layer 400, and the first surface of the first insulating layer 301 may not have the current spreading layer 501.
所述第二绝缘层302位于所述第一绝缘层301和所述电流扩展层501的第 一表面。或者也可以理解为,所述第二绝缘层302覆盖所述电流扩展层501并 延伸至所述凹槽200a中覆盖所述第一绝缘层301的第一表面。所述第二绝缘层 302具有若干第二开口,一部分所述第二开口位于所述凹槽200a中,并与所述 凹槽200a中的第一开口连通,以露出所述凹槽200a底部的部分所述第一半导体层201,另一部分所述第二开口位于所述电流扩展层501的第一表面,以露出所 述部分所述电流扩展层501。The second insulating layer 302 is located on the first surface of the first insulating layer 301 and the current spreading layer 501. Alternatively, it can be understood that the second insulating layer 302 covers the current spreading layer 501 and extends into the groove 200a to cover the first surface of the first insulating layer 301. The second insulating layer 302 has a plurality of second openings, a portion of the second openings is located in the groove 200a and communicates with the first opening in the groove 200a to expose a portion of the first semiconductor layer 201 at the bottom of the groove 200a, and another portion of the second openings is located on the first surface of the current spreading layer 501 to expose the portion of the current spreading layer 501.
本实施例中,所述第二绝缘层302的厚度为10nm~10μm。所述第二绝缘层 302的材料包括氧化硅、氮化硅及DBR中的至少一种。由于所述第一绝缘层301 预先保护了MESA台阶侧面,所以所述第二绝缘层302的作用为绝缘保护所述 电流扩展层501。In this embodiment, the thickness of the second insulating layer 302 is 10nm-10μm. The material of the second insulating layer 302 includes at least one of silicon oxide, silicon nitride and DBR. Since the first insulating layer 301 protects the side of the MESA step in advance, the second insulating layer 302 serves to insulate and protect the current spreading layer 501.
所述连接金属层502位于所述第二绝缘层302的第一表面。所述连接金属 层502覆盖部分所述第二绝缘层302的第一表面并填充连通的第一开口和第二 开口,并覆盖所述第一开口和所述第二开口露出的部分所述第一半导体层201。 应理解,所述连接金属层502也相当于填充了所述凹槽200a,从而与所述第一 半导体层201电性连接。The connection metal layer 502 is located on the first surface of the second insulating layer 302. The connection metal layer 502 covers a portion of the first surface of the second insulating layer 302 and fills the connected first opening and the second opening, and covers the portion of the first semiconductor layer 201 exposed by the first opening and the second opening. It should be understood that the connection metal layer 502 is equivalent to filling the groove 200a, so as to be electrically connected to the first semiconductor layer 201.
本实施例中,所述连接金属层502的材料包括钛(Ti)、铂(Pt)、铝(Al)、 镍(Ni)、铬(Cr)及金(Au)中的一种或多种。相似的,所述连接金属层502 具有电流整面扩展的作用,因此对其厚度有要求,太薄电流扩展不好,优选地, 所述连接金属层502的厚度为0.5μm~3μm。In this embodiment, the material of the connection metal layer 502 includes one or more of titanium (Ti), platinum (Pt), aluminum (Al), nickel (Ni), chromium (Cr) and gold (Au). Similarly, the connection metal layer 502 has the function of spreading the current over the entire surface, so there is a requirement for its thickness. If it is too thin, the current will not spread well. Preferably, the thickness of the connection metal layer 502 is 0.5μm to 3μm.
所述第三绝缘层303位于所述连接金属层502及所述第二绝缘层302的第 一表面。所述第三绝缘层303中具有若干第三开口,一部分所述第三开口连通 露出部分所述电流扩展层501的第二开口,另一部分所述第三开口露出部分所 述连接金属层502。所述第三绝缘层303可以将所述连接金属层502与后续形成 的第二电极602电性隔离,防止用于扩展N电流的连接金属层502与用于输入 P电流的所述第二电极602之间短路,同时,所述第三绝缘层303还可以保护器 件的侧面及部分表面。The third insulating layer 303 is located on the first surface of the connection metal layer 502 and the second insulating layer 302. The third insulating layer 303 has a plurality of third openings, a portion of the third openings are connected to the second openings that expose a portion of the current spreading layer 501, and another portion of the third openings expose a portion of the connection metal layer 502. The third insulating layer 303 can electrically isolate the connection metal layer 502 from the second electrode 602 formed subsequently, to prevent a short circuit between the connection metal layer 502 used to spread the N current and the second electrode 602 used to input the P current, and at the same time, the third insulating layer 303 can also protect the side and a portion of the surface of the device.
本实施例中,所述第三绝缘层303的厚度为10nm~10μm,所述第三绝缘层 303的材料包括氧化硅、氮化硅及DBR中的至少一种。In this embodiment, the thickness of the third insulating layer 303 is 10 nm to 10 μm, and the material of the third insulating layer 303 includes at least one of silicon oxide, silicon nitride and DBR.
所述电极组包括第一电极601和第二电极602,所述第一电极601及所述第 二电极602均位于所述第三绝缘层303的第一表面。所述第一电极601覆盖部 分所述第三绝缘层303的第一表面并填充露出所述连接金属层502的第三开口, 所述第二电极602覆盖部分所述第三绝缘层303的第一表面并填充连通的第三 开口及第二开口。如此一来,所述第一电极601可以通过所述连接金属层502 与所述第一半导体层201电性连接,所述第二电极602可以通过所述电流扩展 层501与所述第二半导体层203电性连接。The electrode group includes a first electrode 601 and a second electrode 602, and the first electrode 601 and the second electrode 602 are both located on the first surface of the third insulating layer 303. The first electrode 601 covers a portion of the first surface of the third insulating layer 303 and fills the third opening exposing the connecting metal layer 502, and the second electrode 602 covers a portion of the first surface of the third insulating layer 303 and fills the connected third opening and the second opening. In this way, the first electrode 601 can be electrically connected to the first semiconductor layer 201 through the connecting metal layer 502, and the second electrode 602 can be electrically connected to the second semiconductor layer 203 through the current spreading layer 501.
所述第一电极601和第二电极602之间相隔一定的距离实现电性隔离。本 实施例中,所述第一电极601和第二电极602之间相隔的距离为10μm~300μm。The first electrode 601 and the second electrode 602 are electrically isolated from each other by a certain distance. In this embodiment, the distance between the first electrode 601 and the second electrode 602 is 10 μm to 300 μm.
本实施例中,所述第一电极601和所述第二电极602的厚度为0.1μm~10μm。 本实施例中,所述第一电极601和所述第二电极602的材料均为键合金属材料, 以便于后续的键合工艺,所述键合金属材料可以是金(Au)、锡(Sn)、镍(Ni)、 银(Ag)及铜(Cu)中的至少两种金属构成,例如,所述键合金属材料可以是 AuSn、NiSn或者SnAgCu等。In this embodiment, the thickness of the first electrode 601 and the second electrode 602 is 0.1 μm to 10 μm. In this embodiment, the materials of the first electrode 601 and the second electrode 602 are both bonding metal materials, so as to facilitate the subsequent bonding process. The bonding metal material can be composed of at least two metals of gold (Au), tin (Sn), nickel (Ni), silver (Ag) and copper (Cu). For example, the bonding metal material can be AuSn, NiSn or SnAgCu.
从图18中可见,所述第一电极601和所述第二电极602的第一表面作为所 述LED功能层的电极面与所述柔性布线晶圆002的第二表面贴合。As can be seen from FIG. 18 , the first surfaces of the first electrode 601 and the second electrode 602 serve as electrode surfaces of the LED functional layer and are bonded to the second surface of the flexible wiring wafer 002.
图1为本实施例提供的LED芯片光源的制备方法的流程图。如图1所示, 所述LED芯片光源的制备方法包括:FIG1 is a flow chart of a method for preparing an LED chip light source provided in this embodiment. As shown in FIG1 , the method for preparing an LED chip light source includes:
步骤S100:提供衬底,在所述衬底上形成LED功能层,所述衬底与所述 LED功能层构成LED晶圆;Step S100: providing a substrate, forming an LED functional layer on the substrate, wherein the substrate and the LED functional layer constitute an LED wafer;
步骤S200:将所述LED晶圆键合至一柔性布线晶圆上,且所述LED功能 层与所述柔性布线晶圆的第二表面贴合;Step S200: bonding the LED wafer to a flexible wiring wafer, and laminating the LED functional layer to the second surface of the flexible wiring wafer;
步骤S300:去除所述衬底,并在所述LED功能层中形成划片槽,以定义出 单个的芯片区;以及,Step S300: removing the substrate and forming a scribe groove in the LED functional layer to define a single chip area; and
步骤S400:沿所述划片槽将所述柔性布线晶圆裁剪为预定的形状和尺寸, 以形成若干包含至少一个所述芯片区的LED芯片光源,裁剪后的所述柔性布线 晶圆构成所述LED芯片光源的柔性基底。Step S400: cutting the flexible wiring wafer into a predetermined shape and size along the scribe line to form a plurality of LED chip light sources including at least one chip area, and the cut flexible wiring wafer constitutes a flexible substrate of the LED chip light source.
本实施例中,所述LED芯片光源为倒装结构的LED芯片光源,图2至图 18示出了本实施例提供的倒装结构的LED芯片光源的制备方法的相应步骤的结 构示意图。接下来,将以倒装结构的LED芯片光源为例结合图2至图18对本 实施例提供的LED芯片光源的制备方法进行详细说明。In this embodiment, the LED chip light source is a flip-chip LED chip light source, and Figures 2 to 18 show the structural schematic diagrams of the corresponding steps of the method for preparing the flip-chip LED chip light source provided by this embodiment. Next, the method for preparing the LED chip light source provided by this embodiment will be described in detail by taking the flip-chip LED chip light source as an example in combination with Figures 2 to 18.
请参阅图2,执行步骤S100,提供衬底100,并在所述衬底100上形成LED 功能层。Referring to FIG. 2 , step S100 is performed to provide a substrate 100 and form an LED functional layer on the substrate 100 .
本实施例中,所述衬底100为高透光蓝宝石衬底(Al2O3),作为可选实施例, 所述衬底100还可以是硅(Si)、碳化硅(SiC)、氮化镓(GaN)或氧化锌(ZnO)等衬底。 进一步地,所述衬底100为图形化衬底(Patterned Sapphire Substrates,PSS),例 如是微米级/纳米级图形化蓝宝石衬底。在所述衬底100的上形成所述倒装结构的LED功能层。In this embodiment, the substrate 100 is a high-transmittance sapphire substrate (Al 2 O 3 ). As an optional embodiment, the substrate 100 may also be a substrate such as silicon (Si), silicon carbide (SiC), gallium nitride (GaN) or zinc oxide (ZnO). Further, the substrate 100 is a patterned substrate (Patterned Sapphire Substrates, PSS), such as a micron-scale/nanoscale patterned sapphire substrate. The LED functional layer of the flip-chip structure is formed on the substrate 100 .
首先,请继续参阅图2,在所述衬底100上形成外延层200,所述外延层200 包括由下向上顺次设置的第一半导体层201、发光层202和第二半导体层203。First, please continue to refer to FIG. 2 . An epitaxial layer 200 is formed on the substrate 100 . The epitaxial layer 200 includes a first semiconductor layer 201 , a light emitting layer 202 , and a second semiconductor layer 203 arranged in sequence from bottom to top.
形成所述外延层200的方式例如是:使用标准的光刻工艺在所述衬底100 上刻蚀出图形,然后利用ICP蚀刻技术刻蚀所述衬底100以对所述衬底100进 行图案化,用来提高发光效率。进一步地,可以通过诸如金属化学气相沉积、 激光辅助分子束外延、氢化物气相外延、蒸镀等任意一种外延技术在所述衬底 100上制作所述外延层200,并且,所述外延层200可以是多晶结构或单晶结构。The epitaxial layer 200 is formed by, for example, etching a pattern on the substrate 100 using a standard photolithography process, and then etching the substrate 100 using an ICP etching technique to pattern the substrate 100 to improve the light-emitting efficiency. Further, the epitaxial layer 200 can be formed on the substrate 100 by any epitaxial technique such as metal chemical vapor deposition, laser-assisted molecular beam epitaxy, hydride vapor phase epitaxy, evaporation, etc., and the epitaxial layer 200 can be a polycrystalline structure or a single crystal structure.
请参阅图3,以周期性的间隔对所述外延层200进行部分刻蚀以形成周期性 的凹槽200a,所述凹槽200a贯穿所述第二半导体层203和所述发光层202并延 伸至所述第一半导体层201中。Referring to FIG. 3 , the epitaxial layer 200 is partially etched at periodic intervals to form periodic grooves 200a. The grooves 200a penetrate the second semiconductor layer 203 and the light emitting layer 202 and extend into the first semiconductor layer 201.
具体而言,形成所述凹槽200a的步骤包括:通过光刻工艺,制作出发光区 MESA图形,用ICP(感应等离子耦合刻蚀设备)对所述外延层200进行刻蚀以形 成所述凹槽200a,刻蚀的深度需要超过所述发光层202,并暴露出所述第一半 导体层201,从侧面来看是蚀刻出平台(MESA),形成MESA台阶。Specifically, the steps of forming the groove 200a include: making a light-emitting area MESA pattern through a photolithography process, etching the epitaxial layer 200 with ICP (inductively coupled plasma etching equipment) to form the groove 200a, the etching depth needs to exceed the light-emitting layer 202, and expose the first semiconductor layer 201, and from the side view, a platform (MESA) is etched to form a MESA step.
本实施例中,所述凹槽200a为一个或多个,多个所述凹槽200a可以具有周 期性的间隔,所述周期性的间隔例如为10μm~300μm,所述凹槽200a的深度为 1μm~2μm,所述凹槽200a的宽度为20μm~100μm。In this embodiment, there are one or more grooves 200a, and the grooves 200a may have a periodic interval, and the periodic interval is, for example, 10μm to 300μm, the depth of the groove 200a is 1μm to 2μm, and the width of the groove 200a is 20μm to 100μm.
请参阅图4,在所述MESA台阶侧面、部分上台阶面和部分下台阶面上形 成第一绝缘层301。所述第一绝缘层301的具体形成步骤可以是:通过PECVD(Plasma EnhancedChemical Vapor Deposition,等离子体增强化学气相沉 积法)形成第一绝缘材料层(图4中未示出),然后采用正光刻胶制作出掩模,用 ICP(感应等离子耦合刻蚀设备)对所述第一绝缘材料层进行刻蚀或者使用BOE 溶液或用HF溶液对所述第一绝缘材料层进行腐蚀,形成若干第一开口,一部分 第一开口暴露出部分所述第一半导体层201,另一部分第一开口暴露出部分所述 第二半导体层203,剩余的第一绝缘材料层构成所述第一绝缘层301。Please refer to Fig. 4, a first insulating layer 301 is formed on the side surface, part of the upper step surface and part of the lower step surface of the MESA step. The specific steps of forming the first insulating layer 301 may be: forming a first insulating material layer (not shown in Fig. 4) by PECVD (Plasma Enhanced Chemical Vapor Deposition), then making a mask with a positive photoresist, etching the first insulating material layer with ICP (Inductively Coupled Plasma Etching Equipment) or corroding the first insulating material layer with a BOE solution or an HF solution to form a plurality of first openings, a part of the first openings exposes a part of the first semiconductor layer 201, another part of the first openings exposes a part of the second semiconductor layer 203, and the remaining first insulating material layer constitutes the first insulating layer 301.
请参阅图5,在所述第二半导体层203上形成反射镜层400。形成所述反射 镜层400的步骤包括:通过负胶光刻工艺制成掩模图形,再通过电子束蒸发、 溅射、ALD(Atomiclayer deposition,原子层沉积)等工艺来生长反射率较高的反 射镜薄膜,最后通过剥离(lift off)等方法去除掩模和掩模上的反射镜薄膜,剩余 的反射镜薄膜构成所述反射镜层400。应理解,所述反射镜层400需要将所述凹 槽200a完全露出。Referring to Fig. 5, a reflector layer 400 is formed on the second semiconductor layer 203. The steps of forming the reflector layer 400 include: forming a mask pattern by a negative photolithography process, growing a reflector film with a high reflectivity by processes such as electron beam evaporation, sputtering, and ALD (Atomic layer deposition), and finally removing the mask and the reflector film on the mask by a lift-off method, and the remaining reflector film constitutes the reflector layer 400. It should be understood that the reflector layer 400 needs to completely expose the groove 200a.
作为可选实施例,所述反射镜层400可通过在N2氛围中高温退火的方式与 所述第二半导体层203形成良好的欧姆接触。As an optional embodiment, the reflector layer 400 may form a good ohmic contact with the second semiconductor layer 203 by high temperature annealing in a N 2 atmosphere.
请参阅图6,在所述反射镜层400上形成电流扩展层501。所述电流扩展层 501的形成步骤可以是:通过负胶光刻工艺制成掩模图形,再通过电子束蒸发、 溅射、ALD等来生长电流扩展薄膜,最后用撕金、去胶工艺去除掩模和掩模上 的电流扩展薄膜,剩余的电流扩展薄膜构成所述电流扩展层501。Referring to Fig. 6, a current spreading layer 501 is formed on the reflector layer 400. The steps of forming the current spreading layer 501 may be: forming a mask pattern by a negative resist photolithography process, then growing a current spreading film by electron beam evaporation, sputtering, ALD, etc., and finally removing the mask and the current spreading film on the mask by a gold stripping and resist stripping process, and the remaining current spreading film constitutes the current spreading layer 501.
请参阅图7,在所述第一绝缘层301和所述电流扩展层501上形成第二绝缘 层302。第二绝缘层302的形成步骤可以是:通过PECVD形成第二绝缘材料层 (图7中未示出),然后采用正光刻胶制作出掩模,用ICP(感应等离子耦合刻蚀 设备)对第二绝缘材料层进行刻蚀或者使用BOE溶液或用HF溶液对第二绝缘材 料层进行腐蚀,形成一部分第二开口,此时形成的所述第二开口与所述凹槽内 的第一开口连通,以露出所述凹槽200a底部的部分所述第一半导体层201。Referring to Fig. 7, a second insulating layer 302 is formed on the first insulating layer 301 and the current spreading layer 501. The steps of forming the second insulating layer 302 may be: forming a second insulating material layer (not shown in Fig. 7) by PECVD, then making a mask by using a positive photoresist, etching the second insulating material layer by using an ICP (inductively coupled plasma etching device) or etching the second insulating material layer by using a BOE solution or an HF solution, to form a portion of a second opening, wherein the second opening formed at this time is connected to the first opening in the groove to expose a portion of the first semiconductor layer 201 at the bottom of the groove 200a.
请参阅图8,在所述第二绝缘层302上形成连接金属层502。所述连接金属 层502的形成步骤可以是:通过负胶光刻工艺制成掩模图形,再通过电子束蒸 发、溅射、ALD等来生长电流扩展薄膜,最后用撕金、去胶工艺去除掩模和掩 模上的电流扩展薄膜,剩余的电流扩展薄膜形成所述连接金属层502。8, a connection metal layer 502 is formed on the second insulating layer 302. The steps of forming the connection metal layer 502 may be: forming a mask pattern by a negative resist photolithography process, then growing a current spreading film by electron beam evaporation, sputtering, ALD, etc., and finally removing the mask and the current spreading film on the mask by a gold stripping and resist stripping process, and the remaining current spreading film forms the connection metal layer 502.
请参阅图9,在所述连接金属层502上形成第三绝缘层303。所述第三绝缘 层303优选通过PECVD形成第三绝缘材料层,然后采用正光刻胶制作出掩模, 用ICP(感应等离子耦合刻蚀设备)对所述第三绝缘材料层及其下方的部分膜层进 行刻蚀或者使用BOE溶液或用HF溶液对所述第三绝缘层303材料层进行腐蚀, 形成第三开口,此时所述第三开口均只露出所述连接金属层502。接着,还需要 对一部分所述第三开口底部的第二绝缘层302进行腐蚀,以在所述第二绝缘层 302中再次形成第二开口,此时形成的所述第二开口与其上方的第三开口连通。最后,剩余的第三绝缘材料层构成所述第三绝缘层303,剩余的第二绝缘材料层 构成所述第二绝缘层302。Please refer to FIG. 9 , a third insulating layer 303 is formed on the connection metal layer 502. The third insulating layer 303 is preferably formed by PECVD to form a third insulating material layer, and then a positive photoresist is used to make a mask, and the third insulating material layer and a part of the film layer below it are etched by ICP (inductive plasma coupled etching equipment) or the third insulating layer 303 material layer is corroded by BOE solution or HF solution to form a third opening, and at this time, the third opening only exposes the connection metal layer 502. Then, it is necessary to etch the second insulating layer 302 at the bottom of a part of the third opening to form a second opening in the second insulating layer 302 again, and the second opening formed at this time is connected to the third opening above it. Finally, the remaining third insulating material layer constitutes the third insulating layer 303, and the remaining second insulating material layer constitutes the second insulating layer 302.
请参阅图10,在所述第三绝缘层303上形成若干电极组,每个所述电极组 均包括第一电极601和第二电极602。形成所述第一电极601和第二电极602的 步骤可以为:通过负胶光刻工艺制成掩模图形,再通过电子束蒸发、溅射、ALD 等工艺生长导电金属薄膜,最后用撕金、去胶工艺去除掩模和掩模上的导电金属薄膜,剩余的导电金属薄膜构成所述第一电极601和所述第二电极602。Referring to Fig. 10, a plurality of electrode groups are formed on the third insulating layer 303, each of which includes a first electrode 601 and a second electrode 602. The steps of forming the first electrode 601 and the second electrode 602 may be: forming a mask pattern by a negative resist photolithography process, then growing a conductive metal film by electron beam evaporation, sputtering, ALD and other processes, and finally removing the mask and the conductive metal film on the mask by a gold stripping and resist removal process, and the remaining conductive metal film constitutes the first electrode 601 and the second electrode 602.
请参阅图11,形成所述LED功能层之后,所述LED功能层与所述衬底100 共同构成所述LED晶圆004。所述LED晶圆004中具有若干阵列分布的芯片区 60,每个所述芯片区60用于形成一个所述LED芯片,一个所述芯片区60对应 一个所述电极组。Please refer to Fig. 11, after the LED functional layer is formed, the LED functional layer and the substrate 100 together constitute the LED wafer 004. The LED wafer 004 has a plurality of chip areas 60 distributed in an array, each of which is used to form one LED chip, and one chip area 60 corresponds to one electrode group.
请参阅图12,执行步骤S200,提供柔性布线晶圆002,所述柔性布线晶圆 002根据需要设计了金属布线层(未图示),本实施例中,所述金属布线层位于 所述柔性布线晶圆002的第二表面,但不应以此为限。进一步地,所述金属布 线层上具有若干阵列分布的布线区80,每个所述布线区80均对应一个芯片区60。Referring to FIG. 12 , step S200 is performed to provide a flexible wiring wafer 002. The flexible wiring wafer 002 is designed with a metal wiring layer (not shown) as required. In this embodiment, the metal wiring layer is located on the second surface of the flexible wiring wafer 002, but the present invention is not limited thereto. Furthermore, the metal wiring layer has a plurality of wiring areas 80 distributed in an array, and each of the wiring areas 80 corresponds to a chip area 60.
进一步地,所述柔性布线晶圆002采用了柔性基底制备,使得所述柔性布 线晶圆002具备柔性,因此,所述柔性基底的材料可以是柔性材料,例如柔性 玻璃、硅胶、环氧树脂或其他柔性高分子聚合物(例如含氧化硅的柔性高分子 聚合物)。可选的,所述柔性基底的材料还可以选择耐高温的材料,以避免在后续的制备过程中被损伤,例如耐高温的柔性玻璃、耐高温的硅胶、耐高温的环 氧树脂或其他耐高温的柔性高分子聚合物。Furthermore, the flexible wiring wafer 002 is prepared using a flexible substrate, so that the flexible wiring wafer 002 is flexible. Therefore, the material of the flexible substrate can be a flexible material, such as flexible glass, silicone, epoxy resin or other flexible polymers (such as flexible polymers containing silicon oxide). Optionally, the material of the flexible substrate can also be a high-temperature resistant material to avoid being damaged in the subsequent preparation process, such as high-temperature resistant flexible glass, high-temperature resistant silicone, high-temperature resistant epoxy resin or other high-temperature resistant flexible polymers.
请参阅图13,提供支撑晶圆001,并将所述柔性布线晶圆002固定在所述 支撑晶圆001上,由于所述柔性布线晶圆002的第二表面具有所述金属布线层, 所以将所述柔性布线晶圆002的第一表面固定至所述支撑晶圆001上,以使所 述柔性布线晶圆002的第二表面的所述金属布线层露出。所述金属布线层的每 个所述布线区80上均具有第一金属线801和第二金属线802,分别用于与相应 的所述芯片区60的第一电极601和第二电极602电性连接,并为相应的所述LED 芯片转移电荷。Referring to Fig. 13, a support wafer 001 is provided, and the flexible wiring wafer 002 is fixed on the support wafer 001. Since the second surface of the flexible wiring wafer 002 has the metal wiring layer, the first surface of the flexible wiring wafer 002 is fixed to the support wafer 001 to expose the metal wiring layer on the second surface of the flexible wiring wafer 002. Each wiring area 80 of the metal wiring layer has a first metal wire 801 and a second metal wire 802, which are respectively used to electrically connect with the first electrode 601 and the second electrode 602 of the corresponding chip area 60 and transfer charges for the corresponding LED chip.
所述支撑晶圆001在后续的制备过程中为所述柔性布线晶圆002提供支撑, 因此,所述支撑晶圆001可以是硅晶圆或蓝宝石晶圆等可以提供支撑力的晶圆。The supporting wafer 001 provides support for the flexible wiring wafer 002 in the subsequent preparation process. Therefore, the supporting wafer 001 can be a silicon wafer or a sapphire wafer or other wafer that can provide support.
进一步地,本实施例中,所述柔性布线晶圆002通过一粘合层003固定在 所述支撑晶圆001上,所述粘合层003用于将所述柔性布线晶圆002与所述支 撑晶圆001之间粘合。本实施例中,所述粘合层003的材料为金属材料,可以 先在所述支撑晶圆001上形成金属材料层,再通过加压的方式将所述柔性布线 晶圆002压合至所述金属材料层上,从而将所述柔性布线晶圆002固定在所述支撑晶圆001上;或者,也可以将金属溶液点涂或涂布在所述支撑晶圆001上, 并将所述柔性布线晶圆002置于所述支撑晶圆001上,所述金属溶液凝固之后形成所述粘合层003,实现所述柔性布线晶圆002与所述支撑晶圆001的固定。Further, in this embodiment, the flexible wiring wafer 002 is fixed on the supporting wafer 001 through an adhesive layer 003, and the adhesive layer 003 is used to bond the flexible wiring wafer 002 to the supporting wafer 001. In this embodiment, the material of the adhesive layer 003 is a metal material, and a metal material layer can be first formed on the supporting wafer 001, and then the flexible wiring wafer 002 is pressed onto the metal material layer by pressure, so as to fix the flexible wiring wafer 002 on the supporting wafer 001; or, a metal solution can be dotted or coated on the supporting wafer 001, and the flexible wiring wafer 002 is placed on the supporting wafer 001, and the metal solution is solidified to form the adhesive layer 003, so as to achieve the fixing of the flexible wiring wafer 002 and the supporting wafer 001.
作为可选实施例,所述粘合层003的材料也可以是诸如光刻胶等有机胶材, 在所述支撑晶圆001上涂布有机粘合胶,并将所述柔性布线晶圆002放置于所述支撑晶圆001上,所述有机粘合胶固化之后即可实现所述柔性布线晶圆002 与所述支撑晶圆001的固定。As an optional embodiment, the material of the adhesive layer 003 can also be an organic adhesive material such as photoresist. The organic adhesive is coated on the supporting wafer 001, and the flexible wiring wafer 002 is placed on the supporting wafer 001. After the organic adhesive is cured, the flexible wiring wafer 002 and the supporting wafer 001 can be fixed.
可选的,为了保证所述支撑晶圆001具有良好的支撑性能,本实施例中, 所述支撑晶圆001的厚度大于或等于250μm。Optionally, in order to ensure that the supporting wafer 001 has good supporting performance, in this embodiment, the thickness of the supporting wafer 001 is greater than or equal to 250 μm.
请参阅图14,将所述LED晶圆004键合至所述柔性布线晶圆002上,所述 LED功能层的所述电极面与所述柔性布线晶圆002的第二表面贴合。也就是说, 将所述LED晶圆004翻转后键合至所述柔性布线晶圆002上,将所述第一电极 601及所述第二电极602的第一表面与所述柔性布线晶圆002的金属布线层贴 合。由于所述第一电极601与所述第二电极602均采用键合金属材料制成,利 用所有所述第一电极601与所述第二电极602即可将所述LED晶圆004键合至 所述柔性布线晶圆002上。Referring to FIG. 14 , the LED wafer 004 is bonded to the flexible wiring wafer 002, and the electrode surface of the LED functional layer is bonded to the second surface of the flexible wiring wafer 002. That is, the LED wafer 004 is flipped over and bonded to the flexible wiring wafer 002, and the first surfaces of the first electrode 601 and the second electrode 602 are bonded to the metal wiring layer of the flexible wiring wafer 002. Since the first electrode 601 and the second electrode 602 are both made of bonding metal material, the LED wafer 004 can be bonded to the flexible wiring wafer 002 by using all of the first electrodes 601 and the second electrodes 602.
请参阅图15,将所述LED晶圆004键合至所述柔性布线晶圆002上时,一 个所述芯片区60与一个所述布线区80对准,所述芯片区60内的第一电极601 和第二电极602分别接触对应的布线区80的第一金属线801和第二金属线802,所述第一电极601与所述第一金属线801实现电性连接,所述第二电极602与 所述第二金属线802电性连接。Please refer to Figure 15. When the LED wafer 004 is bonded to the flexible wiring wafer 002, one of the chip areas 60 is aligned with one of the wiring areas 80. The first electrode 601 and the second electrode 602 in the chip area 60 respectively contact the first metal wire 801 and the second metal wire 802 of the corresponding wiring area 80. The first electrode 601 is electrically connected to the first metal wire 801, and the second electrode 602 is electrically connected to the second metal wire 802.
应理解,本实施例中的所述衬底100是透明的衬底,将所述LED晶圆004 键合至所述柔性布线晶圆002上时,可以透过所述衬底100看到所述柔性布线 晶圆002上的对准标记,因此可以实现所述LED晶圆004与所述柔性布线晶圆 002的精确对准。It should be understood that the substrate 100 in this embodiment is a transparent substrate. When the LED wafer 004 is bonded to the flexible wiring wafer 002, the alignment mark on the flexible wiring wafer 002 can be seen through the substrate 100, so that the LED wafer 004 can be accurately aligned with the flexible wiring wafer 002.
请参阅图16,执行步骤S300,采用激光剥离工艺或研磨工艺去除所述衬底100,并采用碱性溶液对所述LED功能层的第一半导体层201进行粗化,以增 加出光效率。Please refer to FIG. 16 , and execute step S300 to remove the substrate 100 by laser lift-off process or grinding process, and roughen the first semiconductor layer 201 of the LED functional layer by alkaline solution to increase light extraction efficiency.
应理解,所述碱性溶液可以是氢氧化钠(NaOH)或氢氧化钾(KOH)等溶 剂。It should be understood that the alkaline solution can be a solvent such as sodium hydroxide (NaOH) or potassium hydroxide (KOH).
请参阅图17,刻蚀所述第一半导体层201以在所述第一半导体层201中形 成贯穿的划片槽700。所述划片槽700在所述第一半导体层201上横纵交错,并 且将所述第一半导体层201完全断开,所述划片槽700划分出的一个个矩形区 域则是单个的所述芯片区60,也就是说,所述划片槽700将每个所述芯片区60 分离了,因此所述划片槽700可以定义出一个个单独的所述芯片区60。Referring to Fig. 17, the first semiconductor layer 201 is etched to form a through-going scribe groove 700 in the first semiconductor layer 201. The scribe groove 700 is crisscrossed on the first semiconductor layer 201 and completely disconnects the first semiconductor layer 201. The rectangular areas divided by the scribe groove 700 are the individual chip areas 60, that is, the scribe groove 700 separates each chip area 60, so the scribe groove 700 can define the individual chip areas 60.
应理解,在刻蚀所述第一半导体层201以形成所述划片槽700时,可以选 择与所述第一绝缘层301、第二绝缘层302和第三绝缘层303的刻蚀选择比较大 的刻蚀剂,防止刻蚀所述第一半导体层201时所述第一绝缘层301、第二绝缘层 302和第三绝缘层303一并被刻蚀了,从而损伤所述柔性布线晶圆002的金属布线层,进而导致芯片的导通性能下降。It should be understood that when etching the first semiconductor layer 201 to form the scribe groove 700, an etchant that is larger than the etching selectivity of the first insulating layer 301, the second insulating layer 302 and the third insulating layer 303 can be selected to prevent the first insulating layer 301, the second insulating layer 302 and the third insulating layer 303 from being etched together when etching the first semiconductor layer 201, thereby damaging the metal wiring layer of the flexible wiring wafer 002, thereby causing the conduction performance of the chip to decrease.
请参阅图18,执行步骤S400,将所述柔性布线晶圆002与所述支撑晶圆001 分离。本实施例中,由于所述粘合层003的材料为金属材料,采用研磨工艺去 除所述支撑晶圆001及所述粘合层003,从而将所述柔性布线晶圆002与所述支 撑晶圆001分离。Referring to Fig. 18, step S400 is performed to separate the flexible wiring wafer 002 from the supporting wafer 001. In this embodiment, since the material of the adhesive layer 003 is a metal material, a grinding process is used to remove the supporting wafer 001 and the adhesive layer 003, thereby separating the flexible wiring wafer 002 from the supporting wafer 001.
作为可选实施例,当所述粘合层003的材料为有机胶材时,可以采用有机 清洗溶剂分解所述粘合层003,从而将所述柔性布线晶圆002与所述支撑晶圆 001分离。As an optional embodiment, when the material of the adhesive layer 003 is an organic adhesive material, an organic cleaning solvent can be used to decompose the adhesive layer 003, thereby separating the flexible wiring wafer 002 from the supporting wafer 001.
接着,弯曲所述柔性布线晶圆002。由于所述第一绝缘层301、第二绝缘层 302及第三绝缘层301均为绝缘材料,脆性较大,在弯曲所述柔性布线晶圆002 时,所述第一绝缘层301、第二绝缘层302及第三绝缘层301会自所述划片槽 700处断裂,使得所述LED晶圆004的所述芯片区60彻底分离。接下来,沿着 所述划片槽700将所述柔性布线晶圆002裁剪为预定的形状和尺寸,以形成若 干包含至少一个所述芯片区的LED芯片光源,相当于可以形成任意形状和尺寸的所述LED芯片光源,适用性广;并且,裁剪后的所述柔性布线晶圆002构成所述LED芯片光源的柔性基底012,如此每个所述LED芯片光源均具备柔性, 容易弯曲和折叠,避免将LED芯片制备好后再转移至柔性电路基板上产生的不良率高、效率低、返修率高及成本高等问题,使利用Mini/Micro LED芯片制备 柔性显示屏具备量产可行性。Next, the flexible wiring wafer 002 is bent. Since the first insulating layer 301, the second insulating layer 302 and the third insulating layer 301 are all made of insulating materials and are relatively brittle, when the flexible wiring wafer 002 is bent, the first insulating layer 301, the second insulating layer 302 and the third insulating layer 301 are broken at the scribe groove 700, so that the chip area 60 of the LED wafer 004 is completely separated. Next, the flexible wiring wafer 002 is cut into a predetermined shape and size along the scribe line 700 to form a plurality of LED chip light sources including at least one chip area, which is equivalent to being able to form the LED chip light source of any shape and size, and has a wide applicability; and the cut flexible wiring wafer 002 constitutes a flexible substrate 012 of the LED chip light source, so that each of the LED chip light sources is flexible and easy to bend and fold, thereby avoiding the problems of high defective rate, low efficiency, high rework rate and high cost caused by transferring the prepared LED chip to the flexible circuit substrate, so that the use of Mini/Micro LED chips to prepare flexible display screens has the feasibility of mass production.
实施例二Embodiment 2
与实施例一的区别在于,本实施例中,所述LED芯片光源为另一种倒装结 构的LED芯片光源,同时,所述LED功能层也是另一种倒装结构的LED功能 层。The difference from the first embodiment is that in this embodiment, the LED chip light source is another LED chip light source with a flip-chip structure, and the LED functional layer is also another LED functional layer with a flip-chip structure.
请参阅图26,所述LED功能层包括外延层200、凹槽200a、电流阻挡层300、 电流扩展层500、两个第一层金属、绝缘反射层401及电极组。Please refer to FIG. 26 , the LED functional layer includes an epitaxial layer 200 , a groove 200 a , a current blocking layer 300 , a current spreading layer 500 , two first metal layers, an insulating reflective layer 401 and an electrode group.
具体的,本实施例中,所述外延层200形成于所述衬底100的第一表面, 所述外延层200包括由下向上依次设置的第一半导体层201、发光层202和第二 半导体层203。Specifically, in this embodiment, the epitaxial layer 200 is formed on the first surface of the substrate 100, and the epitaxial layer 200 includes a first semiconductor layer 201, a light emitting layer 202, and a second semiconductor layer 203 arranged in sequence from bottom to top.
所述凹槽200a位于所述外延层200的边缘,所述凹槽200a从所述第二半导 体层203的第一表面贯穿所述发光层202后延伸至所述第一半导体层201中。The groove 200a is located at the edge of the epitaxial layer 200, and the groove 200a extends from the first surface of the second semiconductor layer 203 through the light emitting layer 202 and then extends into the first semiconductor layer 201.
请继续参阅图26,所述电流阻挡层300及所述电流扩展层500均形成于所 述第二半导体层203的第一表面,所述电流阻挡层300覆盖部分所述第二半导 体层203的第一表面,所述电流阻挡层300具有良好的电流引导效应。所述电 流扩展层500在垂直于厚度方向上的宽度大于所述电流阻挡层300的宽度,以 使所述电流扩展层500不仅覆盖部分所述第二半导体层203的第一表面,还完 全覆盖了所述电流阻挡层300,从而有利于将电流横向扩展。Please continue to refer to FIG. 26 , the current blocking layer 300 and the current spreading layer 500 are both formed on the first surface of the second semiconductor layer 203, the current blocking layer 300 covers a portion of the first surface of the second semiconductor layer 203, and the current blocking layer 300 has a good current guiding effect. The width of the current spreading layer 500 in the direction perpendicular to the thickness is greater than the width of the current blocking layer 300, so that the current spreading layer 500 not only covers a portion of the first surface of the second semiconductor layer 203, but also completely covers the current blocking layer 300, thereby facilitating the lateral expansion of the current.
本实施例中,所述电流阻挡层300及所述电流扩展层500均是透明的膜层, 从而不会对出光效率及出光强度造成不良影响。所述电流阻挡层300的材料可 以是氧化硅、氮化硅、氧化钛、氧化铝或钙钛型电子陶瓷(ABO3)等;所述电 流扩展层500则为ITO或AZO等材料。本实施例中,所述电流阻挡层300是单 层氧化硅层,而所述电流扩展层500的材料则为ITO。In this embodiment, the current blocking layer 300 and the current spreading layer 500 are both transparent film layers, so as not to cause adverse effects on light extraction efficiency and light extraction intensity. The material of the current blocking layer 300 can be silicon oxide, silicon nitride, titanium oxide, aluminum oxide or perovskite electronic ceramic (ABO 3 ), etc.; the current spreading layer 500 is made of materials such as ITO or AZO. In this embodiment, the current blocking layer 300 is a single-layer silicon oxide layer, and the material of the current spreading layer 500 is ITO.
请继续参阅图26,两个所述第一层金属分别为第一层N金属503及所述第 一层P金属504,所述第一层N金属503和所述第一层P金属504分别形成于 所述凹槽200a中以及形成于所述电流扩展层500的第一表面。其中,所述第一 层N金属503位于所述凹槽200a的底部并与所述第一半导体层201电性连接, 在垂直于厚度方向上,所述第一层N金属503的宽度小于所述凹槽200a的宽度, 且所述第一层N金属503与所述凹槽200a的侧壁之间具有间隙,以便于所述第 一层N金属503及所述第一层P金属504之间实现电气绝缘;所述第一层P金属504位于所述电流扩展层500上,并通过所述电流扩展层500与所述第二半 导体层203电性连接。Please continue to refer to FIG. 26 , the two first metal layers are respectively a first N metal layer 503 and a first P metal layer 504, and the first N metal layer 503 and the first P metal layer 504 are respectively formed in the groove 200a and formed on the first surface of the current spreading layer 500. The first N metal layer 503 is located at the bottom of the groove 200a and is electrically connected to the first semiconductor layer 201, and in a direction perpendicular to the thickness, the width of the first N metal layer 503 is smaller than the width of the groove 200a, and there is a gap between the first N metal layer 503 and the sidewall of the groove 200a, so as to achieve electrical insulation between the first N metal layer 503 and the first P metal layer 504; the first P metal layer 504 is located on the current spreading layer 500, and is electrically connected to the second semiconductor layer 203 through the current spreading layer 500.
进一步地,所述第一层P金属504与所述电流阻挡层300的位置对应,且 所述电流阻挡层300的面积大于所述第一层P金属504的面积,所述电流阻挡 层300可以减小因所述第一层P金属504吸收光/挡光而造成的光损失,并且减 少电流垂直传输,增加横向传输。Furthermore, the first layer of P metal 504 corresponds to the position of the current blocking layer 300, and the area of the current blocking layer 300 is larger than the area of the first layer of P metal 504. The current blocking layer 300 can reduce the light loss caused by the first layer of P metal 504 absorbing/blocking light, and reduce the vertical transmission of current and increase the lateral transmission.
进一步地,所述绝缘反射层401覆盖所述第二半导体层203的第一表面并 填充所述凹槽200a。也就是说,所述绝缘反射层401整面覆盖芯片区,所述第 一层N金属503与所述凹槽200a的侧壁之间的间隙也被所述绝缘反射层401填 充,如此一来,所述第一层N金属503及所述第一层P金属504可以通过所述 绝缘反射层401实现电气绝缘。同时,所述绝缘反射层401具有反光作用,可 以充当反射镜,可将所述发光层202发出的光中射向所述绝缘反射层401的那 部分光反射回去。所述绝缘反射层401的材料包括氧化硅、氧化钛、氧化铝或氮化硅中的两种或两种以上,本实施例中,所述绝缘反射层401是由至少两层 高、低折射率的膜层交替蒸镀而成的,但不以此为限。Further, the insulating reflective layer 401 covers the first surface of the second semiconductor layer 203 and fills the groove 200a. That is, the insulating reflective layer 401 covers the chip area on its entire surface, and the gap between the first layer of N metal 503 and the side wall of the groove 200a is also filled by the insulating reflective layer 401. In this way, the first layer of N metal 503 and the first layer of P metal 504 can be electrically insulated by the insulating reflective layer 401. At the same time, the insulating reflective layer 401 has a reflective effect and can act as a reflector to reflect back the part of the light emitted by the light-emitting layer 202 that is directed to the insulating reflective layer 401. The material of the insulating reflective layer 401 includes two or more of silicon oxide, titanium oxide, aluminum oxide or silicon nitride. In this embodiment, the insulating reflective layer 401 is formed by alternately evaporating at least two layers of high and low refractive index films, but is not limited thereto.
本实施例中,所以绝缘反射层401既可以实现所述第一层N金属503及所 述第一层P金属504之间的电气绝缘,也可以充当反射镜,并且,由于所述绝 缘反射层401是整面覆盖的,面积较大,反光的效果更好。In this embodiment, the insulating reflective layer 401 can not only realize the electrical insulation between the first layer of N metal 503 and the first layer of P metal 504, but also act as a reflector. Moreover, since the insulating reflective layer 401 covers the entire surface, the area is larger and the reflective effect is better.
请继续参阅图26,所述电极组包括两个电极,两个所述电极分别为第一电 极601和第二电极602。所述第一电极601贯穿所述绝缘反射层401,且所述第 一电极601的第二表面与所述第一层N金属503接触从而实现电性连接,如此一来,所述第一电极601即可通过所述第一层N金属503与所述第一半导体层 201实现电性连接。类似的,所述第二电极602贯穿所述绝缘反射层401,且所 述第二电极602的第二表面与所述第一层P金属504接触从而实现电性连接, 如此一来,所述第二电极602即可通过所述第一层P金属504及所述电流扩展层500与所述第二半导体层203实现电性连接。Please continue to refer to FIG. 26 , the electrode group includes two electrodes, the two electrodes are a first electrode 601 and a second electrode 602. The first electrode 601 penetrates the insulating reflective layer 401, and the second surface of the first electrode 601 contacts the first layer of N metal 503 to achieve electrical connection, so that the first electrode 601 can be electrically connected to the first semiconductor layer 201 through the first layer of N metal 503. Similarly, the second electrode 602 penetrates the insulating reflective layer 401, and the second surface of the second electrode 602 contacts the first layer of P metal 504 to achieve electrical connection, so that the second electrode 602 can be electrically connected to the second semiconductor layer 203 through the first layer of P metal 504 and the current spreading layer 500.
本实施例中,所述第一电极601和所述第二电极602的材料可以是金(Au)、 锡(Sn)、镍(Ni)、银(Ag)及铜(Cu)中的至少两种金属构成。In this embodiment, the materials of the first electrode 601 and the second electrode 602 may be at least two metals selected from the group consisting of gold (Au), tin (Sn), nickel (Ni), silver (Ag) and copper (Cu).
从图30中可见,所述第一电极601和所述第二电极602的第一表面作为所 述电极面与所述柔性布线晶圆002的第二表面贴合。As can be seen from FIG. 30 , the first surfaces of the first electrode 601 and the second electrode 602 serve as the electrode surfaces and are bonded to the second surface of the flexible wiring wafer 002.
图19至图29示出了本实施例提供的倒装结构的LED芯片光源的制备方法 的相应步骤的结构示意图。接下来,将结合图19至图29对所述LED芯片光源 的制备方法进行详细说明。Figures 19 to 29 show the structural schematic diagrams of the corresponding steps of the method for preparing the flip-chip structure LED chip light source provided by this embodiment. Next, the method for preparing the LED chip light source will be described in detail in conjunction with Figures 19 to 29.
请参阅图19,执行步骤S100,提供衬底100,并在所述衬底100上形成倒 装结构的LED功能层。Please refer to FIG. 19 , in step S100 , a substrate 100 is provided, and a flip-chip LED functional layer is formed on the substrate 100 .
接下来,将描述如何形成倒装结构的LED功能层。Next, how to form the LED functional layer of the flip-chip structure will be described.
请继续参阅图19,在所述衬底100上形成外延层200,所述外延层200包 括由下向上依次设置的第一半导体层201、发光层202和第二半导体层203。Please continue to refer to FIG. 19 , an epitaxial layer 200 is formed on the substrate 100 , and the epitaxial layer 200 includes a first semiconductor layer 201 , a light emitting layer 202 , and a second semiconductor layer 203 arranged in sequence from bottom to top.
形成所述衬底100及所述外延层200的方式例如是:使用标准的光刻工艺 在所述衬底100上刻蚀出图形,然后利用ICP(感应等离子耦合刻蚀设备)刻蚀所 述衬底100以对所述衬底100进行图案化,用来提高发光效率。进一步地,可 以通过诸如金属化学气相沉积、激光辅助分子束外延、氢化物气相外延、蒸镀 等任意一种外延技术在所述衬底100上制作所述外延层200,并且,所述外延层 200可以是多晶结构或单晶结构。The substrate 100 and the epitaxial layer 200 are formed by, for example, etching a pattern on the substrate 100 using a standard photolithography process, and then etching the substrate 100 using an ICP (inductively coupled plasma etching device) to pattern the substrate 100 to improve the light-emitting efficiency. Further, the epitaxial layer 200 can be formed on the substrate 100 by any epitaxial technology such as metal chemical vapor deposition, laser-assisted molecular beam epitaxy, hydride vapor phase epitaxy, evaporation, etc., and the epitaxial layer 200 can be a polycrystalline structure or a single crystal structure.
请参阅图20,对所述外延层200进行部分刻蚀以形成凹槽200a,所述凹槽 200a贯穿所述第二半导体层203和所述发光层202并延伸至所述第一半导体层 201中。具体而言,形成所述凹槽200a的步骤包括:通过光刻工艺,制作出发 光区MESA图形,用ICP对所述外延层200进行刻蚀以形成所述凹槽200a,刻 蚀的深度需要超过所述发光层202,并暴露出所述第一半导体层201,从侧面来 看是蚀刻出平台(MESA),形成MESA台阶,MESA台阶包括上台阶面和下台阶 面,其中,上台阶面为第二半导体层203,下台阶面为第一半导体层201,上台阶面和下台阶面之间连接形成MESA台阶的侧面。Please refer to FIG. 20 , the epitaxial layer 200 is partially etched to form a groove 200a, and the groove 200a penetrates the second semiconductor layer 203 and the light emitting layer 202 and extends into the first semiconductor layer 201. Specifically, the steps of forming the groove 200a include: using a photolithography process to make a light emitting area MESA pattern, using ICP to etch the epitaxial layer 200 to form the groove 200a, the etching depth needs to exceed the light emitting layer 202, and the first semiconductor layer 201 is exposed, and a platform (MESA) is etched from the side to form a MESA step, and the MESA step includes an upper step surface and a lower step surface, wherein the upper step surface is the second semiconductor layer 203, the lower step surface is the first semiconductor layer 201, and the upper step surface and the lower step surface are connected to form the side of the MESA step.
请参阅图21,在所述第二半导体层203上形成电流阻挡层300。所述电流 阻挡层的形成步骤可以是:通过沉积工艺全面沉积电流阻挡材料(图21中未示 出),然后采用光刻胶制作出掩模,然后用刻蚀工艺、去胶工艺去除部分电流阻 挡材料以及掩模,所述第二半导体层203上的部分电流阻挡材料得以保留,剩 余的电流阻挡材料构成所述电流阻挡层300。Referring to FIG21 , a current blocking layer 300 is formed on the second semiconductor layer 203. The steps of forming the current blocking layer may be: a current blocking material is deposited on the entire surface through a deposition process (not shown in FIG21 ), a mask is then made using a photoresist, and then a portion of the current blocking material and the mask are removed through an etching process and a stripping process, so that a portion of the current blocking material on the second semiconductor layer 203 is retained, and the remaining current blocking material constitutes the current blocking layer 300.
请参阅图22,在所述第二半导体层203上形成电流扩展层500。形成所述 电流扩展层500的步骤包括:通过沉积工艺全面沉积电流扩展材料(图22中未 示出),然后采用光刻胶制作出掩模,然后用刻蚀工艺、去胶工艺去除部分电流 扩展材料以及掩模,所述第二半导体层203上的部分电流扩展材料以及所述电 流阻挡层300上的全部电流扩展材料得以保留,剩余的电流扩展材料构成所述 电流扩展层500。Referring to FIG. 22 , a current spreading layer 500 is formed on the second semiconductor layer 203. The steps of forming the current spreading layer 500 include: depositing a current spreading material (not shown in FIG. 22 ) on the entire surface through a deposition process, then using a photoresist to make a mask, and then using an etching process and a stripping process to remove part of the current spreading material and the mask, so that part of the current spreading material on the second semiconductor layer 203 and all of the current spreading material on the current blocking layer 300 are retained, and the remaining current spreading material constitutes the current spreading layer 500.
请参阅图23,在所述凹槽200a及所述电流扩展层500上分别形成两个第一 层金属,两个第一层金属分别为第一层N金属503和第一层P金属504。形成 所述第一层N金属503和所述第一层P金属504的步骤可以是:在所述电流扩 展层500上形成图形化的光刻胶层,所述图形化的光刻胶层定义出需要形成第 一层N金属503和第一层P金属504的图案,然后通过诸如溅射等工艺形成第 一层电极材料,最后剥离图形化的光刻胶并同时将图形化的光刻胶上的第一层 电极材料去除,剩余的第一层电极材料即可构成所述第一层N金属503和所述 第一层P金属504。Referring to Fig. 23, two first layers of metal are formed on the groove 200a and the current spreading layer 500, respectively, and the two first layers of metal are respectively a first layer of N metal 503 and a first layer of P metal 504. The steps of forming the first layer of N metal 503 and the first layer of P metal 504 may be: forming a patterned photoresist layer on the current spreading layer 500, wherein the patterned photoresist layer defines a pattern for forming the first layer of N metal 503 and the first layer of P metal 504, then forming a first layer of electrode material by a process such as sputtering, finally stripping the patterned photoresist and removing the first layer of electrode material on the patterned photoresist at the same time, and the remaining first layer of electrode material can constitute the first layer of N metal 503 and the first layer of P metal 504.
请参阅图24,在所述第二半导体层203上全面沉积蒸镀绝缘反射层401, 所述绝缘反射层401填充所述凹槽200a并延伸覆盖所述第二半导体层203。Please refer to FIG. 24 , an insulating reflective layer 401 is fully deposited on the second semiconductor layer 203 , and the insulating reflective layer 401 fills the groove 200 a and extends to cover the second semiconductor layer 203 .
请参阅图25,刻蚀所述绝缘反射层401,以形成第四开口403及第五开口 404,所述第四开口403及第五开口404贯穿所述绝缘反射层401并分别露出所 述第一层N金属503和所述第一层P金属504的第一表面。Referring to FIG. 25 , the insulating reflective layer 401 is etched to form a fourth opening 403 and a fifth opening 404. The fourth opening 403 and the fifth opening 404 penetrate the insulating reflective layer 401 and expose the first surface of the first layer of N metal 503 and the first layer of P metal 504, respectively.
请参阅图26,在所述第四开口403及所述第五开口404中填充导电材料, 所述导电材料还延伸覆盖所述绝缘反射层401的第一表面。接着刻蚀以去除所 述绝缘反射层401的第一表面的部分所述导电材料,所述第四开口403中的导 电材料以及所述绝缘反射层401的第一表面的部分导电材料构成所述第一电极 601,所述第五开口404中的导电材料以及所述绝缘反射层401的第一表面的剩 余导电材料构成所述第二电极602,所述第一电极601和所述第二电极602构成 电极组。Referring to Fig. 26, the fourth opening 403 and the fifth opening 404 are filled with conductive material, and the conductive material also extends to cover the first surface of the insulating reflective layer 401. Then, etching is performed to remove part of the conductive material on the first surface of the insulating reflective layer 401, and the conductive material in the fourth opening 403 and part of the conductive material on the first surface of the insulating reflective layer 401 constitute the first electrode 601, and the conductive material in the fifth opening 404 and the remaining conductive material on the first surface of the insulating reflective layer 401 constitute the second electrode 602, and the first electrode 601 and the second electrode 602 constitute an electrode group.
请参阅图27,执行步骤S200,将所述衬底100与所述倒装结构的LED功 能层构成的所述LED晶圆004键合至所述柔性布线晶圆002上,所述LED功能 层的电极面与所述柔性布线晶圆002的第二表面贴合。也就是说,将所述LED 晶圆004翻转后,将所述第一电极601和所述第二电极602的第一表面与所述 柔性布线晶圆002的金属布线层贴合。Referring to FIG. 27 , step S200 is performed to bond the LED wafer 004 composed of the substrate 100 and the flip-chip LED functional layer to the flexible wiring wafer 002, and the electrode surface of the LED functional layer is bonded to the second surface of the flexible wiring wafer 002. That is, after the LED wafer 004 is flipped over, the first surfaces of the first electrode 601 and the second electrode 602 are bonded to the metal wiring layer of the flexible wiring wafer 002.
请参阅图28,执行步骤S300,采用激光剥离工艺或研磨工艺去除所述衬底 100,并采用碱性溶液对所述LED功能层的第一半导体层201进行粗化,以增 加出光效率。Referring to FIG. 28 , step S300 is performed to remove the substrate 100 by using a laser lift-off process or a grinding process, and to roughen the first semiconductor layer 201 of the LED functional layer by using an alkaline solution to increase light extraction efficiency.
请参阅图29,刻蚀所述第一半导体层201以在所述第一半导体层201中形 成贯穿的划片槽700。Referring to FIG. 29 , the first semiconductor layer 201 is etched to form a penetrating scribe line 700 in the first semiconductor layer 201 .
请继续参阅图29,执行步骤S400,将所述柔性布线晶圆002与所述支撑晶 圆001分离,并去除所述粘合层003。Please continue to refer to FIG. 29 , and execute step S400 to separate the flexible wiring wafer 002 from the supporting wafer 001 and remove the adhesive layer 003 .
请参阅图30,弯曲所述柔性布线晶圆002,使得所述绝缘反射层401自所 述划片槽700处断裂,使得所述LED晶圆的所述芯片区彻底分离。接下来,沿 着所述划片槽700将所述柔性布线晶圆002裁剪为预定的形状和尺寸,以形成 若干包含至少一个所述芯片区的LED芯片光源,裁剪后的所述柔性布线晶圆002 构成所述LED芯片光源的柔性基底012。Referring to Fig. 30, the flexible wiring wafer 002 is bent so that the insulating reflective layer 401 is broken at the scribe groove 700, so that the chip area of the LED wafer is completely separated. Next, the flexible wiring wafer 002 is cut into a predetermined shape and size along the scribe groove 700 to form a plurality of LED chip light sources including at least one chip area. The cut flexible wiring wafer 002 constitutes the flexible substrate 012 of the LED chip light source.
实施例三Embodiment 3
与实施例一和实施例二的区别在于,本实施例中,所述LED芯片光源为垂 直结构的LED芯片光源,所述LED功能层为垂直结构的LED功能层。The difference from the first embodiment and the second embodiment is that in this embodiment, the LED chip light source is a vertically structured LED chip light source, and the LED functional layer is a vertically structured LED functional layer.
图39为本实施例提供的LED芯片光源的结构示意图,图34为本实施例提 供的垂直结构的部分LED功能层的结构示意图。如图34及图39所示,本实施例中,所述垂直结构的LED功能层包括外延层200、反射镜层405、金属保护 层406、第一绝缘保护层304、第二绝缘保护层305及电极组。Fig. 39 is a schematic diagram of the structure of the LED chip light source provided in this embodiment, and Fig. 34 is a schematic diagram of the structure of part of the LED functional layer of the vertical structure provided in this embodiment. As shown in Fig. 34 and Fig. 39, in this embodiment, the LED functional layer of the vertical structure includes an epitaxial layer 200, a reflector layer 405, a metal protective layer 406, a first insulating protective layer 304, a second insulating protective layer 305 and an electrode group.
请参阅图34,具体而言,所述反射镜层405形成于所述外延层200的第一 表面,并覆盖所述第二半导体层203的部分第一表面,所述反射镜层405用于 将所述外延层200发出的射向所述柔性基底012的光线反射回去。所述反射镜 层405是由银(Ag)、铂(Pt)、钨(W)、钛(Ti)、铝(Al)、ITO等构成的反 射镜,厚度通常为0.1um-2um。Please refer to Fig. 34, specifically, the reflector layer 405 is formed on the first surface of the epitaxial layer 200 and covers part of the first surface of the second semiconductor layer 203. The reflector layer 405 is used to reflect back the light emitted by the epitaxial layer 200 toward the flexible substrate 012. The reflector layer 405 is a reflector made of silver (Ag), platinum (Pt), tungsten (W), titanium (Ti), aluminum (Al), ITO, etc., and the thickness is usually 0.1um-2um.
请继续参阅图34及图39,所述金属保护层406位于所述外延层200上,并 覆盖所述第二半导体层203的部分第一表面以及所述反射镜层405的第一表面,所述金属保护层406用于保护所述反射镜层405,防止所述反射镜层405中的材 料迁移而导致漏电。所述金属保护层406的材料为Ti、Pt、Au、Al、Ni、Cr等 金属中的一种或几种构成,厚度为0.5um-3um之间。Please continue to refer to Figures 34 and 39. The metal protection layer 406 is located on the epitaxial layer 200 and covers part of the first surface of the second semiconductor layer 203 and the first surface of the reflector layer 405. The metal protection layer 406 is used to protect the reflector layer 405 to prevent leakage caused by migration of materials in the reflector layer 405. The material of the metal protection layer 406 is one or more of metals such as Ti, Pt, Au, Al, Ni, Cr, etc., and the thickness is between 0.5um and 3um.
所述第一绝缘保护层304形成于所述外延层200的第一表面,并覆盖所述 第二半导体层203的剩余第一表面以及所述金属保护层406的部分第一表面; 所述第二绝缘保护层305形成于所述第一半导体层201的第二表面,覆盖所述 第一半导体层201的第二表面和所述外延层200的侧面,同时,所述第二绝缘 保护层305还会覆盖所述柔性布线晶圆002裸露的第二表面。The first insulating protective layer 304 is formed on the first surface of the epitaxial layer 200, and covers the remaining first surface of the second semiconductor layer 203 and a portion of the first surface of the metal protective layer 406; the second insulating protective layer 305 is formed on the second surface of the first semiconductor layer 201, and covers the second surface of the first semiconductor layer 201 and the side of the epitaxial layer 200. At the same time, the second insulating protective layer 305 also covers the exposed second surface of the flexible wiring wafer 002.
所述第一绝缘保护层304和第二绝缘保护层305均为SiO2层、SiNx层、 SiO2/SiNx的叠层或DBR等,且所述第一绝缘保护层304的厚度是0.01um-10um。The first insulating protection layer 304 and the second insulating protection layer 305 are both SiO 2 layers, SiN x layers, stacked layers of SiO 2 /SiN x , or DBR, etc., and the thickness of the first insulating protection layer 304 is 0.01 um-10 um.
结合图39所示,所述电极组包括第一电极601和第二电极602。所述第一 电极601位于所述第二绝缘保护层305的第二表面,其一端穿过所述第二绝缘 保护层305与所述第一半导体层201电性连接,另一端穿过所述第二绝缘保护 层305并与所述柔性布线晶圆002电性连接;所述第二电极602形成于所述第 一绝缘保护层304的第一表面,并穿过所述第一绝缘保护层304与所述金属保 护层406接触,所述第二电极602通过所述金属保护层406及所述反射镜层405 与所述第二半导体层203电性连接。As shown in FIG39 , the electrode group includes a first electrode 601 and a second electrode 602. The first electrode 601 is located on the second surface of the second insulating protective layer 305, one end of which passes through the second insulating protective layer 305 to be electrically connected to the first semiconductor layer 201, and the other end of which passes through the second insulating protective layer 305 to be electrically connected to the flexible wiring wafer 002; the second electrode 602 is formed on the first surface of the first insulating protective layer 304, passes through the first insulating protective layer 304 to contact the metal protective layer 406, and the second electrode 602 is electrically connected to the second semiconductor layer 203 through the metal protective layer 406 and the reflector layer 405.
所述第一电极601和所述第二电极602的材料可以是AuSn、NiSn、SnAgCu 等可用于键合的金属材料,所述第一电极601和所述第二电极602的厚度为 0.5um-10um。The material of the first electrode 601 and the second electrode 602 can be AuSn, NiSn, SnAgCu or other metal materials that can be used for bonding. The thickness of the first electrode 601 and the second electrode 602 is 0.5um-10um.
从图39中可见,所述第一电极601和所述第二电极602的第一表面作为所 述电极面与所述柔性布线晶圆002的第二表面贴合。As can be seen from FIG. 39 , the first surfaces of the first electrode 601 and the second electrode 602 serve as the electrode surfaces and are bonded to the second surface of the flexible wiring wafer 002.
图31~图39为本实施例提供的垂直结构的LED芯片光源的制备方法的相应 步骤对应的结构示意图。接下来,将结合图31~图39对本实施例提供的垂直结 构的LED芯片光源的制备方法进行详细说明。Figures 31 to 39 are schematic diagrams of structures corresponding to corresponding steps of the method for preparing a vertical LED chip light source provided by this embodiment. Next, the method for preparing a vertical LED chip light source provided by this embodiment will be described in detail in conjunction with Figures 31 to 39.
参阅图31,执行步骤S100,提供所述衬底100以及在所述衬底100上形成 所述外延层200,所述外延层200包括从下至上依次设置的第一半导体层201、 发光层202及第二半导体层203。Referring to FIG. 31 , step S100 is performed to provide the substrate 100 and form the epitaxial layer 200 on the substrate 100. The epitaxial layer 200 includes a first semiconductor layer 201, a light emitting layer 202 and a second semiconductor layer 203 which are sequentially arranged from bottom to top.
请参阅图32,在所述外延层200上形成反射镜层405。形成所述反射镜层 405的方法可以是:通过负胶光刻工艺制成掩模图形,再通过电子束蒸发、溅射、 ALD(Atomic layerdeposition,原子层沉积)等工艺来生长反射率较高的反射镜薄膜,最后通过剥离(liftoff)等方法去除掩模和掩模上的反射镜薄膜,剩余的反射 镜薄膜构成所述反射镜层405。Referring to Fig. 32, a reflector layer 405 is formed on the epitaxial layer 200. The reflector layer 405 may be formed by forming a mask pattern through a negative photolithography process, growing a reflector film with a high reflectivity through processes such as electron beam evaporation, sputtering, and ALD (Atomic layer deposition), and finally removing the mask and the reflector film on the mask through a liftoff method, and the remaining reflector film constitutes the reflector layer 405.
请继续参阅图32,在所述外延层200的部分第一表面以及所述反射镜层405 上形成所述金属保护层406。形成所述金属保护层406的方法可以是:通过负胶 光刻工艺制成掩模图形,再通过电子束蒸发、溅射、ALD(Atomic layer deposition, 原子层沉积)等工艺来生长金属薄膜,最后通过剥离(lift off)等方法去除掩模和掩 模上的金属薄膜,剩余的金属薄膜构成所述金属保护层406。Continuing to refer to FIG32, the metal protection layer 406 is formed on a portion of the first surface of the epitaxial layer 200 and the reflector layer 405. The method for forming the metal protection layer 406 may be: forming a mask pattern by a negative photolithography process, then growing a metal film by processes such as electron beam evaporation, sputtering, and ALD (Atomic layer deposition), and finally removing the mask and the metal film on the mask by a lift-off method, and the remaining metal film constitutes the metal protection layer 406.
请参阅图33,在所述外延层200的剩余第一表面以及所述金属保护层406 上形成所述第一绝缘保护层304,所述第一绝缘保护层304可以将所述外延层 200和所述金属保护层406与外界隔离,以对所述外延层200和所述金属保护层 406进行保护。Please refer to Figure 33. The first insulating protective layer 304 is formed on the remaining first surface of the epitaxial layer 200 and the metal protective layer 406. The first insulating protective layer 304 can isolate the epitaxial layer 200 and the metal protective layer 406 from the outside to protect the epitaxial layer 200 and the metal protective layer 406.
所以,在形成所述第一绝缘保护层304之后,可以进行刻蚀工艺去除部分 所述第一绝缘保护层304,以使所述金属保护层406的至少部分第一表面露出。Therefore, after forming the first insulating protection layer 304, an etching process may be performed to remove a portion of the first insulating protection layer 304, so that at least a portion of the first surface of the metal protection layer 406 is exposed.
请参阅图34,在所述金属保护层406露出的第一表面上形成所述第二电极 602,所述第二电极602通过所述金属保护层406和所述反射镜层405与所述第 二半导体层203电性连接。本实施例中,所述第二电极602还延伸覆盖了所述 第一绝缘保护层304的部分第一表面。形成所述第二电极602的步骤可以是: 利用光刻和电子束蒸发工艺在金属保护层406露出的第一表面上制备金属材料, 从而形成所述第二电极602。Referring to FIG. 34 , the second electrode 602 is formed on the first surface exposed by the metal protection layer 406, and the second electrode 602 is electrically connected to the second semiconductor layer 203 through the metal protection layer 406 and the reflector layer 405. In this embodiment, the second electrode 602 also extends to cover a portion of the first surface of the first insulating protection layer 304. The step of forming the second electrode 602 may be: preparing a metal material on the first surface exposed by the metal protection layer 406 by photolithography and electron beam evaporation process, thereby forming the second electrode 602.
请参阅图35,执行步骤S200,将所述衬底100与所述垂直结构的LED功 能层构成的LED晶圆键合至所述柔性布线晶圆002上。也就是说,将所述LED 晶圆翻转后键合至所述柔性布线晶圆002上,所述第二电极602的第一表面与 所述柔性布线晶圆002的金属布线层贴合。Referring to FIG. 35 , step S200 is performed to bond the LED wafer consisting of the substrate 100 and the vertical LED functional layer to the flexible wiring wafer 002. That is, the LED wafer is flipped over and bonded to the flexible wiring wafer 002, and the first surface of the second electrode 602 is bonded to the metal wiring layer of the flexible wiring wafer 002.
请参阅图36,执行步骤S300,采用激光剥离工艺或研磨工艺去除所述衬底100,并采用碱性溶液对所述第一半导体层201进行粗化,以增加出光效率。Please refer to FIG. 36 , and execute step S300 to remove the substrate 100 by using a laser lift-off process or a grinding process, and roughen the first semiconductor layer 201 by using an alkaline solution to increase light extraction efficiency.
请继续参阅图36,刻蚀整个所述外延层200以在所述外延层200中形成贯 穿的划片槽700,然后弯曲所述柔性布线晶圆002,使得所述第一绝缘保护层304 自所述划片槽700处断裂。Please continue to refer to FIG. 36 , the entire epitaxial layer 200 is etched to form a scribe line 700 penetrating the epitaxial layer 200 , and then the flexible wiring wafer 002 is bent so that the first insulating protection layer 304 is broken at the scribe line 700 .
作为可选实施例,也可以通过分步刻蚀所述外延层200及所述第一绝缘保 护层304,从而形成贯穿所述外延层200及所述第一绝缘保护层304的所述划片 槽700。As an optional embodiment, the epitaxial layer 200 and the first insulating protective layer 304 may be etched step by step to form the scribe groove 700 penetrating the epitaxial layer 200 and the first insulating protective layer 304.
请参阅图37,整面沉积第二绝缘保护层305,所述第二绝缘保护层305覆 盖所述外延层200所有裸露的表面、所述第一绝缘保护层304所有裸露的表面 以及所述柔性布线晶圆002的第二表面。Please refer to Figure 37. A second insulating protective layer 305 is deposited on the entire surface. The second insulating protective layer 305 covers all exposed surfaces of the epitaxial layer 200, all exposed surfaces of the first insulating protective layer 304, and the second surface of the flexible wiring wafer 002.
请参阅图38,刻蚀所述第二绝缘保护层305以形成露出部分所述第一半导 体层201的第二表面的开口以及露出部分所述柔性布线晶圆002的第二表面的 开口,其中,露出部分所述第一半导体层201的第二表面的开口位于所述第一 半导体层201上,露出部分所述柔性布线晶圆002的第二表面的开口位于所述划片槽700内。然后在所述第二绝缘保护层305的部分第二表面上形成第一电 极601,所述第一电极601还填充所述露出部分所述第一半导体层201的第二表 面的开口以及露出部分所述柔性布线晶圆002的第二表面的开口,如此一来,所述第一电极601可将所述第一半导体层201与所述柔性布线晶圆002的金属 布线层电性连接。Referring to FIG. 38 , the second insulating protective layer 305 is etched to form an opening exposing a portion of the second surface of the first semiconductor layer 201 and an opening exposing a portion of the second surface of the flexible wiring wafer 002, wherein the opening exposing a portion of the second surface of the first semiconductor layer 201 is located on the first semiconductor layer 201, and the opening exposing a portion of the second surface of the flexible wiring wafer 002 is located in the scribe line 700. Then, a first electrode 601 is formed on a portion of the second surface of the second insulating protective layer 305, and the first electrode 601 also fills the opening exposing a portion of the second surface of the first semiconductor layer 201 and the opening exposing a portion of the second surface of the flexible wiring wafer 002, so that the first electrode 601 can electrically connect the first semiconductor layer 201 with the metal wiring layer of the flexible wiring wafer 002.
请参阅图39,执行步骤S400,将所述柔性布线晶圆002与所述支撑晶圆001 分离,并去除所述粘合层003。Please refer to FIG. 39 , and execute step S400 to separate the flexible wiring wafer 002 from the supporting wafer 001 , and remove the adhesive layer 003 .
请继续参阅图39,弯曲所述柔性布线晶圆002,使得所述第二绝缘保护层 305自所述划片槽700处断裂,使得所述LED晶圆的所述芯片区彻底分离。接 下来,沿着所述第二绝缘保护层305的断裂处将所述柔性布线晶圆002裁剪为 预定的形状和尺寸,以形成若干包含至少一个所述芯片区的LED芯片光源,裁 剪后的所述柔性布线晶圆002构成所述LED芯片光源的柔性基底012。Please continue to refer to FIG. 39 , the flexible wiring wafer 002 is bent so that the second insulating protective layer 305 is broken at the scribe groove 700, so that the chip area of the LED wafer is completely separated. Next, the flexible wiring wafer 002 is cut into a predetermined shape and size along the broken part of the second insulating protective layer 305 to form a plurality of LED chip light sources including at least one chip area, and the cut flexible wiring wafer 002 constitutes the flexible substrate 012 of the LED chip light source.
上述实施例仅是举例说明了所述LED功能层的几种结构,应理解,本发明 中的LED功能层不限于此,可适用于所有的倒装结构或垂直结构的LED功能层。The above embodiments are merely examples of several structures of the LED functional layer. It should be understood that the LED functional layer in the present invention is not limited thereto, and is applicable to all LED functional layers with inverted structures or vertical structures.
综上,在本实施例提供的LED芯片光源及其制备方法中,在形成LED晶圆 之后,利用晶圆级键合工艺将所述LED晶圆键合至一柔性布线晶圆上,令所述 LED晶圆的LED功能层与所述柔性布线晶圆的第二表面贴合,再去除所述LED 晶圆的衬底并在所述LED功能层中形成划片槽即可定义出单个的芯片区;沿所 述划片槽可将所述柔性布线晶圆裁剪为预定的形状和尺寸,形成若干包含至少 一个所述芯片区的LED芯片光源,可制备出多种形状和尺寸的LED芯片光源, 裁剪后的所述柔性布线晶圆构成所述LED芯片光源的柔性基底,如此每个所述 LED芯片光源均具备柔性,容易弯曲和折叠,避免将LED芯片制备好后再转移至柔性电路基板上产生的不良率高、效率低、返修率高及成本高等问题,使利 用Mini/MicroLED芯片制备柔性显示屏具备量产可行性。进一步的,本发明提 供的柔性LED芯片光源的单位面积亮度比OLED高数倍,并且可以做大尺寸屏,具有光衰极小、不烧屏、寿命长、成本低的优点。In summary, in the LED chip light source and the preparation method thereof provided in the present embodiment, after forming the LED wafer, the LED wafer is bonded to a flexible wiring wafer by using a wafer-level bonding process, so that the LED functional layer of the LED wafer is bonded to the second surface of the flexible wiring wafer, and then the substrate of the LED wafer is removed and a scribe groove is formed in the LED functional layer to define a single chip area; the flexible wiring wafer can be cut into a predetermined shape and size along the scribe groove to form a plurality of LED chip light sources including at least one chip area, and LED chip light sources of various shapes and sizes can be prepared. The cut flexible wiring wafer constitutes a flexible substrate of the LED chip light source, so that each of the LED chip light sources is flexible and easy to bend and fold, avoiding the problems of high defective rate, low efficiency, high rework rate and high cost caused by transferring the prepared LED chip to the flexible circuit substrate, so that the preparation of flexible display screens using Mini/MicroLED chips has mass production feasibility. Furthermore, the brightness per unit area of the flexible LED chip light source provided by the present invention is several times higher than that of OLED, and can be made into large-size screens. It has the advantages of extremely low light decay, no screen burn-in, long life and low cost.
上述仅为本发明的优选实施例而已,并不对本发明起到任何限制作用。任 何所属技术领域的技术人员,在不脱离本发明的技术方案的范围内,对本发明 揭露的技术方案和技术内容做任何形式的等同替换或修改等变动,均属未脱离 本发明的技术方案的内容,仍属于本发明的保护范围之内。The above are only preferred embodiments of the present invention and do not limit the present invention in any way. Any person skilled in the art may make any equivalent replacement or modification to the technical solution and technical content disclosed in the present invention without departing from the scope of the technical solution of the present invention, which shall be deemed as the content of the technical solution of the present invention and still fall within the protection scope of the present invention.
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