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CN112506609A - Scene depicting method for embedded system time sequence simulation analysis - Google Patents

Scene depicting method for embedded system time sequence simulation analysis Download PDF

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CN112506609A
CN112506609A CN202011402961.7A CN202011402961A CN112506609A CN 112506609 A CN112506609 A CN 112506609A CN 202011402961 A CN202011402961 A CN 202011402961A CN 112506609 A CN112506609 A CN 112506609A
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interrupt
task
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simulation
arrival time
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CN112506609B (en
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朱怡安
李联
齐宗龙
史先琛
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Northwestern Polytechnical University
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    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
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    • G06F9/4812—Task transfer initiation or dispatching by interrupt, e.g. masked

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Abstract

本发明公开了一种嵌入式系统时序仿真分析的场景刻画方法，对已经抽象好的系统进行更加精细的控制。该方法提出了中断到达时间，对于周期中断可以指定其激活时间，对于非周期中断则可以设置其到达的时间、到达的次数、多次到达的平均时间、到达的时间间隔、每次中断到达后是否执行，并且还提出了中断的开关时机，允许中断在某个任务执行结束后对中断进行一定的操作。对任务则提出了任务的偏序关系设置，以及状态机下状态的循环和迁移控制。通过外部控制的方式对仿真过程进行细化，为程序设计人员提供了更大的设计空间，可以使模型更加逼近真实系统，得出的仿真结果能更好的提升系统的确定性。

Figure 202011402961

The invention discloses a scene characterization method for time sequence simulation analysis of an embedded system, which performs more precise control on an already abstracted system. This method proposes the interrupt arrival time. For periodic interrupts, its activation time can be specified. For non-periodic interrupts, its arrival time, the number of arrivals, the average time of multiple arrivals, the time interval between arrivals, and the time after each interrupt arrives can be set. Whether to execute or not, and also proposes the switch timing of the interrupt, allowing the interrupt to perform certain operations on the interrupt after the execution of a certain task. For the task, the partial order relation setting of the task, and the cycle and transition control of the state under the state machine are proposed. The simulation process is refined by means of external control, which provides a larger design space for programmers, which can make the model closer to the real system, and the obtained simulation results can better improve the certainty of the system.

Figure 202011402961

Description

Scene depicting method for embedded system time sequence simulation analysis
Technical Field
The invention belongs to the technical field of embedded systems, and particularly relates to a scene depicting method for simulation analysis.
Background
Embedded systems (Embedded systems) are becoming more and more closely related to people, and 95% of microprocessors in the world are used for Embedded systems. The application field of the embedded system is very wide, in some fields with higher requirements on real-time performance, whether the time sequence characteristics of the embedded system meet the design requirements or not can generate key influence on the operation of the real-time system, and the abnormal time sequence can cause the task execution failure and even cause destructive influence on the system. Therefore, ensuring the embedded software timing design and the correctness of implementation is an important task for embedded software development. With the increasing scale and complexity of embedded systems, time sequence analysis of embedded systems by using modeling and simulation methods is becoming a reasonable choice. In the modeling and simulation processes, because the operation process of the embedded system is complex, a prototype of the system in a real-time system is difficult to accurately restore through simulation by simply modeling the aspects of interruption, tasks, scheduling algorithms and the like, and unpredictable changes can be caused to the simulation process when the model is modified.
In order to solve the problems, the simulation process can accurately correspond to a real system, and the result obtained by the simulation process is meaningful, the simulation process is accurately controlled by adopting a scene depiction method, and the execution of interruption and the switch are accurately controlled so as to deal with the situation which possibly occurs in the real system. And the partial order relation of the tasks and the state machine in the tasks are finely set, and the debugging can be carried out by adopting an external constraint method on the basis of not modifying the original model, so that the operation of related personnel is simplified, the fineness of the model is improved, the simulation result is more reasonable, more accurate reference is provided for program designers, and the certainty of the embedded system is improved.
Disclosure of Invention
In order to overcome the defects of the prior art, the invention provides a scene depicting method for embedded system time sequence simulation analysis, which can be used for more finely controlling an abstracted system. The method provides the arrival time of the interrupt, the activation time of the periodic interrupt can be specified, the arrival time, the arrival times, the average time of multiple arrival, the arrival time interval, whether the interrupt is executed after each time of the interrupt arrival can be set for the non-periodic interrupt, and the switching time of the interrupt is also provided to allow the interrupt to carry out certain operation on the interrupt after the execution of a certain task is finished. And providing the partial order relation setting of the tasks and the circulation and migration control of the state under the state machine for the tasks. The simulation process is refined in an external control mode, a larger design space is provided for program designers, the model can approach a real system more, and the certainty of the system can be improved better by the obtained simulation result.
The technical scheme adopted by the invention for solving the technical problem comprises the following steps:
step 1: establishing an overall model of scene portrayal of embedded system time sequence simulation analysis;
firstly, a scene is integrally depicted, wherein the overall depiction comprises interruption arrival time, a task execution partial sequence relation, cycle control of a state machine, transition control between states and interruption switch time control; the model is as follows:
Scene＝{InterruptArrive,TaskSequence,CycleControl,TransControl,InterruptSwitch}
wherein, interrupt array represents the arrival time of interruption, task sequence represents task partial sequence relation control, CycleControl represents cyclic migration control and migration control between TransControl states, and interrupt switch represents interruption switch timing control;
step 2: establishing an arrival time control model of periodic interruption and non-periodic interruption;
the arrival time model for a periodic interruption is represented as:
ISRArrTimep＝<IDp,ISRTypep,StartTimep>
wherein the IDpUnique identifier, ISRType, representing a periodic interruptpIndicates the type of interrupt, StartTimepRepresents the start time of the periodic interruption; in the simulation process, the cycle interrupt arrives at the specified arrival time, not immediately at the beginning of the simulation, and the arrival time refers to the interruption from the beginning of the simulation to the cycle interruptTime interval to start execution or to start response;
the arrival time of the aperiodic interrupt is expressed as:
InterruptArrTimeT＝<IDT,ISRTypeT,StartTimeT,ExeOrNotT>
wherein InterruptArrTimeTRepresenting the arrival time, ID, of an aperiodic interruptTUnique identifier representing an aperiodic interrupt, ISRTypeTType of interrupt, StartTimeTRepresenting the arrival time of an aperiodic interrupt, ExeOrnotTRepresents whether each arrival is performed;
wherein the arrival time StartTime of the aperiodic interruptTMultiple values can be set, representing the case of multiple arrivals of an interrupt, as follows:
StartTimeT＝{Time1,Time2,...,Timen}
wherein Time1,Time2,…TimenRepresenting the arrival time of each aperiodic interrupt, and a plurality of arrival times represent that the aperiodic interrupt arrives a plurality of times, but each interrupt arrival can be followed by setting ExeOrNotTWhether the interrupt is executed or not is operated, which is expressed as follows:
ExeOrNotT＝{Exe1,Exe2,...,Exen}
wherein Exe1,Exe2,…,ExenNumber of parameters and StartTime representing whether the interrupt is executed each time after reaching multiple timesTThe consistency is achieved;
and step 3: establishing a model of task partial order relation;
the set of tasks executed in the system is Task ═ T1,T2,...,TnN is larger than or equal to 2, and the tasks in the set have a partial order relationship:
TaskSequence＝{Tn,...,Tm},Tn,...,Tm∈Task
partial order relationship, i.e. the execution order of the pre-designed tasks, where Tn,...,TmRepresenting a set of partial tasks to be performed in the system, in terms of setsThe sequence of the task arrangement in the combination represents the partial sequence relation between the tasks;
and 4, step 4: establishing a cyclic migration control model
CycleControl＝{ID,StartTask,StartStatus,EndStatus,CycleCount}
Wherein ID represents a unique identifier of the loop migration control variable, StartTask represents a task identifier where the loop is executed, StartStatus represents a state identifier of the start of the loop, EndStatus represents a state of the end of the state loop, StartStatus and EndStatus are arbitrary states of the state machine in StartTask, and CycleCount represents the number of state loops CycleCount ∈ {1, 2...., n };
and 5: establishing a state transition control execution model:
TransControl＝{ID1,InitialVal,TransTask,StartStatus1,VarVal,ToStatus,NewVal}
where ID1 represents the unique identifier of the state transition control variable, InitialVal represents the initial value of the variable, InitialVal ∈ {1, 2.. n }, TransTask represents the task identifier of the state transition, StartStatus1 represents the initial state of the state transition, and VarVal represents the value before the global variable of the state transition transitions, VarVal represents the value before the global variable of the state transition transitionsiE {1, 2.. n }, ToStatus represents a migrated state, and NewVal represents a variable value NewVal after state migration, which belongs to {1, 2.. n };
step 6: modeling the center-to-center disconnection switch:
InterruptSwitch＝{ID2,SwitchTask,SwitchStart,Release,ControlType,ISRID}
wherein ID2 is a unique identifier of an interrupt switch control variable, SwitchTask represents an identifier of a task to be executed, SwitchStart represents an operation to be executed by the task, and Release represents a task or job generated after the task is executed; the ControlType represents the operation quantity ControlType epsilon { On, Off } for the interrupt, namely, the On operation or the Off operation of the interrupt is defined; ISRID represents an interrupt identifier that is operated on;
and 7: the scene of embedded system time sequence simulation analysis is depicted;
step 7-1: checking the real system interrupt of the embedded system, and setting the interrupt arrival time of the embedded system simulation system according to the interrupt arrival time of the real system; if the interruption of the real system is periodic interruption, setting the activation time of the periodic interruption of the simulation system; if the interruption of the real system is non-periodic interruption and the interruption only reaches once, setting the arrival time of the interruption in the simulation system; if the interrupt of the real system arrives for a plurality of times, setting the average arrival time, the arrival times and the time interval of each arrival of the interrupt which arrives for a plurality of times in the simulation system, and setting whether to operate the interrupt after each interrupt arrival;
step 7-2: analyzing the task execution in the real system, abstracting according to a task set with a partial order relation in the real system, and setting a task execution sequence in the simulation system; if the simulation process violates the set partial order relationship, prompting the user to modify the design;
and 7-3: analyzing a state machine in a real system, if the condition that a plurality of state cycles under the state machine are executed for a plurality of times and then are cut off exists, setting a simulation system state cycle control module, and restricting the execution times of a cycle body and controlling the cycle to jump out in the simulation process;
and 7-4: if the state machine in the real system has different state transition results under different conditions, setting state transition control for simulation: firstly, setting an initial value InitialValue of a state transition control model, setting a condition value for transition to different states and a change value NewValue of a model value after execution, judging execution state transition operation by detecting whether the model value is the same as the set condition value, and assigning the model value as the set change value NewValue;
and 7-5: acquiring a precondition of a real system interrupt switch; the time for setting the interrupt switch in the simulation system: setting to perform switch interruption before the execution of the specified task or perform switch interruption after the execution of the specified task or generate another task to perform switch interruption by the specified task;
in the simulation process, a control variable of an interrupt switch is set, a task switch task of switch interrupt is set according to requirements, or an operation switch start under the task is set, or a released task Release is used as a mark, the target interrupt ISRID is switched, and the switching operation or the switching operation is controlled by setting a controlType.
The invention has the beneficial effects that: the scene depicting method for embedded system time sequence simulation analysis provided by the invention can control the simulation process more finely by the scene depicting method, so that the designed simulation system can approach to a real system more, interrupt, task and state machine can be controlled finely by the scene depicting method, the simulation process is more transparent, the modeling work of simulation is simplified, the true degree of the model is improved, the universality and accuracy of the simulation system are improved, the accuracy of embedded system design is indirectly improved, and the certainty of the embedded system is improved.
Drawings
FIG. 1 is a frame diagram of an embedded system timing simulation analysis scenario depiction in accordance with the present invention.
Detailed Description
The invention is further illustrated with reference to the following figures and examples.
The invention provides an operation scene model for real-time system simulation, which is used for restraining the simulation process of a system, improving the accuracy of a real-time system simulation model and enabling the model to be closer to a real system. Because the embedded system is limited by many factors in the actual operation process, the execution process is complex, the operation process of the real system is difficult to accurately restore only according to the basic configuration information of the general interrupt module and the task module, and the practicability of the simulation result is reduced, an external control method is needed for fine adjustment of the simulation process. All components in the system are unified to be used as a part of simulation operation, and the execution action of each component is carefully designed, so that each component can perform specific action at specific time, the whole simulation process is consistent with the operation mode of an actual system, the accuracy of modeling simulation analysis of the embedded system is improved, and the design of the embedded system is facilitated.
As shown in fig. 1, the present invention provides a scene depicting method for embedded system time sequence simulation analysis, which comprises the following steps:
step 1: establishing an overall model of scene portrayal of embedded system time sequence simulation analysis;
firstly, a scene is integrally depicted, wherein the overall depiction comprises interruption arrival time, a task execution partial sequence relation, cycle control of a state machine, transition control between states and interruption switch time control; the model is as follows:
Scene＝{InterruptArrive,TaskSequence,CycleControl,TransControl,InterruptSwitch}
wherein, interrupt array represents the arrival time of interruption, task sequence represents task partial sequence relation control, CycleControl represents cyclic migration control and migration control between TransControl states, and interrupt switch represents interruption switch timing control;
step 2: establishing an arrival time control model of periodic interruption and non-periodic interruption;
the arrival time model for a periodic interruption is represented as:
ISRArrTimep＝<IDp,ISRTypep,StartTimep>
wherein the IDpUnique identifier, ISRType, representing a periodic interruptpIndicates the type of interrupt, StartTimepRepresents the start time of the periodic interruption; in the simulation process, the cycle interrupt arrives at a specified arrival time, rather than immediately arriving at the beginning of the simulation, wherein the arrival time refers to the time interval from the beginning of the simulation to the beginning of the execution or the beginning of the response of the cycle interrupt;
the arrival time of the aperiodic interrupt is expressed as:
InterruptArrTimeT＝<IDT,ISRTypeT,StartTimeT,ExeOrNotT>
wherein InterruptArrTimeTRepresenting the arrival time, ID, of an aperiodic interruptTUnique identifier representing an aperiodic interrupt, ISRTypeTType of interrupt, StartTimeTRepresenting the arrival time of an aperiodic interrupt, ExeOrnotTRepresenting each arrival asOtherwise, executing;
wherein the arrival time StartTime of the aperiodic interruptTMultiple values can be set, representing the case of multiple arrivals of an interrupt, as follows:
StartTimeT＝{Time1,Time2,...,Timen}
wherein Time1,Time2,…TimenRepresenting the arrival time of each aperiodic interrupt, and a plurality of arrival times represent that the aperiodic interrupt arrives a plurality of times, but each interrupt arrival can be followed by setting ExeOrNotTWhether the interrupt is executed or not is operated, which is expressed as follows:
ExeOrNotT＝{Exe1,Exe2,...,Exen}
wherein Exe1,Exe2,…,ExenNumber of parameters and StartTime representing whether the interrupt is executed each time after reaching multiple timesTThe consistency is achieved;
and step 3: establishing a model of task partial order relation;
the set of tasks executed in the system is Task ═ T1,T2,...,TnN is larger than or equal to 2, and the tasks in the set have a partial order relationship:
TaskSequence＝{Tn,...,Tm},Tn,...,Tm∈Task
partial order relationship, i.e. the execution order of the pre-designed tasks, where Tn,...,TmRepresenting a part of task sets executed in the system, and representing the partial order relation among the tasks according to the sequence of the task arrangement in the sets;
and 4, step 4: establishing a cyclic migration control model
CycleControl＝{ID,StartTask,StartStatus,EndStatus,CycleCount}
Wherein ID represents a unique identifier of the loop migration control variable, StartTask represents a task identifier where the loop is executed, StartStatus represents a state identifier of the start of the loop, EndStatus represents a state of the end of the state loop, StartStatus and EndStatus are arbitrary states of the state machine in StartTask, and CycleCount represents the number of state loops CycleCount ∈ {1, 2...., n };
and 5: establishing a state transition control execution model:
TransControl＝{ID1,InitialVal,TransTask,StartStatus1,VarVal,ToStatus,NewVal}
where ID1 represents the unique identifier of the state transition control variable, InitialVal represents the initial value of the variable, InitialVal ∈ {1, 2.. n }, TransTask represents the task identifier of the state transition, StartStatus1 represents the initial state of the state transition, and VarVal represents the value before the global variable of the state transition transitions, VarVal represents the value before the global variable of the state transition transitionsiE {1, 2.. n }, ToStatus represents a migrated state, and NewVal represents a variable value NewVal after state migration, which belongs to {1, 2.. n };
step 6: modeling the center-to-center disconnection switch:
InterruptSwitch＝{ID2,SwitchTask,SwitchStart,Release,ControlType,ISRID}
wherein ID2 is a unique identifier of an interrupt switch control variable, SwitchTask represents an identifier of a task to be executed, SwitchStart represents an operation to be executed by the task, and Release represents a task or job generated after the task is executed; the ControlType represents the operation quantity ControlType epsilon { On, Off } for the interrupt, namely, the On operation or the Off operation of the interrupt is defined; ISRID represents an interrupt identifier that is operated on;
and 7: the scene of embedded system time sequence simulation analysis is depicted;
step 7-1: checking the real system interrupt of the embedded system, and setting the interrupt arrival time of the embedded system simulation system according to the interrupt arrival time of the real system; if the interruption of the real system is periodic interruption, setting the activation time of the periodic interruption of the simulation system; if the interruption of the real system is non-periodic interruption and the interruption only reaches once, setting the arrival time of the interruption in the simulation system; if the interrupt of the real system arrives for a plurality of times, setting the average arrival time, the arrival times and the time interval of each arrival of the interrupt which arrives for a plurality of times in the simulation system, and setting whether to operate the interrupt after each interrupt arrival;
step 7-2: analyzing the task execution in the real system, abstracting according to a task set with a partial order relation in the real system, and setting a task execution sequence in the simulation system; if the simulation process violates the set partial order relationship, prompting the user to modify the design;
and 7-3: analyzing a state machine in a real system, if the condition that a plurality of state cycles under the state machine are executed for a plurality of times and then are cut off exists, setting a simulation system state cycle control module, and restricting the execution times of a cycle body and controlling the cycle to jump out in the simulation process;
and 7-4: if the state machine in the real system has different state transition results under different conditions, setting state transition control for simulation: firstly, setting an initial value InitialValue of a state transition control model, setting a condition value for transition to different states and a change value NewValue of a model value after execution, judging execution state transition operation by detecting whether the model value is the same as the set condition value, and assigning the model value as the set change value NewValue;
and 7-5: acquiring a precondition of a real system interrupt switch; when the time for setting the interrupt switch in the simulation system is found, a situation that a certain interrupt needs to be turned on or turned off after a certain task (or job) is executed usually occurs in a real system, or a situation that another task needs to be turned on or turned off after a certain task (or job) is executed occurs. In the simulation process, a control variable of an interrupt switch is set, a task switch task interrupted by the switch is set according to requirements, or a certain operation switch start under the task is set, or a certain task Release is issued as a mark, the target interrupt ISRID is switched, and the specific operation can be controlled to be on or off by setting a controlType.

Claims (1)

1.一种嵌入式系统时序仿真分析的场景刻画方法，其特征在于，包括以下步骤：1. a scene characterization method of embedded system timing simulation analysis, is characterized in that, comprises the following steps: 步骤1：建立嵌入式系统时序仿真分析的场景刻画的总体模型；Step 1: Establish an overall model for the scene characterization of the embedded system timing simulation analysis; 首先对场景整体进行刻画，其中包括中断到达时间、任务执行偏序关系、状态机的循环控制、状态之间迁移控制、中断开关时机控制；模型如下：First, the whole scene is described, including interrupt arrival time, partial order relationship of task execution, loop control of state machine, transition control between states, and interrupt switch timing control; the model is as follows: Scene＝{InterruptArrive,TaskSequence,CycleControl,TransControl,InterruptSwitch}Scene={InterruptArrive,TaskSequence,CycleControl,TransControl,InterruptSwitch} 其中InterruptArrive代表中断的到达时间，TaskSequence代表任务偏序关系控制，CycleControl代表循环迁移控制，TransControl状态之间的迁移控制，InterruptSwitch代表中断开关时机控制；Among them, InterruptArrive represents the arrival time of the interrupt, TaskSequence represents the task partial order relationship control, CycleControl represents the cycle migration control, the transition control between TransControl states, and InterruptSwitch represents the interrupt switch timing control; 步骤2：建立周期中断以及非周期中断的到达时间控制模型；Step 2: Establish the arrival time control model of periodic interrupt and aperiodic interrupt; 周期中断的达到时间模型表示为：The arrival time model for periodic interrupts is expressed as: ISRArrTimep＝<IDp,ISRTypep,StartTimep>ISRArrTime p =<ID p ,ISRType p ,StartTime p > 其中IDp表示周期中断的唯一标识符，ISRTypep表示中断的类型，StartTimep代表周期中断的开始时间；在仿真过程中，周期中断在指定的到达时间到达，而不是在仿真开始时即刻到达，到达时间指在仿真开始到周期中断开始执行或者开始进行响应的时间间隔；Where ID p represents the unique identifier of the periodic interrupt, ISRType p represents the type of the interrupt, and StartTime p represents the start time of the periodic interrupt; during the simulation process, the periodic interrupt arrives at the specified arrival time, not immediately at the start of the simulation, Arrival time refers to the time interval between the start of simulation and the start of execution or response of periodic interrupts; 非周期中断的到达时间表示为：The arrival time of an aperiodic interrupt is expressed as: InterruptArrTimeT＝<IDT,ISRTypeT,StartTimeT,ExeOrNotT>InterruptArrTime T =<ID T ,ISRType T ,StartTime T ,ExeOrNot T > 其中InterruptArrTimeT代表非周期中断到达时间，IDT代表非周期中断的唯一标识符，ISRTypeT代表中断的类型,，StartTimeT代表非周期中断的到达时间，ExeOrNotT代表每次到达是否执行；Among them, InterruptArrTime T represents the arrival time of the aperiodic interrupt, ID T represents the unique identifier of the aperiodic interrupt, ISRType T represents the type of the interrupt, StartTime T represents the arrival time of the aperiodic interrupt, and ExeOrNot T represents whether to execute each time it arrives; 其中非周期中断的到达时间StartTimeT能够设置多个值，代表中断多次到达的情况，表示如下：Among them, the arrival time StartTime T of aperiodic interrupts can be set to multiple values, representing the situation that interrupts arrive multiple times, as follows: StartTimeT＝{Time1,Time2,...,Timen}StartTime T ={Time 1 ,Time 2 ,...,Time n } 其中Time1,Time2,…Timen,代表每个非周期中断的到达时间，多个到达时间表示非周期中断到达多次，但每次中断到达后能够通过设置ExeOrNotT操作该次中断是否执行，表示如下：Among them Time 1 , Time 2 ,…Time n , represent the arrival time of each aperiodic interrupt, and multiple arrival times indicate that the aperiodic interrupt arrives multiple times, but after each interrupt arrives, you can set ExeOrNot T to operate whether the interrupt is executed or not. , expressed as follows: ExeOrNotT＝{Exe1,Exe2,...,Exen}ExeOrNot T = {Exe 1 ,Exe 2 ,...,Exe n } 其中Exe1,Exe2,…,Exen,代表中断到达多次后每次是否执行，参数数量与StartTimeT一致；Among them, Exe 1 , Exe 2 ,…, Exen , represent whether to execute each time after the interrupt arrives multiple times, and the number of parameters is consistent with StartTime T ; 步骤3：建立任务偏序关系的模型；Step 3: Build a model of task partial order relationship; 系统中执行的任务集合为Task＝{T1,T2,...,Tn},n≥2，集合中的任务之间存在偏序关系：The set of tasks executed in the system is Task={T 1 ,T 2 ,...,T n },n≥2, and there is a partial order relationship between the tasks in the set: TaskSequence＝{Tn,...,Tm},Tn,...,Tm∈TaskTaskSequence={T n ,...,T m },T n ,...,T m ∈Task 偏序关系即预先设计任务的执行顺序，其中Tn,...,Tm代表系统中执行的部分任务集合，按照集合中任务排列的先后顺序代表任务之间的偏序关系；The partial order relationship is the execution order of the pre-designed tasks, where T n ,...,T m represents the partial task set executed in the system, and the order of the tasks in the set represents the partial order relationship between the tasks; 步骤4：建立循环迁移控制模型Step 4: Build the Cyclic Migration Control Model CycleControl＝{ID,StartTask,StartStatus,EndStatus,CycleCount}CycleControl={ID, StartTask, StartStatus, EndStatus, CycleCount} 其中ID代表循环迁移控制变量的唯一标识符，StartTask代表循环执行所在的任务标识符，StartStatus代表循环开始的状态标识符，EndStatus代表状态循环结束的状态，StartStatus和EndStatus为StartTask中的状态机的任意状态，CycleCount代表状态循环的次数CycleCount∈{1,2,...,n}；Among them, ID represents the unique identifier of the loop migration control variable, StartTask represents the task identifier where the loop is executed, StartStatus represents the status identifier of the loop start, EndStatus represents the state of the end of the state loop, and StartStatus and EndStatus are any of the state machines in StartTask. State, CycleCount represents the number of state cycles CycleCount∈{1,2,...,n}; 步骤5：建立状态迁移控制进行模型：Step 5: Establish a model for state transition control: TransControl＝{ID1,InitialVal,TransTask,StartStatus1,VarVal,ToStatus,NewVal}TransControl={ID1,InitialVal,TransTask,StartStatus1,VarVal,ToStatus,NewVal} 其中ID1代表状态迁移控制变量的唯一标识符，InitialVal代表该变量的初始值InitialVal∈{1,2,...n}，TransTask代表状态迁移的任务标识符，StartStatus1代表状态迁移的起始状态，VarVal代表状态迁移全局变量迁移之前的值VarVali∈{1,2,...n}，ToStatus代表迁移到的状态，NewVal代表状态迁移后的变量值NewVal∈{1,2,...n}；ID1 represents the unique identifier of the state transition control variable, InitialVal represents the initial value of the variable InitialVal∈{1,2,...n}, TransTask represents the task identifier of the state transition, StartStatus1 represents the start state of the state transition, VarVal represents the value of the state transition global variable before migration VarVal i ∈{1,2,...n}, ToStatus represents the state to which it was migrated, and NewVal represents the variable value after the state transition NewVal∈{1,2,...n }; 步骤6：对中断开关进行建模：Step 6: Model the interrupt switch: InterruptSwitch＝{ID2,SwitchTask,SwitchStart,Release,ControlType,ISRID}InterruptSwitch={ID2,SwitchTask,SwitchStart,Release,ControlType,ISRID} 其中ID2为中断开关控制变量唯一标识符，SwitchTask代表执行任务的识符，SwitchStart代表任务执行的操作，Release代表任务执行后生成的任务或者作业；ControlType代表对中断的操作量ControlType∈{On,Off}，即定义中断的开操作或者关操作；ISRID代表被操作的中断标识符；Among them, ID2 is the unique identifier of the interrupt switch control variable, SwitchTask represents the identifier of the executing task, SwitchStart represents the operation performed by the task, Release represents the task or job generated after the task is executed; ControlType represents the amount of operation on the interrupt ControlType∈{On,Off }, which defines the on or off operation of the interrupt; ISRID represents the interrupt identifier being operated; 步骤7：嵌入式系统时序仿真分析的场景刻画；Step 7: Scene characterization of embedded system timing simulation analysis; 步骤7-1：检查嵌入式系统真实系统中断，根据真实系统的中断到达时间设置嵌入式系统仿真系统的中断到达时间；如果真实系统的中断是周期中断，则设置仿真系统周期中断的激活时间；如果真实系统的中断是非周期中断，并且该中断只到达一次，则设置仿真系统中该中断到达时间；如果真实系统的中断到达多次，则设置仿真系统中多次到达的中断的平均到达时间、到达次数、每次到达的时间间隔、并且设置每次中断到达之后是否运行该中断；Step 7-1: Check the real system interruption of the embedded system, and set the interruption arrival time of the embedded system simulation system according to the interruption arrival time of the real system; if the interruption of the real system is a periodic interruption, set the activation time of the simulation system period interruption; If the interrupt of the real system is an aperiodic interrupt, and the interrupt arrives only once, set the arrival time of the interrupt in the simulation system; if the interrupt of the real system arrives multiple times, set the average arrival time of the interrupts that arrive multiple times in the simulation system, The number of arrivals, the time interval for each arrival, and whether to run the interrupt after each interrupt arrives; 步骤7-2：对真实系统中的任务执行进行分析，根据真实系统中有偏序关系的任务集合进行抽象，在仿真系统中设置任务执行的序列；如果仿真过程对设置的偏序关系产生违背，则提示用户修改设计；Step 7-2: Analyze the task execution in the real system, abstract according to the task set with partial order relationship in the real system, and set the task execution sequence in the simulation system; if the simulation process violates the set partial order relationship , the user is prompted to modify the design; 步骤7-3：对真实系统中的状态机进行分析，如果存在状态机下的数个状态循环执行数次后截止的情况，则设置仿真系统状态循环控制模块，在仿真过程中约束循环体的执行次数并且控制循环跳出；Step 7-3: Analyze the state machine in the real system. If there is a situation where several state loops under the state machine are executed for several times and then terminated, set the state loop control module of the simulation system to constrain the loop body during the simulation process. The number of executions and the control loop jumps out; 步骤7-4：如果真实系统中的状态机在不同情况下的状态迁移的结果不同，则设置状态迁移控制进行仿真：首先设置状态迁移控制模型初值InitialValue，并且设置迁移到不同状态的条件值与执行完毕后模型值的改变值NewValue，通过检测模型值是否与设置的条件值相同来判断执行状态迁移操作，并且将模型值赋值为设置的改变值NewValue；Step 7-4: If the state transition results of the state machine in the real system are different under different conditions, set the state transition control for simulation: first set the initial value of the state transition control model InitialValue, and set the conditional value of transition to different states The state transition operation is judged by detecting whether the model value is the same as the set condition value, and the model value is assigned as the set change value NewValue; 步骤7-5：获取真实系统中断开关的前置条件；在仿真系统中设置中断开关的时机：设置在指定任务执行之前进行开关中断或者指定任务执行之后进行开关中断或者指定任务产生了另一个任务进行开关中断；Step 7-5: Obtain the preconditions of the real system interrupt switch; the timing of setting the interrupt switch in the simulation system: set the switch interrupt before the execution of the specified task or the switch interrupt after the execution of the specified task, or the specified task generates another task perform switch interruption; 在仿真过程中通过设置中断开关的控制变量，根据需求设置开关中断的任务SwitchTask，或是该任务下的作业SwitchStart，或是以发布了任务Release作为标志，对目标中断ISRID进行开关操作，通过设置ControlType来控制开操作还是关操作。In the simulation process, by setting the control variable of the interrupt switch, set the interrupt task SwitchTask, or the job SwitchStart under the task, or use the task Release as a flag to switch the target interrupt ISRID according to the requirements. ControlType to control on or off operation.
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