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CN112436059A - Flexible InGaZnO thin film transistor and preparation method thereof - Google Patents

Flexible InGaZnO thin film transistor and preparation method thereof Download PDF

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Publication number
CN112436059A
CN112436059A CN202011179144.XA CN202011179144A CN112436059A CN 112436059 A CN112436059 A CN 112436059A CN 202011179144 A CN202011179144 A CN 202011179144A CN 112436059 A CN112436059 A CN 112436059A
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ingazno
thin film
flexible
layer
source electrode
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宋家琪
郑克丽
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Shenzhen Technology University
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Shenzhen Technology University
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/674Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6755Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0321Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/674Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6755Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate
    • H10D30/6756Amorphous oxide semiconductors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/124Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions

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Abstract

本发明公开了一种柔性InGaZnO薄膜晶体管及制备方法。柔性InGaZnO薄膜晶体管,包括:柔性衬底、缓冲层、ITO栅极、高K介质层、InGaZnO有源层、源极、漏极,柔性衬底为柔性PI衬底,缓冲层位于柔性衬底上侧,ITO栅极位于缓冲层上侧,高K介质层位于ITO栅极上侧,InGaZnO有源层位于高K介质层上侧,源极位于有源层上侧,源极设置为圆柱结构,漏极位于有源层上侧,漏极设置为圆环结构,源极位于漏极中心。通过将源极设置为圆柱结构,将漏极设置为圆环结构,实现了中心对称型的沟道形状和传导电流分布,对机械形变和应力仍具备各项同性的特点,极大提升了InGaZnO薄膜晶体管的电学稳定性。

Figure 202011179144

The invention discloses a flexible InGaZnO thin film transistor and a preparation method. Flexible InGaZnO thin film transistor, including: flexible substrate, buffer layer, ITO gate, high-K dielectric layer, InGaZnO active layer, source electrode, drain electrode, the flexible substrate is a flexible PI substrate, and the buffer layer is located on the flexible substrate The ITO gate is located on the upper side of the buffer layer, the high-K dielectric layer is located on the upper side of the ITO gate, the InGaZnO active layer is located on the upper side of the high-K dielectric layer, the source electrode is located on the upper side of the active layer, and the source electrode is set to a cylindrical structure, The drain electrode is located on the upper side of the active layer, the drain electrode is arranged in a ring structure, and the source electrode is located in the center of the drain electrode. By setting the source electrode as a cylindrical structure and the drain electrode as a ring structure, the center-symmetric channel shape and conduction current distribution are realized, and the mechanical deformation and stress are still isotropic, which greatly improves the InGaZnO Electrical stability of thin film transistors.

Figure 202011179144

Description

Flexible InGaZnO thin film transistor and preparation method thereof
Technical Field
The invention relates to the technical field of thin film transistors, in particular to a flexible InGaZnO thin film transistor and a preparation method thereof.
Background
Thin film transistors, as three-terminal electronic devices, are a common basic unit for many modern electronic devices, including: flexible displays, organic electroluminescent displays and lighting, chemical and biological sensors, flexible photovoltaics, flexible logic and storage, flexible batteries, wearable devices, and the like. But conventional transistorsMost of channel materials are monocrystalline silicon, polycrystalline silicon, amorphous silicon and the like, and due to the intrinsic properties of the materials, the channel materials face development bottlenecks and cannot meet the diversified requirements of future electronic equipment. InGaZnO as a novel oxide semiconductor material has not only high electron mobility ()>50cm2V-1s-1) Also belonging to amorphous structure (crystallization temperature)>500 ℃) and the high light transmittance in the visible light band is suitable for diversified application scenes. In addition, InGaZnO has a lower defect state density in the forbidden band and still maintains normal TFT performance output at a radius of curvature of 13 μm. And finally, the preparation process of the InGaZnO material is compatible with the existing Si-based process, so that the production cost of an industrial chain can be greatly reduced.
In the related art, the source electrode and the drain electrode of the rigid InGaZnO thin film transistor mainly adopt rectangular symmetrical structures, and the corresponding photoetching process is mature. However, for a flexible InGaZnO thin film transistor, a rectangular source electrode and a rectangular drain electrode can cause uneven electric field intensity distribution, especially an electric field concentration effect can be formed in corner regions of the electrodes, so that the electrical stability of the InGaZnO thin film transistor is reduced, meanwhile, the mechanical stress in a rectangular electrode structure can cause large change of carrier concentration, the bending stress in the rectangular electrode structure has obvious differentiation in the direction, and the bending stress in the direction perpendicular to or parallel to the channel current direction can cause obvious different performance drifts.
Disclosure of Invention
The present invention is directed to solving at least one of the problems of the prior art. Therefore, the flexible InGaZnO thin film transistor provided by the invention has the characteristic of isotropy to mechanical deformation and stress, and the electrical stability of the InGaZnO thin film transistor is greatly improved.
According to a first aspect of the invention, the flexible InGaZnO thin film transistor comprises: the flexible substrate is a flexible PI substrate; the buffer layer is positioned on the upper side of the flexible substrate; the ITO grid electrode is positioned on the upper side of the buffer layer; the high-K dielectric layer is positioned on the upper side of the ITO grid; the InGaZnO active layer is positioned on the upper side of the high-K dielectric layer; the source electrode is positioned on the upper side of the active layer and is of a cylindrical structure; the drain electrode is positioned on the upper side of the active layer and is of a circular ring structure, and the source electrode is positioned in the center of the drain electrode.
The flexible InGaZnO thin film transistor provided by the embodiment of the invention at least has the following beneficial effects: the source electrode is set to be of a cylindrical structure, the drain electrode is set to be of a circular ring structure, the centrosymmetric channel shape and conduction current distribution are achieved, the characteristics of isotropy of mechanical deformation and stress are still achieved, and the electrical stability of the InGaZnO thin film transistor is greatly improved.
According to some embodiments of the invention, the buffer layer is an alumina buffer layer.
According to the preparation method of the flexible InGaZnO thin film transistor, the preparation method comprises the following steps: providing a flexible PI substrate; sequentially forming a buffer layer, an ITO grid electrode, a high-K dielectric layer and an InGaZnO active layer on the flexible PI substrate; and forming a source electrode and a drain electrode on the InGaZnO active layer, wherein the source electrode is of a cylindrical structure, the drain electrode is of a circular ring structure, and the source electrode is positioned in the center of the drain electrode.
According to some embodiments of the invention, the buffer layer is an aluminum oxide film prepared using an atomic layer deposition process, the aluminum oxide film having a thickness of 100 nm.
According to some embodiments of the invention, the ITO gate is an ITO thin film prepared using a magnetron sputtering process, and the thickness of the ITO thin film is 100 nm.
According to some embodiments of the invention, the high-K dielectric layer is a high-K dielectric film prepared by using a magnetron sputtering process, the thickness of the high-K dielectric film is 40nm to 60nm, and the high-K dielectric film is annealed in a nitrogen atmosphere.
According to some embodiments of the present invention, the InGaZnO active layer is an InGaZnO thin film prepared using a magnetron sputtering process, the InGaZnO thin film has a thickness of 50nm, and a growth rate of the InGaZnO thin film is 1 nm/min.
According to some embodiments of the present invention, a photoresist pattern of the source electrode and the drain electrode is formed on the InGaZnO active layer through a photolithography and development process, a double metal layer structure is formed through a thermal evaporation process, and the source electrode and the drain electrode are formed through a photoresist stripping process.
Additional aspects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.
Drawings
The invention is further described with reference to the following figures and examples, in which:
FIG. 1 is a schematic diagram of a flexible InGaZnO thin film transistor structure according to an embodiment of the invention;
reference numerals:
the flexible substrate 110, the buffer layer 120, the ITO gate 130 and the high-K dielectric layer 140;
an InGaZnO active layer 150, a source electrode 160, and a drain electrode 170.
Detailed Description
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the accompanying drawings are illustrative only for the purpose of explaining the present invention, and are not to be construed as limiting the present invention.
In the description of the present invention, it should be understood that the orientation or positional relationship referred to in the description of the orientation, such as the upper, lower, front, rear, left, right, etc., is based on the orientation or positional relationship shown in the drawings, and is only for convenience of description and simplification of description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus, should not be construed as limiting the present invention.
In the description of the present invention, unless otherwise explicitly limited, terms such as arrangement, installation, connection and the like should be understood in a broad sense, and those skilled in the art can reasonably determine the specific meanings of the above terms in the present invention in combination with the specific contents of the technical solutions.
Interpretation of terms:
the InGaZnO (indium Gallium Zinc oxide) is a novel semiconductor material, has higher electron mobility compared with amorphous silicon, and is used for preparing an active layer of a thin film transistor.
Ito (indium Tin oxide), indium Tin oxide, has better visible light transmittance and flexibility than a single metal material.
The high-K dielectric layer, a high-K dielectric layer, has good insulation properties and is generally made of nitride, metal oxide or ferroelectric material.
Flexible pi (polyimide) substrates, polyimide substrates, are organic polymer materials and widely used as substrates in flexible displays.
In some embodiments of the present invention, referring to fig. 1, a flexible InGaZnO thin film transistor includes: the flexible substrate 110 is a flexible PI substrate, the buffer layer 120 is located on the upper side of the flexible substrate 110, the ITO grid 130 is located on the upper side of the buffer layer 120, the high-K dielectric layer 140 is located on the upper side of the ITO grid 130, the InGaZnO active layer 150 is located on the upper side of the high-K dielectric layer 140, the source electrode 160 is located on the upper side of the active layer, the source electrode 160 is of a cylindrical structure, the drain electrode 170 is located on the upper side of the active layer, the drain electrode 170 is of a circular ring structure, and the source electrode 160 is located in the center of the drain electrode 170.
The flexible InGaZnO thin film transistor of the present invention employs a cylindrical source electrode 160 and a circular ring-shaped drain electrode 170 surrounding the source electrode 160 instead of the conventional rectangular structure. The electrode structure realizes the centrosymmetric channel shape and conduction current distribution, has more uniform annular electric field intensity distribution, avoids sharp shape design and greatly improves the electrical stability of the InGaZnO thin film transistor. When the device is subjected to mechanical deformation or stress, the circular structure device has the characteristic of isotropy, the flexibility of the flexible InGaZnO thin film transistor can be effectively improved, infinite output resistance can be realized through the structural design of the inner ring source 160 and the outer ring drain 170, and the external current driving of the InGaZnO thin film transistor is facilitated.
In some embodiments, the buffer layer 120 is an alumina buffer layer 120. The alumina has compact structure and strong defect covering capability, and can reduce the upward diffusion of water vapor in the preparation process of the flexible PI substrate as the buffer layer 120. In other embodiments, the buffer layer 120 may be a multi-layer, such as a silicon nitride layer disposed on the substrate to increase adhesion with the substrate, and an aluminum oxide layer disposed on the top layer.
In some embodiments of the present invention, a method for manufacturing a flexible InGaZnO thin film transistor is provided, including: providing a flexible PI substrate; sequentially forming a buffer layer 120, an ITO gate 130, a high-K dielectric layer 140 and an InGaZnO active layer 150 on the flexible PI substrate 110; a source electrode 160 and a drain electrode 170 are formed on the InGaZnO active layer 150, the source electrode 160 is disposed in a cylindrical structure, the drain electrode 170 is disposed in a circular ring structure, and the source electrode 160 is positioned at the center of the drain electrode 170.
In some embodiments, the buffer layer 120 is an aluminum oxide film prepared using an atomic layer deposition process, and the thickness of the aluminum oxide film is 100 nm. After the preparation is finished, ultrasonic cleaning is carried out for 5min by using ethanol, acetone and deionized water in sequence, and finally, blow-drying is carried out by using nitrogen to remove substances with weak surface adhesion. The atomic layer deposition process can plate substances on the surface of the substrate layer by layer in the form of a monoatomic film, and has excellent deposition uniformity and consistency. In some other embodiments, the film can be prepared by a magnetron sputtering process, and the thickness of the aluminum oxide film can be set arbitrarily according to the device preparation requirements.
In some embodiments, the ITO gate 130 is an ITO thin film prepared using a magnetron sputtering process, and the thickness of the ITO thin film is 100 nm. The magnetron sputtering process has the advantages of high deposition speed, low substrate temperature rise and small damage to the film layer. In some other embodiments, the ITO gate 130 may be prepared by chemical vapor deposition, pulsed laser deposition, and the like, and the thickness of the ITO thin film may be set arbitrarily according to the requirements of the device design.
In some embodiments, the high-K dielectric layer 140 is a high-K dielectric film prepared by a magnetron sputtering process, the thickness of the high-K dielectric film is 40nm to 60nm, and the high-K dielectric film is annealed in a nitrogen atmosphere. Specifically, the annealing temperature in nitrogen is less than 300 ℃, the time duration is 10-30 min, and the gas flow is 500 mL/min. The high-K dielectric layer 140 has good insulation property, and is generally made of nitride, metal oxide or ferroelectric material, and the preparation process thereof can be flexibly changed according to the selection of the material, such as preparation of silicon nitride by gel vapor deposition, preparation of ferroelectric material by molecular beam epitaxy, and the like.
In some embodiments, the InGaZnO active layer 150 is an InGaZnO film prepared using a magnetron sputtering process, the InGaZnO film has a thickness of 50nm, and the growth rate of the InGaZnO film is 1 nm/min. The InGaZnO films generated at different sputtering speeds in the magnetron sputtering process have different qualities, which can affect the resistivity of the InGaZnO films. In other embodiments, different film growth rates can be selected according to actual requirements.
In some embodiments, a photoresist pattern for the source and drain electrodes 160 and 170 is formed on the InGaZnO active layer 150 through a photolithography and development process, a double metal layer structure is formed through a thermal evaporation process, and the source and drain electrodes 160 and 170 are formed through a photoresist stripping process. Specifically, the length of the channel of the photoresist pattern is 5nm to 20 μm, and the gas component is N after the preparation is completed2:H295: 5, annealing for 20min in the environment with the temperature less than 300 ℃ to reduce the contact resistance. In other embodiments, the channel length and the electrode thickness may be arbitrarily set. The double-metal layer structure comprises a buffer metal layer and a data metal layer, wherein the buffer metal layer can be made of molybdenum, titanium and the like, and the data metal layer can be made of gold, aluminum, copper or alloy thereof. The source electrode 160 and the drain electrode 170 are made of the same material and have the same thickness, and therefore, the description thereof is omitted.
The embodiments of the present invention have been described in detail with reference to the accompanying drawings, but the present invention is not limited to the above embodiments, and various changes can be made within the knowledge of those skilled in the art without departing from the gist of the present invention. Furthermore, the embodiments of the present invention and the features of the embodiments may be combined with each other without conflict.

Claims (8)

1. A flexible InGaZnO thin film transistor, comprising:
the flexible substrate is a flexible PI substrate;
the buffer layer is positioned on the upper side of the flexible substrate;
the ITO grid electrode is positioned on the upper side of the buffer layer;
the high-K dielectric layer is positioned on the upper side of the ITO grid;
the InGaZnO active layer is positioned on the upper side of the high-K dielectric layer;
the source electrode is positioned on the upper side of the active layer and is of a cylindrical structure;
the drain electrode is positioned on the upper side of the active layer and is of a circular ring structure, and the source electrode is positioned in the center of the drain electrode.
2. The flexible InGaZnO thin film transistor of claim 1, wherein the buffer layer is an alumina buffer layer.
3. The preparation method of the flexible InGaZnO thin film transistor is characterized by comprising the following steps:
providing a flexible PI substrate;
sequentially forming a buffer layer, an ITO grid electrode, a high-K dielectric layer and an InGaZnO active layer on the flexible PI substrate;
and forming a source electrode and a drain electrode on the InGaZnO active layer, wherein the source electrode is of a cylindrical structure, the drain electrode is of a circular ring structure, and the source electrode is positioned in the center of the drain electrode.
4. The method of claim 3, wherein the buffer layer is an aluminum oxide film prepared by an atomic layer deposition process, and the thickness of the aluminum oxide film is 100 nm.
5. The method for preparing the flexible InGaZnO thin film transistor according to claim 4, wherein the ITO gate is an ITO thin film prepared by using a magnetron sputtering process, and the thickness of the ITO thin film is 100 nm.
6. The method for preparing a flexible InGaZnO thin film transistor according to claim 5, wherein the high-K dielectric layer is a high-K dielectric thin film prepared by a magnetron sputtering process, the thickness of the high-K dielectric thin film is 40nm to 60nm, and the high-K dielectric thin film is annealed in a nitrogen atmosphere.
7. The method for preparing the flexible InGaZnO thin film transistor according to claim 6, wherein the InGaZnO active layer is an InGaZnO thin film prepared by using a magnetron sputtering process, the thickness of the InGaZnO thin film is 50nm, and the growth rate of the InGaZnO thin film is 1 nm/min.
8. The method of claim 7, wherein the source electrode and the drain electrode are formed by a photoresist pattern on the InGaZnO active layer through a photolithography and development process, the double metal layer structure is formed through a thermal evaporation process, and the source electrode and the drain electrode are formed through a photoresist stripping process.
CN202011179144.XA 2020-10-29 2020-10-29 Flexible InGaZnO thin film transistor and preparation method thereof Pending CN112436059A (en)

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101043040A (en) * 2006-03-22 2007-09-26 财团法人工业技术研究院 Thin film transistor assembly with symmetry
KR20130065243A (en) * 2011-12-09 2013-06-19 강릉원주대학교산학협력단 Oxide semiconductor transistor and manufacturing method thereof
CN104617154A (en) * 2015-02-25 2015-05-13 友达光电股份有限公司 Thin film transistor for flexible electronics and method of forming the same
US20180342591A1 (en) * 2017-05-23 2018-11-29 Boe Technology Group Co., Ltd. Thin film transistor and manufacturing method thereof, display substrate and display panel
CN109935637A (en) * 2019-03-19 2019-06-25 中国科学院物理研究所 A high voltage thin film transistor

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101043040A (en) * 2006-03-22 2007-09-26 财团法人工业技术研究院 Thin film transistor assembly with symmetry
KR20130065243A (en) * 2011-12-09 2013-06-19 강릉원주대학교산학협력단 Oxide semiconductor transistor and manufacturing method thereof
CN104617154A (en) * 2015-02-25 2015-05-13 友达光电股份有限公司 Thin film transistor for flexible electronics and method of forming the same
US20180342591A1 (en) * 2017-05-23 2018-11-29 Boe Technology Group Co., Ltd. Thin film transistor and manufacturing method thereof, display substrate and display panel
CN109935637A (en) * 2019-03-19 2019-06-25 中国科学院物理研究所 A high voltage thin film transistor

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