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CN112198922B - Bluetooth chip - Google Patents

Bluetooth chip Download PDF

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Publication number
CN112198922B
CN112198922B CN201910611148.1A CN201910611148A CN112198922B CN 112198922 B CN112198922 B CN 112198922B CN 201910611148 A CN201910611148 A CN 201910611148A CN 112198922 B CN112198922 B CN 112198922B
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voltage
circuit
output
current
mos tube
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CN201910611148.1A
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CN112198922A (en
Inventor
陈锡明
荣荧
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Shanghai Shunjiu Electronic Technology Co ltd
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Shanghai Shunjiu Electronic Technology Co ltd
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Priority to CN201910611148.1A priority Critical patent/CN112198922B/en
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    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10Regulating voltage or current 
    • G05F1/46Regulating voltage or current  wherein the variable actually regulated by the final control device is DC
    • G05F1/56Regulating voltage or current  wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices
    • G05F1/575Regulating voltage or current  wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices characterised by the feedback circuit

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Dc-Dc Converters (AREA)

Abstract

The invention discloses a Bluetooth chip, and belongs to the technical field of chips. The Bluetooth chip comprises a power converter, wherein the power converter comprises a power level circuit, a feedback circuit, a modulation circuit, a detection circuit and a voltage compensation circuit, the voltage compensation circuit comprises a first voltage conversion module which is used for outputting first output current according to the power voltage of an external power supply, and the first divider is used for outputting second output current according to the first output current and obtaining compensation voltage according to the second output current. According to the invention, the power supply voltage is processed through the first voltage conversion module and the first divider, and the processed power supply voltage is compensated in the modulation circuit, so that the error amplification voltage output by the feedback circuit is ensured not to change along with the change of the power supply voltage of an external power supply through the negative feedback function of a loop of the power supply converter, the deviation of a signal output by the detection circuit caused by the reduction or the increase of the power supply voltage is avoided, and the advanced or delayed switching of the working mode of the power supply converter is further avoided.

Description

Bluetooth chip
Technical Field
The invention relates to the technical field of chips, in particular to a Bluetooth chip.
Background
The power converter mounted on the bluetooth chip has two modes of operation, PWM (Pulse Width Modulation ) mode and PFM (Pulse Frequency Modulation, pulse frequency modulation) mode, respectively. When the load current of the load connected with the power converter is large and the power converter works in the PWM mode, the voltage ripple output by the power converter is small, and the power conversion efficiency is high. When the load current of the load connected with the power converter is small and the power converter works in the PFM mode, the power consumption of the power converter is low and the power conversion efficiency is high.
In the related art, as shown in fig. 1, a power converter includes a power stage circuit, a feedback circuit, a modulation circuit, and a detection circuit. The larger the load current of the external load connected with the output end of the power stage circuit is, the error amplification voltage V output by the feedback circuit is C The larger the load current of the external load connected with the output end of the power stage circuit is, the smaller the load current of the external load is, and the error amplified voltage V is output by the feedback circuit C Smaller and therefore can be according to V C Whether the voltage threshold is smaller than a certain voltage threshold or not is determined to be smaller than a certain voltage threshold. When the load current of the external load connected with the power converter is larger and the load current is larger than the current critical value, the detection circuit pair V C And comparing the voltage threshold value, outputting a comparison result to a modulation circuit, and controlling the power converter to work in a PWM mode through the modulation circuit. As the load current decreases, V C Also as well asReduced and when the load current is equal to the current threshold value, the detection circuit pair V C And comparing the voltage threshold value, outputting a comparison result to a modulation circuit, and controlling the power converter to work in a PFM mode through the modulation circuit.
However, when the voltage conversion is performed by the power converter as shown in fig. 1, the voltage V is error-amplified C Power supply voltage V of external power supply to power converter IN And shows positive correlation. Thus, with the supply voltage V IN Is reduced by V C Will also correspondingly decrease, thereby making V C The state of reducing to the voltage critical value can be advanced, so that the state of switching the power converter from the PWM mode to the PFM mode can be advanced, and the power converter works in the PFM mode when the load current of an external load connected with the power converter is larger than the current critical value, thereby increasing the voltage output ripple and reducing the power conversion efficiency. Or with the supply voltage V IN Is increased by V C Will also correspondingly increase, thereby making V C The state reduced to the voltage critical value is delayed, and thus the state of the power converter switched from the PWM mode to the PFM mode is delayed, and at the moment, the power converter still works in the PWM mode when the load current of the connected external load is smaller than the current critical value, so that the power conversion efficiency is reduced.
Disclosure of Invention
The invention provides a Bluetooth chip which can solve the problem that the working mode of a power converter is switched in advance or in delay when the power voltage of an external power supply is changed. The technical scheme is as follows:
in a first aspect, a bluetooth chip is provided, the bluetooth chip including a power converter including a power stage circuit, a feedback circuit, a modulation circuit, a detection circuit, and a voltage compensation circuit;
The power stage circuit is used for receiving first power output by an external power supply, outputting second power to an external load according to the first power, the feedback circuit is used for receiving output voltage of the power stage circuit, outputting error amplification voltage according to the output voltage and configured first reference voltage, the modulation circuit is used for receiving the error amplification voltage, slope compensation current provided by an external slope compensation circuit, sampling current obtained by sampling the power stage circuit, controlling the output voltage according to the error amplification voltage, the slope compensation current and the sampling current, the detection circuit is used for receiving the error amplification voltage, controlling the modulation circuit according to the error amplification voltage and configured second reference voltage, and modulating the working mode of the power converter, wherein the voltage compensation circuit is used for receiving the power supply voltage of the external power supply and outputting compensation voltage to the modulation circuit according to the power supply voltage;
the voltage compensation circuit comprises a first voltage conversion module and a first divider, wherein the first voltage conversion module is used for receiving the power supply voltage and outputting a first output current according to the power supply voltage, the first divider is used for receiving the first output current and outputting a second output current according to the first output current, and the compensation voltage is obtained according to the second output current.
Optionally, the first voltage conversion module includes: the first resistor, the second resistor, the third resistor, the first operational amplifier, the first MOSMetal Oxide Semiconductor, the metal oxide semiconductor tube, the second MOS tube and the third MOS tube;
one end of the first resistor is used for being connected with the external power supply, the other end of the first resistor is respectively connected with one end of the second resistor and the negative input end of the first operational amplifier, the positive input end of the first operational amplifier is respectively connected with one end of the third resistor and the drain electrode of the first MOS tube, the output end of the first operational amplifier is connected with the grid electrode of the first MOS tube, and the other end of the second resistor and the other end of the third resistor are grounded;
the source electrode of the first MOS tube is connected with the drain electrode and the grid electrode of the second MOS tube and the grid electrode of the third MOS tube respectively, the source electrode of the second MOS tube and the source electrode of the third MOS tube are connected with a first power supply module, and the drain electrode of the third MOS tube is connected with the input end of the first divider.
Optionally, the first divider includes a first current source, a second current source, a third current source, a fourth MOS transistor, a fifth MOS transistor, a sixth MOS transistor, a seventh MOS transistor, an eighth MOS transistor, a ninth MOS transistor, a tenth MOS transistor, an eleventh MOS transistor, a twelfth MOS transistor, a thirteenth MOS transistor, a first triode, a second triode, a third triode, a fourth triode, and a fifth triode;
One end of the first current source is used for being connected with a second power supply module, the other end of the first current source is respectively connected with the drain electrode and the grid electrode of the fourth MOS tube and the grid electrode of the fifth MOS tube, the source electrode of the fourth MOS tube and the source electrode of the fifth MOS tube are grounded, and the drain electrode of the fifth MOS tube is respectively connected with the drain electrode and the grid electrode of the sixth MOS tube and the grid electrode of the seventh MOS tube;
the source electrode of the sixth MOS tube, one end of the second current source and the source electrode of the seventh MOS tube are connected with the second power supply module, the other end of the second current source is respectively connected with the emitter electrode of the first triode, the base electrode of the first triode is respectively connected with the drain electrode of the seventh MOS tube and the collector electrode of the second triode, the collector electrode of the first triode and the emitter electrode of the second triode are grounded, and the base electrode of the second triode is respectively connected with the emitter electrode of the third triode and the drain electrode of the eighth MOS tube;
the collector of the third triode and the collector of the fourth triode are connected with the second power supply module, the base of the third triode and the base of the fourth triode are connected with the other end of the second current source, the grid of the eighth MOS tube is connected with the grid and the drain of the ninth MOS tube respectively, one end of the third current source is connected with the other end of the third current source, the drain of the tenth MOS tube is connected with the grid of the second power supply module, and after connection, the drain of the eleventh MOS tube is connected with the output end of the first voltage conversion module and the grid of the eleventh MOS tube respectively, the drain of the eleventh MOS tube is connected with the emitter of the fourth triode and the base of the fifth triode respectively, and the source of the eighth MOS tube, the source of the ninth MOS tube, the source of the tenth MOS tube and the source of the eleventh MOS tube are grounded;
The source electrode of the twelfth MOS tube and the source electrode of the thirteenth MOS tube are used for being connected with the second power supply module, the grid electrode of the thirteenth MOS tube is connected with the grid electrode and the drain electrode of the twelfth MOS tube and the collector electrode of the fifth triode respectively, the drain electrode of the thirteenth MOS tube is connected with the second voltage input end and/or the third voltage input end of the modulation circuit, and the emitting electrode of the fifth triode is grounded.
Optionally, the modulation circuit includes: the current acquisition module, the fourth resistor, the slope compensation capacitor, the switch, the logic driving module and the PWM comparator;
the first input end and the second input end of the current acquisition module are respectively connected with the first sampling end and the second sampling end of the power stage circuit, the output end of the current acquisition module is respectively connected with one end of the fourth resistor, one end of the slope compensation capacitor and one end of the switch, and the other end of the fourth resistor is grounded;
the positive input end of the PWM comparator is respectively connected with the first input end of the detection circuit and the output end of the feedback circuit, the negative input end of the PWM comparator is used for being connected with the slope compensation circuit, the negative input end of the PWM comparator is respectively connected with the output end of the first divider, the other end of the slope compensation capacitor and the other end of the switch, the output end of the PWM comparator is connected with the first signal end of the logic driving module, the second signal end of the logic driving module is connected with the output end of the detection circuit, and the control end of the logic driving module is connected with the control end of the power stage circuit.
Optionally, the modulation circuit includes: the current acquisition module, the fourth resistor, the slope compensation capacitor, the switch, the logic driving module and the PWM comparator;
the first input end and the second input end of the current acquisition module are respectively connected with the first sampling end and the second sampling end of the power stage circuit, the output end of the current acquisition module is respectively connected with one end of the fourth resistor, one end of the slope compensation capacitor, one end of the switch and the output end of the first divider, the output end of the current acquisition module is also used for being connected with a voltage bias circuit, and the other end of the fourth resistor is grounded;
the positive input end of the PWM comparator is respectively connected with the first input end of the detection circuit and the output end of the feedback circuit, the negative input end of the PWM comparator is connected with the other end of the slope compensation capacitor and the other end of the switch, the negative input end of the PWM comparator is used for being connected with the slope compensation circuit, the output end of the PWM comparator is connected with the first signal end of the logic driving module, the second signal end of the logic driving module is connected with the output end of the detection circuit, and the control end of the logic driving module is connected with the control end of the power stage circuit.
In a second aspect, a bluetooth chip is provided, the bluetooth chip including a power converter including a power stage circuit, a feedback circuit, a modulation circuit, a detection circuit, and a voltage compensation circuit;
the power stage circuit is used for receiving first power output by an external power supply, outputting second power to an external load according to the first power, the feedback circuit is used for receiving output voltage of the power stage circuit, outputting error amplification voltage according to the output voltage and configured first reference voltage, the modulation circuit is used for receiving the error amplification voltage, slope compensation current provided by an external slope compensation circuit, sampling current obtained by sampling the power stage circuit, controlling the output voltage according to the error amplification voltage, the slope compensation current and the sampling current, the voltage compensation circuit is used for receiving the error amplification voltage and power supply voltage of the external power supply, outputting compensation voltage according to the error amplification voltage and the power supply voltage, the detection circuit is used for receiving the compensation voltage, controlling the modulation circuit according to the compensation voltage and configured second reference voltage, so as to modulate the working mode of the power converter,
The voltage compensation circuit comprises a buffer, a first voltage conversion module, a second voltage conversion module, a first divider and a fifth resistor, wherein the first voltage conversion module is used for outputting a first output current according to the output voltage, the first divider is used for receiving the first output current and outputting a second output current according to the first output current, the buffer is used for obtaining the error amplification voltage, the second voltage conversion module is used for receiving the error amplification current obtained by the buffer and outputting a third output current according to the error amplification voltage, and the compensation voltage is obtained according to the second output current, the third output current and the fifth resistor.
Optionally, the detection circuit includes a PFM comparator, a negative input end of the PFM comparator is connected to an output end of the second voltage conversion module, an output end of the first divider and one end of the fifth resistor, a positive input end of the PFM comparator is used for configuring a second base voltage, and an output end of the PFM comparator is connected to a signal input end of the modulation circuit.
In a third aspect, a bluetooth chip is provided, the bluetooth chip including a power converter including a power stage circuit, a feedback circuit, a modulation circuit, a detection circuit, and a voltage compensation circuit;
The power stage circuit is used for receiving first power output by an external power supply, outputting second power to an external load according to the first power, the feedback circuit is used for receiving output voltage of the power stage circuit, outputting error amplification voltage according to the output voltage and configured first reference voltage, the modulation circuit is used for receiving the error amplification voltage, slope compensation current provided by an external slope compensation circuit, sampling current obtained by sampling the power stage circuit, controlling the output voltage according to the error amplification voltage, the slope compensation current and the sampling current, the voltage compensation circuit is used for receiving the power supply voltage of the external power supply and external voltage provided by an external third power supply module, outputting compensation voltage according to the power supply voltage, the external voltage and configured second reference voltage, and the detection circuit is used for receiving the error amplification voltage and the compensation voltage, and controlling the modulation circuit according to the error amplification voltage and the compensation voltage so as to modulate the working mode of the power supply converter;
the voltage compensation circuit comprises a forward compensation circuit, a reverse compensation circuit and a sixth resistor R, wherein the forward compensation circuit is used for receiving the external voltage and outputting forward current according to the external voltage and the second reference voltage, the reverse compensation circuit is used for receiving the power supply voltage and outputting reverse current according to the power supply voltage, and the compensation voltage is obtained according to the forward current, the reverse current and the sixth resistor R.
Optionally, the detection circuit includes a pulse frequency modulation PFM comparator, a negative input end of the PFM comparator is connected with the modulation circuit and the feedback circuit respectively, a positive input end of the PFM comparator is connected with an output end of the forward compensation circuit, an output end of the reverse compensation circuit and one end of the sixth resistor respectively, and an output end of the PFM comparator is connected with a signal input end of the modulation circuit.
Optionally, the forward compensation circuit includes: the second operational amplifier, the fourteenth MOS tube, the seventh resistor and the eighth resistor;
the negative input end of the second operational amplifier is used for configuring the second reference voltage, the positive input end of the second operational amplifier is respectively connected with one end of the fourth resistor and one end of the fifth resistor, the output end of the second operational amplifier is connected with the grid electrode of the fourteenth MOS tube, the other end of the seventh resistor is connected with the drain electrode of the fourteenth MOS tube, the source electrode of the fourteenth MOS tube is used for being connected with the third power supply module, the other end of the eighth resistor is respectively connected with the output end of the reverse compensation circuit, the first input end of the detection circuit and one end of the sixth resistor, and the other end of the sixth resistor is grounded.
Optionally, the reverse compensation circuit includes: a first voltage conversion module and a second divider;
the input end of the first voltage conversion module is used for being connected with the external power supply, the output end of the first voltage conversion module is connected with the input end of the second divider, and the output end of the second divider is respectively connected with the output end of the forward compensation circuit, the first input end of the detection circuit and one end of the sixth resistor.
Optionally, the second divider includes a fourth current source, a fifth current source, a sixth current source, a fifteenth MOS transistor, a sixteenth MOS transistor, a seventeenth MOS transistor, an eighteenth MOS transistor, a nineteenth MOS transistor, a twentieth MOS transistor, a twenty first MOS transistor, a twenty second MOS transistor, a twenty third MOS transistor, a twenty fourth MOS transistor, a twenty fifth MOS transistor, a twenty sixth MOS transistor, a sixth triode, a seventh triode, an eighth triode, a ninth triode, and a thirteenth triode;
one end of the fourth current source is used for being connected with a fourth power supply module, the other end of the fourth current source is respectively connected with the drain electrode and the grid electrode of the fifteenth MOS tube, the drain electrode of the fifteenth MOS tube is respectively connected with the drain electrode and the grid electrode of the seventeenth MOS tube and the grid electrode of the eighteenth MOS tube, and the source electrode of the fifteenth MOS tube and the source electrode of the sixteenth MOS tube are grounded;
The source electrode of the seventeenth MOS tube, one end of the fifth current source and the source electrode of the eighteenth MOS tube are connected with the fourth power supply module, the other end of the fifth current source is connected with the emitter electrode of the sixth triode, the base electrode of the sixth triode is respectively connected with the drain electrode of the eighteenth MOS tube and the collector electrode of the seventh triode, the collector electrode of the sixth triode and the emitter electrode of the seventh triode are grounded, and the base electrode of the seventh triode is respectively connected with the emitter electrode of the eighth triode and the drain electrode of the nineteenth MOS tube;
the collector of the eighth triode and the collector of the ninth triode are used for being connected with the fifth power supply module, the base of the eighth triode and the base of the ninth triode are respectively connected with the other end of the fifth current source, the grid of the nineteenth MOS tube is respectively connected with the grid and the drain of the twentieth MOS tube and one end of the sixth current source, the other end of the sixth current source is used for being connected with the fifth power supply module, the drain of the twenty-first MOS tube is connected with the grid and the output end of the second voltage conversion module and the grid of the twenty-second MOS tube after being connected, the drain of the twenty-second MOS tube is respectively connected with the emitter of the ninth triode and the base of the thirteenth MOS tube, and the source of the nineteenth MOS tube, the source of the twenty-first MOS tube and the source of the twenty-second MOS tube are grounded;
The source electrode of the twenty-third MOS tube and the source electrode of the twenty-fourth MOS tube are connected with the fifth power module, the grid electrode of the twenty-fourth MOS tube is connected with the grid electrode and the drain electrode of the twenty-third MOS tube and the collector electrode of the tenth triode respectively, the emitting electrode of the tenth triode is grounded, the drain electrode of the twenty-fourth MOS tube is connected with the grid electrode and the drain electrode of the twenty-fifth MOS tube and the grid electrode of the twenty-sixth MOS tube, the source electrode of the twenty-fifth MOS tube and the source electrode of the twenty-sixth MOS tube are grounded, and the drain electrode of the twenty-sixth MOS tube is connected with the positive input end of the PFM comparator, one end of the sixth resistor and the output end of the positive compensation circuit respectively.
The technical scheme provided by the invention has the beneficial effects that at least the following steps are included:
the invention processes the power supply voltage of the external power supply through the first voltage conversion module and the first divider included in the voltage compensation circuit, and compensates the processed power supply voltage in the modulation circuit, thereby ensuring that the error amplification voltage output by the feedback circuit does not change along with the change of the power supply voltage of the external power supply through the negative feedback function of the loop of the power supply converter, avoiding the deviation of the signal output by the detection circuit caused by the reduction or the increase of the power supply voltage, and further avoiding the advanced or delayed switching of the working mode of the power supply converter.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for the description of the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic diagram of a power converter included in a bluetooth chip provided in the related art;
fig. 2 is a schematic structural diagram of a power converter included in a bluetooth chip according to an embodiment of the present invention;
fig. 3 is a schematic circuit diagram of a first voltage conversion module according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of a first divider according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of a power converter included in another bluetooth chip according to an embodiment of the present invention;
fig. 6 is a schematic structural diagram of a power converter included in another bluetooth chip according to an embodiment of the present invention;
fig. 7 is a schematic structural diagram of a power converter included in another bluetooth chip according to an embodiment of the present invention;
Fig. 8 is a schematic circuit structure diagram of a second divider according to an embodiment of the present invention.
Reference numerals:
related technology: 1: a power stage circuit; 2: a feedback circuit; 3: a modulation circuit; 4: a detection circuit;
m: a main switching tube; d: a freewheeling diode; l: an energy storage inductor; EA: an error amplifier; SENSE: a current collection module; s: a switch; c1: a slope compensation capacitor; c2 output capacitance; r4: a fourth resistor; r9: a ninth resistor; r10: and a tenth resistor.
The application comprises the following steps: 1: a power stage circuit; 2: a feedback circuit; 3: a modulation circuit; 31: a logic driving module; 32: a PWM comparator; 4: a detection circuit; 41: a PFM comparator; 5: a voltage compensation circuit; 51: a first voltage conversion module; 52: a first divider; 53: a buffer; 54: a second voltage conversion module; 55: a forward compensation circuit; 56: a reverse compensation circuit; 57: a second divider;
r1: a first resistor; r2: a second resistor; r3: a third resistor; r4: a fourth resistor; r5: a fifth resistor; r6: a sixth resistor; r7: a seventh resistor; r8: an eighth resistor;
OP1: a first operational amplifier; OP2: a second operational amplifier;
m1: a first MOS tube; m2: a second MOS tube; m3: a third MOS tube; m4: a fourth MOS transistor; m5: a fifth MOS transistor; m6: a sixth MOS transistor; m7: a seventh MOS transistor; m8: an eighth MOS transistor; m9: a ninth MOS transistor; m10: a tenth MOS transistor; m11: an eleventh MOS transistor; m12: a twelfth MOS transistor; m13: thirteenth MOS tube; m14: a fourteenth MOS transistor; m15: a fifteenth MOS transistor; m16: a sixteenth MOS transistor; m17: seventeenth MOS transistor; m18: an eighteenth MOS tube; m19: nineteenth MOS transistor; m20: a twentieth MOS transistor; m21: a twenty-first MOS tube; m22: a twenty-second MOS transistor; m23: a thirteenth MOS tube; m24: twenty-fourth MOS tube; m25: a twenty-fifth MOS tube; m26: sixteenth MOS tube;
I1: a first current source; i2: a second current source; and I3: a third current source; and I4: a fourth current source; and I5: a fifth current source; i6: a sixth current source;
q1: a first tertiary tube; q2: a second tertiary tube; q3: a third transistor; q4: a fourth tertiary tube; q5: a fifth tertiary pipe; q6: a sixth tertiary pipe; q7: a seventh tertiary tube; q8: an eighth tertiary tube; q9: a ninth transistor; q10: a thirteenth stage tube; a second MOS tube M2 and a third MOS tube M3
SENSE: a current collection module; c: a slope compensation capacitor; s: and (3) a switch.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the present invention more apparent, the embodiments of the present invention will be described in further detail with reference to the accompanying drawings.
Fig. 1 illustrates a schematic structure of a power converter included in a bluetooth chip. As shown in fig. 1, the power converter includes a power stage circuit 1, a feedback circuit 2, a modulation circuit 3 and a detection circuit 4, where a power input end of the power stage circuit 1 is connected to an external power supply, a first sampling end and a second sampling end of the power stage circuit 1 are respectively connected to a first sampling end and a second sampling end of the modulation circuit 3, a control end of the power stage circuit 1 is connected to a control end of the modulation circuit 3, a feedback end of the power stage circuit 1 is connected to a feedback end of the feedback circuit 2, an output end of the power stage circuit 1 is connected to an external load, an input end of the feedback circuit 2 is used to configure a first reference voltage, an output end of the feedback circuit 2 is respectively connected to a first voltage input end of the modulation circuit 3 and a first input end of the detection circuit 4, a second input end of the detection circuit 4 is used to configure a second reference voltage, an output end of the detection circuit 4 is connected to a signal input end of the modulation circuit 3, a second voltage input end of the modulation circuit 3 is used to be connected to a slope compensation circuit, and a ground end of the power stage circuit 1, the feedback circuit 2 and the modulation circuit 3 is grounded.
As shown in fig. 1, the power stage circuit 1 includes a main switch tube M, a freewheel diode D, an energy storage inductance L, and an output capacitor C2, where a source electrode of the main switch tube M is connected to an external power supply, and a source electrode of the main switch tube M is connected to a first sampling end of the modulation circuit 3, a gate electrode of the main switch tube M is connected to a control end of the modulation circuit 3, a drain electrode of the main switch tube M is connected to a second sampling end of the modulation circuit 3, an output end of the freewheel diode D, and one end of the energy storage inductance L, another end of the energy storage inductance L is connected to one end of the output capacitor C2 and a feedback end of the feedback circuit 2, and another end of the energy storage inductance L is connected to an external load, and an input end of the freewheel diode D and another end of the output capacitor C2 are grounded. The main switch tube M may be a P-type MOS tube.
When the main switch tube M is conducted, the external power supply, the energy storage inductor L, the output capacitor C2 and the external load are conducted, so that the energy storage inductor L and the output capacitor C2 are charged through the external power supply, and meanwhile, the power supply is provided for the external load, so that the normal work of the external load is ensured. When the main switch tube M is disconnected, the energy storage inductor L, the output capacitor C2, the external load and the freewheeling diode D are conducted, and the energy storage inductor L and the output capacitor C2 can be used as power sources to provide power for the external load, so that the normal work of the external load is ensured. The output capacitor C2 is also used for filtering the ac signal formed by the power converter in the normal power stage circuit 1.
As shown in fig. 1, the feedback circuit 2 includes a ninth resistor R9, a tenth resistor R10, and an error amplifier EA, one end of the ninth resistor R9 is connected to the feedback end of the power stage circuit 1, the other end of the ninth resistor R9 is connected to one end of the tenth resistor R10 and the negative input end of the error amplifier EA, the other end of the tenth resistor R10 is grounded, the positive input end of the error amplifier EA is used for configuring a first reference voltage, and the output end of the error amplifier EA is connected to the first voltage input end of the modulation circuit 3 and the second input end of the detection circuit 4, respectively.
The voltage at the feedback end of the power stage circuit 1 is reduced by the ninth resistor R9 and the tenth resistor R10, the voltage at the two ends of the tenth resistor R10 is fed back to the negative input end of the error amplifier EA, then the voltage at the two ends of the tenth resistor R10 and the first reference voltage are subtracted by the error amplifier EA, and the subtracted error voltage is amplified and then is output to the first voltage input end of the modulation circuit 3 and the first input end of the detection circuit 4.
As shown in fig. 1, the modulation circuit 3 includes a current collecting module SENSE, a fourth resistor R4, a slope compensation capacitor C1, a switch S, a logic driving module and a PWM comparator, where a first input end and a second input end of the current collecting module SENSE are respectively connected with a first sampling end and a second sampling end of the power stage circuit 1, an output end of the current collecting module SENSE is respectively connected with one end of the fourth resistor R4, one end of the slope compensation capacitor C1 and one end of the switch S, an output end of the current collecting module SENSE is connected with a bias circuit, another end of the fourth resistor R4 is grounded, a positive input end of the PWM comparator is respectively connected with a first input end of the detection circuit 4 and an output end of the feedback circuit 2, a negative input end of the PWM is connected with the slope compensation circuit, and a negative input end of the PWM comparator is connected with the other end of the slope compensation capacitor C1 and the other end of the switch S, an output end of the PWM comparator is connected with a first signal end of the logic driving module, a second signal end of the logic driving module is connected with an output end of the detection circuit 4, and a control end of the logic driving module is connected with the control end of the power stage circuit 1.
The current collection module SENSE samples the current flowing through the energy storage inductor L and outputs a sampling current, then the current provided by the slope compensation circuit, the current provided by the bias circuit and the sampling current outputted by the current sampling module are converted into voltages through the fourth resistor R4, the voltages are provided at the negative input end of the PWM comparator, the voltages are compared with the error amplification voltage outputted by the output end of the feedback circuit 2, and after comparison, a signal is outputted to the logic driving module so as to control the power stage circuit 1 to work through the logic driving module. Meanwhile, the logic driving module can also receive a signal output by the detection circuit 4 and control the power converter to work in a PWM mode or a PFM mode based on the signal.
As shown in fig. 1, the detection circuit 4 includes a PFM comparator, a negative input terminal of the PFM comparator is connected to the first voltage input terminal of the modulation circuit 3 and the output terminal of the feedback circuit 2, a positive input terminal of the PFM comparator is used for configuring the second reference voltage, and an output terminal of the PFM comparator is connected to the signal input terminal of the modulation circuit 3.
Therefore, the source electrode of the main switch tube M is connected with an external power supply, one end of the energy storage inductor L, which is not connected with the main switch tube M, is connected with an external load, and after the power converter works normally, when the power converter works in a PWM mode and the error amplification voltage is equal to the voltage of the negative input end of the PWM comparator, the PWM comparator turns over, and at the moment, a signal output by the PWM comparator controls the main switch tube to be turned on or off through the logic driving module. Therefore, when the PWM comparator is at the inversion point, the error amplification voltage outputted from the error amplifier EA can be determined according to the following formula (1).
Wherein, inIn the above formula (1), V C Refers to the error amplified voltage output by the error amplifier EA, I bias Refers to bias current provided by a voltage bias circuit connected with the negative input end of the PWM comparator, I load Refers to the load current of an external load, V out The output voltage of the power converter is T is the switching period of the main switching tube M, K is the sampling proportion of the current acquisition module SENSE, L is the inductance value of the energy storage inductor, R1 is the resistance value of the first resistor, I slope The reference voltage is the ramp current provided by a ramp compensation circuit connected with the negative input end of the PWM comparator, t is the charging time of the ramp compensation circuit in each period, C1 is the capacitance value of a ramp compensation capacitor, and V IN Refers to the supply voltage input to the power converter.
As can be seen from the above equation 1, the error amplification voltage decreases with decreasing load current and increases with increasing load current, so that the magnitude of the load current of the external load can be determined by determining the magnitude of the error amplification voltage, and thus the operation mode of the power converter can be determined. Specifically, when the error amplified voltage output by the error amplifier EA is greater than the reference voltage connected to the positive input end of the PFM comparator, a high-level or low-level signal is output to the logic driving module, and the logic driving module controls the power converter to work in the PWM mode, and at this time, the PWM loop (loop formed by the power stage circuit, the feedback circuit, the PWM comparator and the logic driving module) controls to reduce the switching period of the main switching tube M, so as to ensure the stability of the output voltage of the power converter and reduce the output voltage ripple. And meanwhile, the power conversion efficiency of the power converter is improved. When the error amplified voltage output by the error amplifier EA is smaller than the second reference voltage connected with the positive input end of the PFM comparator, a low-level or high-level signal is output to the logic driving module, the logic driving module controls the power converter to work in the PFM mode, at the moment, the switching period of the main switching tube M is controlled to be improved through a PFM loop (not shown in fig. 1), the stability of the output voltage of the power converter is ensured, and meanwhile, the PWM comparator, the EA error amplifier and the like are controlled to be in a closed state so as to reduce the power consumption of the power converter, thereby improving the power conversion efficiency of the power converter.
In actual operation, the voltage of the external power supply connected to the power converter may decay or increase with time, and at this time, as shown in the above formula 1, the error amplification voltage also decreases or increases synchronously, and the reference voltage connected to the positive input terminal of the PFM comparator is a constant value, so that the output result of the PFM comparator is easily affected.
If the load current of the external load is less than 5mA, the external load is determined to be light load, namely, the current critical value of the external load which is light load is 5mA. At this current threshold, the power converter should jump from PWM mode to PFM mode. For example, the power voltage is 3V, the current threshold is 5mA, the voltage threshold is 360mV, and the reference voltage connected to the positive input terminal of the PFM comparator should be set to 360mV in order to correctly detect and indicate that the external load has been reduced to the light load state. When the power supply voltage drops to 2V, the corresponding error amplification voltage is 360mV when the load current is 10mA, so that the power supply converter can jump from the PWM mode to the PFM mode in advance when the load current is 10mA, and the power conversion efficiency is reduced. When the power supply voltage is increased to 4V, the corresponding error amplification voltage is 360mV when the load current is 1mA, so that the power supply converter can delay to enter the PFM mode when the load current is 1mA, and the power conversion efficiency is reduced.
Fig. 2 illustrates a schematic structure of a power converter included in a bluetooth chip. As shown in fig. 2, the power converter includes a power stage circuit 1, a feedback circuit 2, a modulation circuit 3, a detection circuit 4 and a voltage compensation circuit 5, wherein the power stage circuit 1 is configured to receive a first power output from an external power supply and output a second power to an external load according to the first power, the feedback circuit 2 is configured to receive an output voltage of the power stage circuit 1 and output an error amplification voltage according to the output voltage and a configured first reference voltage, the modulation circuit 3 is configured to receive the error amplification voltage, a ramp compensation current provided by an external ramp compensation circuit, a sampling current obtained by sampling the power stage circuit 1, and control the output voltage according to the error amplification voltage, the ramp compensation current and the sampling current, the detection circuit 4 is configured to receive the error amplification voltage and control the modulation circuit 3 according to the error amplification voltage and a configured second reference voltage, and the voltage compensation circuit 5 is configured to receive a power supply voltage of the external power supply and output the modulation voltage to the power compensation circuit 3 according to the power supply voltage.
The voltage compensation circuit 5 includes a first voltage conversion module 51 and a first divider 52, the first voltage conversion module 51 is configured to receive the power supply voltage and output a first output current according to the power supply voltage, the first divider 52 is configured to receive the first output current and output a second output current according to the first output current, and the compensation voltage is obtained according to the second output current.
In this embodiment, in the normal work of the power converter that bluetooth chip included, the power supply voltage that the external power supply was handled through first voltage conversion module and the first divider that voltage compensation circuit included, with the power supply voltage compensation after handling at modulation circuit, thereby through the negative feedback effect of the loop of power converter, guarantee that the error that feedback circuit output amplifies voltage and does not change along with external power supply's power supply voltage's change, avoided leading to the deviation that detection circuit output's signal appears because of power supply's reduction or increase, and then avoided the working pattern of power converter to switch in advance or delay.
In some embodiments, as shown in fig. 2, the circuit connection structure of the power converter is that the power input end of the power stage circuit 1 is used for being connected with an external power supply, the first sampling end and the second sampling end of the power stage circuit 1 are respectively connected with the first sampling end and the second sampling end of the modulation circuit 3, the control end of the power stage circuit 1 is connected with the control end of the modulation circuit 3, the feedback end of the power stage circuit 1 is connected with the feedback end of the feedback circuit 2, the output end of the power stage circuit 1 is used for being connected with an external load, the input end of the feedback circuit 2 is used for configuring a first reference voltage, the output end of the feedback circuit 2 is respectively connected with the first voltage input end of the modulation circuit 3 and the first input end of the detection circuit 4, the second input end of the detection circuit 4 is used for configuring a second reference voltage, the output end of the detection circuit 4 is connected with the signal input end of the modulation circuit 3, the second voltage input end of the modulation circuit 3 is used for being connected with a slope compensation circuit, and the ground terminals of the power stage circuit 1, the feedback circuit 2 and the modulation circuit 3 are grounded. As shown in fig. 2, the voltage compensation circuit 5 includes a first voltage conversion module 51 and a first divider 52, wherein an input end of the first voltage conversion module 51 is used for being connected with an external power supply, an output end of the first voltage conversion module 51 is connected with an input end of the first divider 52, and an output end of the first divider 52 is connected with a second voltage input end of the modulation circuit 3.
Wherein the voltage compensation amount of the voltage compensation circuit 5Can be equal to the supply voltage related term +.>And then under the negative feedback action of the loop of the power converter, the error amplification voltage output by the output end of the feedback circuit 2 is synchronously compensated, so that no functional relationship exists between the error amplification voltage and the power supply voltage of the external power supply, thereby avoiding the influence of the change of the power supply voltage on the error amplification voltage and further avoiding the deviation of the signal output by the detection circuit 4 caused by the reduction or the increase of the power supply voltage.
Wherein K1 refers to the configuration parameter of the first voltage conversion module 51, K2 refers to the configuration parameter of the first divider 52, and K1 and K2 may be set according to the voltage compensation amount of the voltage compensation circuit 5.
The circuit structures of the power stage circuit 1, the feedback circuit 2 and the detection circuit 4 may be the same as or similar to the circuit structures of the corresponding circuits in the above embodiments, which are not described herein.
In some embodiments, as shown in fig. 3, the first voltage conversion module 51 may include: the first resistor R1, the second resistor R2, the third resistor R3, the first operational amplifier OP1, the first MOS tube M1, the second MOS tube M2 and the third MOS tube M3, one end of the first resistor R1 is used for being connected with an external power supply, the other end of the first resistor R1 is connected with one end of the second resistor R2 and the negative input end of the first operational amplifier OP1 respectively, the positive input end of the first operational amplifier OP1 is connected with one end of the third resistor R3 and the drain electrode of the first MOS tube M1 respectively, the output end of the first operational amplifier OP1 is connected with the grid electrode of the first MOS tube M1, the other end of the second resistor R2 and the other end of the third resistor R3 are grounded, the source electrode of the first MOS tube M1 is connected with the drain electrode of the second MOS tube M2 and the grid electrode of the third MOS tube M3 respectively, the source electrode of the second MOS tube M2 and the source electrode of the third MOS tube M3 are used for being connected with the first power supply module, and the drain electrode of the third MOS tube M3 is connected with the input end of the first divider 52.
The first power module is configured to provide a voltage to the first voltage conversion module 51 to turn on the second MOS transistor M2 and the third MOS transistor M3, and the first power module may be an external power supply. The first MOS transistor M1, the second MOS transistor M2, and the third MOS transistor M3 may be P-type MOS transistors. After the power supply voltage is divided by the first resistor R1 and the second resistor R2, the power supply voltage is amplified by the operational amplifier to provide a certain conducting voltage for the grid electrode of the first MOS tube M1, so that the source electrode and the drain electrode of the first MOS tube M1 are conducted. The second MOS tube M2 and the third MOS tube M3 form a mirror current source, after the first MOS tube M1 is conducted, the voltage obtained by dividing the voltage by the second resistor R2 is subjected to current conversion through the third resistor R3, and then the voltage is output along the drain electrode of the third MOS tube M3 under the mirror effect of the second MOS tube M2 and the third MOS tube M3, so that the conversion from the power supply voltage to the first output current is realized.
Wherein the first voltage conversion module 51 may convert the power supply voltage into the first output current by the following formula (2).
Wherein in the above formula (2), I 1 A first output current of the first voltage conversion module 51, R1 is a resistance value of the first resistor R1, and R2 is a first resistorThe resistance value of the two resistors R2, R3 is the resistance value of the third resistor R3, V IN Refers to the supply voltage input to the power converter.
It should be noted that the circuit shown in fig. 3 is only an example circuit of the first voltage conversion module 51, and of course, the first voltage conversion module 51 may have other circuit structures, which is not limited in this embodiment of the present application.
In some embodiments, as shown in fig. 4, the first divider 52 may include a first current source I1, a second current source I2, a third current source I3, a fourth MOS transistor M4, a fifth MOS transistor M5, a sixth MOS transistor M6, a seventh MOS transistor M7, an eighth MOS transistor M8, a ninth MOS transistor M9, a tenth MOS transistor M10, an eleventh MOS transistor M11, a twelfth MOS transistor M12, a thirteenth MOS transistor M13, a first transistor Q1, a second transistor Q2, a third transistor Q3, a fourth transistor Q4, and a fifth transistor Q5.
One end of the first current source I1 is used for being connected with the second power supply module, the other end of the first current source I1 is respectively connected with the drain electrode and the grid electrode of the fourth MOS tube M4 and the grid electrode of the fifth MOS tube M5, the source electrode of the fourth MOS tube M4 and the source electrode of the fifth MOS tube M5 are grounded, the drain electrode of the fifth MOS tube M5 is respectively connected with the drain electrode and the grid electrode of the sixth MOS tube M6 and the grid electrode of the seventh MOS tube M7, the source electrode of the sixth MOS tube M6, one end of the second current source I2 and the source electrode of the seventh MOS tube M7 are used for being connected with the second power supply module, the other end of the second current source I2 is respectively connected with the emitter electrode of the first triode Q1, the base electrode of the first triode Q1 is respectively connected with the drain electrode of the seventh MOS tube M7 and the collector electrode of the second triode Q2, the collector electrode of the first triode Q1 and the emitter electrode of the second triode Q2 are grounded, the base electrode of the second triode Q2 is respectively connected with the emitter electrode of the third triode Q3 and the drain electrode of the eighth MOS tube M8, the collector of the third triode Q3 and the collector of the fourth triode Q4 are connected with a second power supply module, the base of the third triode Q3 and the base of the fourth triode Q4 are connected with the other end of the second current source I2, the grid electrode of the eighth MOS tube M8 is respectively connected with the grid electrode and the drain electrode of the ninth MOS tube M9 and one end of the third current source I3, the other end of the third current source I3 is connected with the second power supply module, the drain electrode of the tenth MOS tube M10 is connected with the grid electrode, and after connection, the other end of the third current source I3 is respectively connected with the output end of the first voltage conversion module 51 and the grid electrode of the eleventh MOS tube M11, the drain electrode of the eleventh MOS tube M11 is respectively connected with the emitter of the fourth triode Q4 and the base electrode of the fifth triode Q5, the source electrode of the eighth MOS tube M8, the source electrode of the ninth MOS tube M9, the source electrode of the tenth MOS tube M10 and the source electrode of the eleventh MOS tube M11 are grounded, the source electrode of the twelfth MOS tube M12 and the source electrode of the thirteenth MOS tube M13 are connected with the second power supply module, the grid electrode of the thirteenth MOS tube M13 is connected with the grid electrode and the drain electrode of the twelfth MOS tube M12 and the collector electrode of the fifth triode Q5 respectively, the drain electrode of the thirteenth MOS tube M13 is connected with the modulation circuit 3, and the emitter electrode of the fifth triode Q5 is grounded.
The second power module is configured to provide a voltage for the first divider 52 to turn on the sixth MOS transistor M6 and the seventh MOS transistor M7, and the second power module and the first power module may be the same power module. The fourth MOS tube M4 and the fifth MOS tube M5 form mirror current sources and are N-type MOS tubes, the sixth MOS tube M6 and the seventh MOS tube M7 form mirror current sources and are P-type MOS tubes, the eighth MOS tube M8 and the ninth MOS tube M9 form mirror current sources and are N-type MOS tubes, the tenth MOS tube M10 and the eleventh MOS tube M11 form mirror current sources and are N-type MOS tubes, and the twelfth MOS tube M12 and the thirteenth MOS tube M13 form mirror current sources and are P-type MOS tubes.
The second output current outputted from the first divider 52 may be determined according to the following formula (3).
Wherein in the above formula (3), I 2 Referring to the second output current of the first divider 52, I1 refers to the first current provided by the first current source, I3 refers to the third current provided by the third current source, and the physical meaning of the remaining parameters may be the same as the physical meaning of the corresponding parameters in the above formula (2).
In this way, the voltage compensation amount of the voltage compensation circuit 5 can be made equal to the numerical value calculation result of the power supply voltage-related term in the above-described formula 1 by configuring the appropriate first current source I1 and third current source I3, and the appropriate first resistor R1, second resistor R2, and third resistor R3.
It should be noted that the circuit shown in fig. 4 is only an example circuit of the first divider 52, and of course, the first divider may have other circuit structures, which is not limited in this embodiment of the present application.
In some embodiments of the present application, as shown in fig. 2, the modulation circuit 3 may include: the current acquisition module SENSE, the fourth resistor R4, the slope compensation capacitor C1, the switch S, the logic driving module 31 and the pulse width modulation PWM comparator 32, the first input end and the second input end of the current acquisition module SENSE are respectively connected with the first sampling end and the second sampling end of the power stage circuit 1, the output end of the current acquisition module SENSE is respectively connected with one end of the fourth resistor R4, one end of the slope compensation capacitor C1 and one end of the switch S, the other end of the fourth resistor R4 is grounded, the positive input end of the PWM comparator 32 is respectively connected with the first input end of the detection circuit 4 and the output end of the feedback circuit 2, the negative input end of the PWM comparator 32 is used for being connected with the slope compensation circuit, and the negative input end of the PWM comparator 32 is respectively connected with the output end of the first divider 52, the other end of the slope compensation capacitor C1 and the other end of the switch S, the output end of the PWM comparator 32 is connected with the first signal end of the logic driving module 31, the second signal end of the logic driving module 31 is connected with the output end of the detection circuit 4, and the control end of the logic driving module 31 is connected with the control end of the power stage circuit 1.
When the duty ratio of the driving signal outputted by the logic driving module 31 for controlling the power stage circuit 1 is greater than 50%, in order to avoid the current error of the power stage circuit 1, a slope compensation circuit may be connected to the negative input terminal of the PWM comparator 32 to eliminate the error that may be generated by the current, and meanwhile, avoid the phenomenon that the modulation circuit 3 generates subharmonic oscillation when the power converter is in the PWM mode. Based on the above description, the compensation voltage compensated by the voltage compensation circuit 5 can be determined according to the following formula (4).
Wherein in the above formula (4), V Compensation 1 The reference voltage is the compensation voltage provided by the voltage compensation circuit 5, C1 is the capacitance value of the slope compensation capacitor, t is the charging time of the slope compensation circuit in each period, R4 is the resistance value of the fourth resistor, and the physical meaning of the remaining parameters may be the same as the physical meaning of the corresponding parameters in the formulas (1) and (3).
The working principle of the modulation circuit 3 is similar to that of the modulation circuit 3 in the related art, and the only difference is that the negative input end of the PWM comparator 32 is added with the compensation voltage provided by the voltage compensation circuit 5, so that the error amplification voltage output by the output end of the feedback circuit 2 is ensured not to change along with the change of the power supply voltage of the external power supply through the compensation voltage provided by the voltage compensation circuit 5.
In other embodiments, as shown in fig. 5, the modulation circuit 3 may include: the output end of the current acquisition module SENSE is respectively connected with one end of the fourth resistor R4, one end of the slope compensation capacitor C1, one end of the switch S and the output end of the first divider 52, the output end of the current acquisition module SENSE is also used for being connected with a voltage bias circuit, the other end of the fourth resistor R4 is grounded, the positive input end of the PWM comparator 32 is respectively connected with the first input end of the detection circuit 4 and the output end of the feedback circuit 2, the negative input end of the PWM comparator 32 is connected with the other end of the slope compensation capacitor C1 and the other end of the switch S, the negative input end of the PWM comparator 32 is used for being connected with the slope compensation circuit, the output end of the PWM comparator 32 is connected with the first signal end of the logic driving module 31, the second signal end of the logic driving module 31 is connected with the output end of the detection circuit 4, and the output end of the PWM comparator 32 is connected with the control circuit 1.
Based on the above description, the product between the second output current output by the first divider 52 and the resistance value of the fourth resistor R4 can be determined as the compensation voltage compensated by the voltage compensation circuit 5. The working principle of the modulation circuit 3 is similar to that of the modulation circuit 3 in the related art, and the only difference is that the output end of the current acquisition module SENSE is added with the compensation voltage provided by the voltage compensation circuit 5, so that the error amplification voltage output by the output end of the feedback circuit 2 is ensured not to change along with the change of the power supply voltage of the external power supply through the compensation voltage provided by the voltage compensation circuit 5.
It should be noted that, in this embodiment of the present application, the voltage compensation circuit 5 may be further disposed at the negative input end of the PWM comparator 32 and the output end of the current collecting module SENSE at the same time, so that the voltage compensation circuit 5 disposed at the negative input end of the PWM comparator 32 and the voltage compensation circuit 5 disposed at the output end of the current collecting module SENSE provide voltages at the same time to compensate, so as to ensure that the error amplification voltage output by the output end of the feedback circuit 2 does not change along with the change of the power supply voltage of the external power supply.
In this embodiment of the present application, through setting up the voltage compensation circuit that comprises first voltage conversion module and first divider at the negative input of PWM comparator 32 or the output of current acquisition module, afterwards can compensate the voltage of the negative input of PWM comparator 32 through the voltage compensation circuit that sets up, and then through the negative feedback effect of the loop that power level circuit, feedback circuit and modulation circuit formed, guarantee that the error amplification voltage of feedback circuit's output does not change along with external power supply's power supply voltage's change, thereby avoided leading to the deviation that detection circuit output's signal appears because of power supply voltage's reduction or increase, and then avoided the power supply converter to advance or delay to carry out operating mode's switching.
Fig. 6 illustrates a schematic structure of a power converter included in a bluetooth chip. As shown in fig. 6, the power converter may include a power stage circuit 1, a feedback circuit 2, a modulation circuit 3, a detection circuit 4, and a voltage compensation circuit 5, and the bluetooth chip includes a power converter including the power stage circuit 1, the feedback circuit 2, the modulation circuit 3, the detection circuit 4, and the voltage compensation circuit 5;
the power stage circuit 1 is configured to receive a first power output by an external power supply, and output a second power to an external load according to the first power, the feedback circuit 2 is configured to receive an output voltage of the power stage circuit 1, and output an error amplification voltage according to the output voltage and a configured first reference voltage, the modulation circuit 3 is configured to receive the error amplification voltage, a slope compensation current provided by an external slope compensation circuit, and a sampling current obtained by sampling the power stage circuit 1, and control the output voltage according to the error amplification voltage, the slope compensation current, and the sampling current, the voltage compensation circuit 5 is configured to receive the error amplification voltage and a power supply voltage of the external power supply, and output a compensation voltage according to the error amplification voltage and the power supply voltage, and the detection circuit 4 is configured to receive the compensation voltage, and control the modulation circuit 3 according to the compensation voltage and a configured second reference voltage, so as to modulate a working mode of the power converter.
The voltage compensation circuit 5 includes a buffer 53, a first voltage conversion module 51, a second voltage conversion module 54, a first divider 52, and a fifth resistor R5, wherein the first voltage conversion module 51 is configured to output a first output current according to the output voltage, the first divider 52 is configured to receive the first output current and output a second output current according to the first output current, the buffer 53 is configured to obtain the error amplification voltage, the second voltage conversion module 54 is configured to receive the error amplification current obtained by the buffer 53 and output a third output current according to the error amplification voltage, and the compensation voltage is obtained according to the second output current, the third output current, and the fifth resistor R5.
In some embodiments, as shown in fig. 6, a circuit structure diagram of the power converter may be shown in fig. 6, where a power input end of the power stage circuit 1 is used to be connected to an external power supply, a first sampling end and a second sampling end of the power stage circuit 1 are respectively connected to a first sampling end and a second sampling end of the modulation circuit 3, a control end of the power stage circuit 1 is connected to a control end of the modulation circuit 3, a feedback end of the power stage circuit 1 is connected to a feedback end of the feedback circuit 2, an output end of the power stage circuit 1 is used to be connected to an external load, an input end of the feedback circuit 2 is used to configure a first reference voltage, an output end of the feedback circuit 2 is respectively connected to a first voltage input end of the modulation circuit 3 and a first input end of the detection circuit 4, a second input end of the detection circuit 4 is used to configure a second reference voltage, an output end of the detection circuit 4 is connected to a signal input end of the modulation circuit 3, a second voltage input end of the modulation circuit 3 is used to be connected to a slope compensation circuit, and a ground end of the power stage circuit 1, the feedback circuit 2 and the modulation circuit 3 is grounded. The voltage compensation circuit 5 includes a buffer 53, a first voltage conversion module 51, a second voltage conversion module 54, a first divider 52 and a fifth resistor R5, where an input end of the buffer 53 is connected to an output end of the feedback circuit 2, an output end of the buffer 53 is connected to an input end of the second voltage conversion module, an output end of the second voltage conversion module 54 is connected to a first input end of the detection circuit 4, an output end of the first divider 52 and one end of the fifth resistor R5, an input end of the first voltage conversion module 51 is connected to an external power supply, an output end of the first voltage conversion module 51 is connected to an input end of the first divider 52, and another end of the fifth resistor R5 is grounded.
The buffer 53 is used for isolating the output end of the feedback circuit 2 to obtain the error amplification voltage of the output end of the feedback circuit 2 while blocking the current. The circuit structures of the power stage circuit 1, the feedback circuit 2 and the modulation circuit 3 may be the same as or similar to those of the corresponding circuits in the related art, and the embodiments of the present application will not be repeated here. The circuit structures of the first voltage conversion module 51 and the second voltage conversion module 54 are the same as those of the first voltage conversion module 51 described in the above embodiment, and in addition, the circuit structure of the first comparator is also the same as that of the first comparator described in the above embodiment, which is not repeated herein.
Since the buffer 53 is only used to obtain the error amplification voltage at the output end of the feedback circuit 2, the obtained error amplification voltage can be converted by the second voltage conversion module 54 to obtain a third output current, the power supply voltage of the external power supply connected to the first voltage conversion module 51 and the first divider 52 is converted to obtain a second output current, and then the second output current and the third output current are converted into the compensation voltage of the voltage compensation circuit 5 by the fifth resistor R5. The compensation voltage of the voltage compensation circuit 5 can be determined as follows (5).
Wherein in the above formula (5), V Compensation 2 The reference voltage is provided by the voltage compensation circuit 5, the residual value of R5 is the resistance value of the fifth resistor, and the physical meaning of the residual parameters can be the same as the physical meaning of the corresponding parameters in the formulas (2) and (3).
In this way, as long as the compensation voltage compensated by the voltage compensation circuit 5 is equal to the numerical value calculation result of the term related to the power supply voltage in the above formula 1, the voltage input by the first input end of the detection circuit 4 and the power supply voltage of the external power supply can be ensured to be uncorrelated, so that the influence of the change of the power supply voltage on the error amplification voltage can be avoided, and the deviation of the signal output by the detection circuit 4 caused by the decrease or increase of the power supply voltage is avoided.
As shown in fig. 6, the detection circuit 4 may include a PFM comparator 41, where a negative input end of the PFM comparator 41 is respectively connected to an output end of the second voltage conversion module 54, an output end of the first divider 52, and one end of the fifth resistor R5, and a positive input end of the PFM comparator 41 is used for configuring the second reference voltage, an output end of the PFM comparator 41 is connected to a signal input end of the modulation circuit 3, and an output end of the PFM comparator 41 is connected to a control end of the modulation circuit 3.
The first input end of the detection circuit 4 may be a negative input end of the PFM comparator 41, and the second input end of the detection circuit 4 may be a positive input end of the PFM comparator 41, where the PFM comparator 41 may compare the voltage compensated by the voltage compensation circuit 5 with the second reference voltage, so as to avoid deviation of the signal output by the detection circuit 4 due to reduction or increase of the power supply voltage under the condition that the error amplification voltage output by the output end of the feedback circuit 2 is not changed along with the change of the power supply voltage of the external power supply, and further avoid that the power supply converter switches working modes in advance or in delay.
In this embodiment, in normal operation of the power converter, since the buffer 53 and the second voltage conversion module 54 included in the voltage compensation circuit may be connected between the output end of the feedback circuit and the first input end of the detection circuit, and the first voltage conversion module and the first divider included in the voltage compensation circuit may be connected between the external power supply and the first input end of the detection circuit, in this way, the power voltage of the external power supply may be processed through the first voltage conversion module and the first divider, and the processed power voltage is compensated at the first input end of the detection circuit, so that the distributed voltage related to the power voltage in the error amplified voltage is neutralized through the compensated voltage, and further, the error amplified voltage output by the output end of the feedback circuit is not related to the power voltage of the external power supply, thereby avoiding deviation of the signal output by the detection circuit due to reduction or increase of the power voltage, and further avoiding that the power converter advances or delays switching of the working modes.
Fig. 7 illustrates a schematic structure of a power converter included in a bluetooth chip. As shown in fig. 7, the power converter may include a power stage circuit 1, a feedback circuit 2, a modulation circuit 3, a detection circuit 4, and a voltage compensation circuit 5, and the bluetooth chip includes a power converter including the power stage circuit 1, the feedback circuit 2, the modulation circuit 3, the detection circuit 4, and the voltage compensation circuit 5;
the power stage circuit 1 is configured to receive a first power output by an external power supply, and output a second power to an external load according to the first power, the feedback circuit 2 is configured to receive an output voltage of the power stage circuit 1, and output an error amplification voltage according to the output voltage and a configured first reference voltage, the modulation circuit 3 is configured to receive the error amplification voltage, a slope compensation current provided by an external slope compensation circuit, a sampling current obtained by sampling the power stage circuit 1, and control the output voltage according to the error amplification voltage, the slope compensation current, and the sampling current, the voltage compensation circuit 5 is configured to receive a power supply voltage of the external power supply and an external voltage provided by an external third power supply module, and output a compensation voltage according to the power supply voltage, the external voltage, and a configured second reference voltage, and the detection circuit 4 is configured to receive the error amplification voltage and the compensation voltage, and control the modulation circuit 3 according to the error amplification voltage and the compensation voltage, so as to modulate a working mode of the power converter;
The voltage compensation circuit 5 includes a forward compensation circuit 55, a reverse compensation circuit 56, and a sixth resistor R6, where the forward compensation circuit 55 is configured to receive the external voltage and output a forward current according to the external voltage and the second reference voltage, and the reverse compensation circuit 56 is configured to receive the power supply voltage and output a reverse current according to the power supply voltage, and the compensation voltage is obtained according to the forward current, the reverse current, and the sixth resistor R6.
In some embodiments, as shown in fig. 7, a circuit connection structure of the power converter may be configured such that a power supply input end of the power stage circuit 1 is connected to an external power supply, a first sampling end and a second sampling end of the power stage circuit 1 are respectively connected to a first sampling end and a second sampling end of the modulation circuit 3, a control end of the power stage circuit 1 is connected to a control end of the modulation circuit 3, a feedback end of the power stage circuit 1 is connected to a feedback end of the feedback circuit 2, an output end of the power stage circuit 1 is connected to an external load, an input end of the feedback circuit 2 is used for configuring a first reference voltage, an output end of the feedback circuit 2 is respectively connected to a first voltage input end of the modulation circuit 3 and a first input end of the detection circuit 4, a second input end of the detection circuit 4 is used for configuring a second reference voltage, an output end of the detection circuit 4 is connected to a signal input end of the modulation circuit 3, a second voltage input end of the modulation circuit 3 is used for being connected to a slope compensation circuit, a ground end of the power stage circuit 1, the feedback circuit 2 and the modulation circuit 3 are grounded, and the voltage compensation circuit 5 includes: the first input end of the forward compensation circuit 55 is used for being connected with a third power supply module, the second input end of the forward compensation circuit 55 is used for configuring a second reference voltage, the output end of the forward compensation circuit 55 is respectively connected with the output end of the reverse compensation circuit 56, one end of the sixth resistor R6 and the second input end of the detection circuit 4, the input end of the reverse compensation circuit 56 is used for being connected with an external power supply, and the other end of the sixth resistor R6 is grounded.
The third power module is configured to provide a voltage for the voltage compensation circuit 5 to turn on the fourteenth MOS transistor M14, and the third power module, the first power module, and the second power module may be the same power module.
As shown in fig. 7, the forward compensation circuit 55 may include a second operational amplifier OP2, a fourteenth MOS transistor M14, a seventh resistor R7, and an eighth resistor R8, where a negative input end of the second operational amplifier OP2 is configured with the second reference voltage, a positive input end of the second operational amplifier OP2 is connected to one end of the 7 th resistor R7 and one end of the eighth resistor R8, an output end of the second operational amplifier OP2 is connected to a gate of the fourteenth MOS transistor M14, another end of the seventh resistor R7 is connected to a drain of the fourteenth MOS transistor M14, a source of the fourteenth MOS transistor M14 is connected to the third power module, another end of the eighth resistor R8 is connected to an output end of the reverse compensation circuit 56, a first input end of the detection circuit 4, and one end of the sixth resistor R6, and another end of the sixth resistor R6 is grounded.
As shown in fig. 7, the reverse compensation circuit 56 may include a first voltage conversion module 51 and a second divider 57, where an input end of the first voltage conversion module 51 is used to be connected to the external power supply, an output end of the first voltage conversion module 51 is connected to an input end of the second divider 55, and an output end of the second divider is connected to an output end of the forward compensation circuit 55, a first input end of the detection circuit 4, and one end of the sixth resistor R6, respectively.
The circuit structure of the first voltage conversion module 51 is the same as that of the first voltage conversion module 51 described in the above embodiment, and the circuit structures of the working circuit power stage circuit 1, the feedback circuit 2 and the modulation circuit 3 may be the same as or similar to those of the corresponding circuits in the related art, which is not described herein.
The power supply voltage of the external power supply is converted by the first voltage conversion module 51 and the second divider 55, and then the converted current is converted into the compensation voltage of the voltage compensation circuit 5 by the sixth resistor R6. The compensation voltage of the voltage compensation circuit 5 can be determined according to the following formula (6).
Wherein in the above formula (6), V Compensation 3 The reference voltage is the compensation voltage provided by the voltage compensation circuit 5, R6 is the resistance value of the sixth resistor R6, and the physical meaning of the remaining parameters may be the same as the physical meaning of the corresponding parameters in the above formulas (2) and (3).
In this way, as long as the compensation voltage compensated by the voltage compensation circuit 5 is equal to the numerical value calculation result of the term related to the power supply voltage in the above formula 1, the error amplification voltage output by the output end of the feedback circuit 2 and the voltage of the second input end of the detection circuit 4 are ensured to synchronously change, so that the influence of the change of the power supply voltage on the error amplification voltage can be avoided, and the deviation of the signal output by the detection circuit 4 caused by the reduction or the increase of the power supply voltage is avoided.
As shown in fig. 7, the detection circuit 4 may include a PFM comparator 41, where a negative input terminal of the PFM comparator 41 is connected to the first voltage input terminal of the modulation circuit 3 and an output terminal of the feedback circuit 2, and a positive input terminal of the PFM comparator 41 is connected to an output terminal of the forward compensation circuit 55, an output terminal of the reverse compensation circuit 56, and one terminal of the sixth resistor R6, respectively, and an output terminal of the PFM comparator 41 is connected to a signal input terminal of the modulation circuit 3.
The first input end of the detection circuit 4 may be a negative input end of the PFM comparator 41, and the second input end of the detection circuit 4 may be a positive input end of the PFM comparator 41, at this time, the PFM comparator 41 may compare the voltage compensated by the voltage compensation circuit 5 with the error amplification voltage output by the output end of the feedback circuit 2, so as to avoid deviation of the signal output by the detection circuit 4 due to reduction or increase of the power supply voltage under the condition of ensuring synchronous change of the error amplification voltage output by the output end of the feedback circuit 2 and the voltage of the second input end of the detection circuit 4, thereby avoiding that the power supply converter switches working modes in advance or delay.
As shown in fig. 8, the second divider 55 includes a fourth current source I4, a fifth current source I5, a sixth current source I6, a fifteenth MOS transistor M15, a sixteenth MOS transistor M16, a seventeenth MOS transistor M17, an eighteenth MOS transistor M18, a nineteenth MOS transistor M19, a twenty-first MOS transistor M20, a twenty-first MOS transistor M21, a twenty-first MOS transistor M22, a twenty-first MOS transistor M23, a twenty-first MOS transistor M24, a twenty-first MOS transistor M25, a twenty-first MOS transistor M26, a sixth transistor Q6, a seventh transistor Q7, an eighth transistor Q8, a ninth transistor Q9, and a tenth transistor Q10.
One end of the fourth current source I4 is used for being connected with a fourth power supply module, the other end of the fourth current source I4 is respectively connected with a drain electrode and a grid electrode of a fifteenth MOS tube M15 and a grid electrode of the fifteenth MOS tube M15, the drain electrode of the fifteenth MOS tube M15 is respectively connected with a drain electrode and a grid electrode of a seventeenth MOS tube M17 and a grid electrode of an eighteenth MOS tube M18, both the source electrode of the fifteenth MOS tube M15 and the source electrode of a sixteenth MOS tube M16 are grounded, the source electrode of the seventeenth MOS tube M17, one end of a fifth current source I5 and the source electrode of the eighteenth MOS tube M18 are used for being connected with the fourth power supply module, the other end of the fifth current source I5 is connected with an emitter electrode of a sixth triode Q6, a base electrode of the sixth triode Q6 is respectively connected with the drain electrode of the eighteenth MOS tube M18 and a collector electrode of the seventh triode Q7, a collector electrode of the sixth triode Q6 and an emitter electrode of the seventh triode Q7 are grounded, the base of the seventh triode Q7 is connected with the emitter of the eighth triode Q8 and the drain of the nineteenth MOS tube M19 respectively, the collector of the eighth triode Q8 and the collector of the ninth triode Q9 are connected with a fifth power supply module, the base of the eighth triode Q8 and the base of the ninth triode Q9 are connected with the other end of a fifth current source I5 respectively, the grid of the nineteenth MOS tube M19 is connected with the grid and the drain of a twentieth MOS tube M20 respectively, one end of a sixth current source I6 is connected, the other end of the sixth current source I6 is connected with the fifth power supply module, the drain of the twenty-first MOS tube M21 is connected with the grid, and after connection, the drain of the twenty-second MOS tube M22 is connected with the emitter of the ninth triode Q9 and the base of the thirteenth MOS tube Q10 respectively, the source of the nineteenth MOS tube M19, the source of the twenty-first MOS tube M20, the source of the twenty-first MOS transistor M21 and the source of the twenty-second MOS transistor M22 are grounded, the source of the twenty-fifth MOS transistor M23 and the source of the twenty-fourth MOS transistor M24 are connected to the fifth power module, the gate of the twenty-fourth MOS transistor M24 is connected to the gate and the drain of the twenty-third MOS transistor M23 and the collector of the thirteenth transistor Q10, the emitter of the tenth transistor Q10 is grounded, the drain of the twenty-fourth MOS transistor M24 is connected to the gate and the drain of the twenty-fifth MOS transistor M25 and the gate of the twenty-sixth MOS transistor M26, the source of the twenty-fifth MOS transistor M25 and the source of the twenty-sixth MOS transistor M26 are grounded, and the drain of the twenty-sixth MOS transistor M26 is connected to the positive input terminal of the PFM comparator 41, one end of the sixth resistor R6 and the output of the forward compensation circuit 55, respectively.
The fourth power module is configured to provide a voltage for the second divider 55, and simultaneously turn on the seventeenth MOS transistor M17 and the eighteenth MOS transistor M18, where the fourth power module, the first power module, the second power module, and the third power module may be the same power module. The fifteenth MOS tube M15 and the sixteenth MOS tube M16 form mirror current sources and are all N-type MOS tubes, the seventeenth MOS tube M17 and the eighteenth MOS tube M18 form mirror current sources and are all P-type MOS tubes, the nineteenth MOS tube M19 and the twenty-eighth MOS tube M20 form mirror current sources and are all N-type MOS tubes, the twenty-first MOS tube M21 and the twenty-first MOS tube M22 form mirror current sources and are all N-type MOS tubes, the twenty-third MOS tube M23 and the twenty-first MOS tube M24 form mirror current sources and are all P-type MOS tubes, and the twenty-first MOS tube M25 and the twenty-first MOS tube M26 form mirror current sources and are all N-type MOS tubes.
The calculation manner of the fourth output current output by the output end of the second divider 55 may be the same as or similar to the calculation manner of the second output current output by the output end of the first divider 52, which is not described herein.
In this embodiment, in the normal work of the power converter that bluetooth chip includes, because the first voltage conversion module and the second divider that voltage compensation circuit includes can be connected between external power supply and detection circuit's second input, like this, can handle external power supply's power supply voltage through first voltage conversion module and second divider, with the realization is to the compensation of second reference voltage, thereby make the voltage after the compensation and error amplifier output's error amplified voltage synchronous change, and then guarantee feedback circuit's output's error amplified voltage and detection circuit's second input's voltage synchronous change, thereby avoided leading to the deviation that detection circuit output's signal appears because of power supply's reduction or increase, and then avoided power converter to advance or delay to carry out operating mode's switching.
The foregoing description of the preferred embodiments of the invention is not intended to limit the invention to the precise form disclosed, and any such modifications, equivalents, and alternatives falling within the spirit and scope of the invention are intended to be included within the scope of the invention.

Claims (10)

1. The Bluetooth chip is characterized by comprising a power converter, wherein the power converter comprises a power level circuit (1), a feedback circuit (2), a modulation circuit (3), a detection circuit (4) and a voltage compensation circuit (5);
the power stage circuit (1) is used for receiving first power output by an external power supply and outputting second power to an external load according to the first power, the feedback circuit (2) is used for receiving output voltage of the power stage circuit (1) and outputting error amplification voltage according to the output voltage and configured first reference voltage, the modulation circuit (3) is used for receiving the error amplification voltage, slope compensation current provided by an external slope compensation circuit, sampling current obtained by sampling the power stage circuit (1) and controlling the output voltage according to the error amplification voltage, the slope compensation current and the sampling current, the detection circuit (4) is used for receiving the error amplification voltage and controlling the modulation circuit (3) according to the error amplification voltage and configured second reference voltage so as to modulate the working mode of the power converter, and the voltage compensation circuit (5) is used for receiving the power voltage of the external power supply and outputting compensation voltage to the modulation circuit (3) according to the power voltage;
The voltage compensation circuit (5) comprises a first voltage conversion module (51) and a first divider (52), wherein the first voltage conversion module (51) is used for receiving the power supply voltage and outputting a first output current according to the power supply voltage, the first divider (52) is used for receiving the first output current and outputting a second output current according to the first output current, and the compensation voltage is obtained according to the second output current.
2. The bluetooth chip according to claim 1, wherein the first voltage conversion module (51) comprises: the first resistor (R1), the second resistor (R2), the third resistor (R3), the first operational amplifier (OP 1), the first metal oxide semiconductor MOS tube (M1), the second MOS tube (M2) and the third MOS tube (M3);
one end of the first resistor (R1) is used for being connected with the external power supply, the other end of the first resistor (R1) is respectively connected with one end of the second resistor (R2) and the negative input end of the first operational amplifier (OP 1), the positive input end of the first operational amplifier (OP 1) is respectively connected with one end of the third resistor (R3) and the drain electrode of the first MOS tube (M1), the output end of the first operational amplifier (OP 1) is connected with the grid electrode of the first MOS tube (M1), and the other end of the second resistor (R2) and the other end of the third resistor (R3) are grounded;
The source electrode of the first MOS tube (M1) is connected with the drain electrode and the grid electrode of the second MOS tube (M2) and the grid electrode of the third MOS tube (M3) respectively, the source electrode of the second MOS tube (M2) and the source electrode of the third MOS tube (M3) are connected with a first power supply module, and the drain electrode of the third MOS tube (M3) is connected with the input end of the first divider (52).
3. The bluetooth chip according to claim 1, wherein the first divider (52) includes a first current source (I1), a second current source (I2), a third current source (I3), a fourth MOS transistor (M4), a fifth MOS transistor (M5), a sixth MOS transistor (M6), a seventh MOS transistor (M7), an eighth MOS transistor (M8), a ninth MOS transistor (M9), a tenth MOS transistor (M10), an eleventh MOS transistor (M11), a twelfth MOS transistor (M12), a thirteenth MOS transistor (M13), a first transistor (Q1), a second transistor (Q2), a third transistor (Q3), a fourth transistor (Q4), and a fifth transistor (Q5);
one end of the first current source (I1) is used for being connected with a second power supply module, the other end of the first current source (I1) is respectively connected with a drain electrode and a grid electrode of the fourth MOS tube (M4) and a grid electrode of the fifth MOS tube (M5), a source electrode of the fourth MOS tube (M4) and a source electrode of the fifth MOS tube (M5) are grounded, and a drain electrode of the fifth MOS tube (M5) is respectively connected with a drain electrode and a grid electrode of the sixth MOS tube (M6) and a grid electrode of the seventh MOS tube (M7);
The source electrode of the sixth MOS tube (M6), one end of the second current source (I2) and the source electrode of the seventh MOS tube (M7) are connected with the second power supply module, the other end of the second current source (I2) is connected with the emitter electrode of the first triode (Q1), the base electrode of the first triode (Q1) is respectively connected with the drain electrode of the seventh MOS tube (M7) and the collector electrode of the second triode (Q2), the collector electrode of the first triode (Q1) and the emitter electrode of the second triode (Q2) are grounded, and the base electrode of the second triode (Q2) is respectively connected with the emitter electrode of the third triode (Q3) and the drain electrode of the eighth MOS tube (M8);
the collector of the third triode (Q3) and the collector of the fourth triode (Q4) are used for being connected with the second power supply module, the base of the third triode (Q3) and the base of the fourth triode (Q4) are both connected with the other end of the second current source (I2), the grid of the eighth MOS tube (M8) is respectively connected with the grid and the drain of the ninth MOS tube (M9) and one end of the third current source (I3), the other end of the third current source (I3) is used for being connected with the second power supply module, the drain and the grid of the tenth MOS tube (M10) are respectively connected with the output end of the first voltage conversion module (51) and the grid of the eleventh MOS tube (M11), the drain of the eleventh MOS tube (M11) is respectively connected with the emitter of the fourth MOS tube (Q4) and the base of the fifth MOS tube (Q5), and the drain of the eighth MOS tube (M8) is connected with the source of the eighth MOS tube (M9) and the source of the tenth MOS tube (M11);
The source electrode of the twelfth MOS tube (M12) and the source electrode of the thirteenth MOS tube (M13) are connected with the second power supply module, the grid electrode of the thirteenth MOS tube (M13) is respectively connected with the grid electrode and the drain electrode of the twelfth MOS tube (M12) and the collector electrode of the fifth triode (Q5), the drain electrode of the thirteenth MOS tube (M13) is connected with the modulation circuit (3), and the emitter electrode of the fifth triode (Q5) is grounded.
4. A bluetooth chip according to any of claims 1-3, wherein the modulation circuit (3) comprises: a current acquisition module (SENSE), a fourth resistor (R4), a slope compensation capacitor (C1), a switch (S), a logic driving module (31) and a pulse width modulation PWM comparator (32);
the first input end and the second input end of the current acquisition module (SENSE) are respectively connected with the first sampling end and the second sampling end of the power stage circuit (1), the output end of the current acquisition module (SENSE) is respectively connected with one end of the fourth resistor (R4), one end of the slope compensation capacitor (C1) and one end of the switch (S), and the other end of the fourth resistor (R4) is grounded;
the positive input end of the PWM comparator (32) is respectively connected with the first input end of the detection circuit (4) and the output end of the feedback circuit (2), the negative input end of the PWM comparator (32) is used for being connected with the slope compensation circuit, the negative input end of the PWM comparator (32) is respectively connected with the output end of the first divider (52), the other end of the slope compensation capacitor (C1) and the other end of the switch (S), the output end of the PWM comparator (32) is connected with the first signal end of the logic driving module (31), the second signal end of the logic driving module (31) is connected with the output end of the detection circuit (4), and the control end of the logic driving module (31) is connected with the control end of the power level circuit (1).
5. A bluetooth chip according to any of claims 1-3, wherein the modulation circuit (3) comprises: a current acquisition module (SENSE), a fourth resistor (R4), a slope compensation capacitor (C1), a switch (S), a logic driving module (31) and a PWM comparator (32);
the first input end and the second input end of the current acquisition module (SENSE) are respectively connected with the first sampling end and the second sampling end of the power stage circuit (1), the output end of the current acquisition module (SENSE) is respectively connected with one end of the fourth resistor (R4), one end of the slope compensation capacitor (C1), one end of the switch (S) and the output end of the first divider (52), and the output end of the current acquisition module (SENSE) is also used for being connected with a voltage bias circuit, and the other end of the fourth resistor (R4) is grounded;
the positive input end of the PWM comparator (32) is respectively connected with the first input end of the detection circuit (4) and the output end of the feedback circuit (2), the negative input end of the PWM comparator (32) is connected with the other end of the slope compensation capacitor (C1) and the other end of the switch (S), the negative input end of the PWM comparator (32) is used for being connected with the slope compensation circuit, the output end of the PWM comparator (32) is connected with the first signal end of the logic driving module (31), the second signal end of the logic driving module (31) is connected with the output end of the detection circuit (4), and the control end of the logic driving module (31) is connected with the control end of the power level circuit (1).
6. The Bluetooth chip is characterized by comprising a power converter, wherein the power converter comprises a power level circuit (1), a feedback circuit (2), a modulation circuit (3), a detection circuit (4) and a voltage compensation circuit (5);
the power stage circuit (1) is used for receiving first power output by an external power supply and outputting second power to an external load according to the first power, the feedback circuit (2) is used for receiving output voltage of the power stage circuit (1) and outputting error amplification voltage according to the output voltage and configured first reference voltage, the modulation circuit (3) is used for receiving the error amplification voltage, slope compensation current provided by an external slope compensation circuit, sampling current obtained by sampling the power stage circuit (1) and controlling the output voltage according to the error amplification voltage, the slope compensation current and the sampling current, the voltage compensation circuit (5) is used for receiving the error amplification voltage and the power voltage of the external power supply and outputting compensation voltage according to the error amplification voltage and the power voltage, and the detection circuit (4) is used for receiving the compensation voltage and controlling the modulation circuit (3) according to the compensation voltage and configured second reference voltage so as to modulate the working mode of the power converter;
The voltage compensation circuit (5) comprises a buffer (53), a first voltage conversion module (51), a second voltage conversion module (54), a first divider (52) and a fifth resistor (R5), wherein the first voltage conversion module (51) is used for outputting a first output current according to the output voltage, the first divider (52) is used for receiving the first output current and outputting a second output current according to the first output current, the buffer (53) is used for acquiring the error amplification voltage, the second voltage conversion module (54) is used for receiving the error amplification current acquired by the buffer (53) and outputting a third output current according to the error amplification voltage, and the compensation voltage is acquired according to the second output current, the third output current and the fifth resistor (R5).
7. The bluetooth chip according to claim 6, wherein the detection circuit (4) comprises a pulse frequency modulated PFM comparator (41), a negative input of the PFM comparator (41) being connected to the output of the second voltage conversion module (54), the output of the first divider (52) and one end of the fifth resistor (R5), respectively, a positive input of the PFM comparator (41) being arranged for configuring the second reference voltage, and an output of the PFM comparator (41) being connected to a signal input of the modulation circuit (3).
8. The Bluetooth chip is characterized by comprising a power converter, wherein the power converter comprises a power level circuit (1), a feedback circuit (2), a modulation circuit (3), a detection circuit (4) and a voltage compensation circuit (5);
the power stage circuit (1) is used for receiving first power output by an external power supply and outputting second power to an external load according to the first power, the feedback circuit (2) is used for receiving output voltage of the power stage circuit (1) and outputting error amplification voltage according to the output voltage and configured first reference voltage, the modulation circuit (3) is used for receiving the error amplification voltage, slope compensation current provided by an external slope compensation circuit, sampling current obtained by sampling the power stage circuit (1) and controlling the output voltage according to the error amplification voltage, the slope compensation current and the sampling current, the voltage compensation circuit (5) is used for receiving the power voltage of the external power supply and external voltage provided by an external third power supply module and outputting compensation voltage according to the power voltage, the external voltage and configured second reference voltage, and the detection circuit (4) is used for receiving the error amplification voltage and the compensation voltage and controlling the modulation circuit (3) according to the error amplification voltage and the compensation voltage so as to work mode of the converter;
The voltage compensation circuit (5) comprises a forward compensation circuit (55), a reverse compensation circuit (56) and a sixth resistor (R6), wherein the forward compensation circuit (55) is used for receiving the external voltage and outputting forward current according to the external voltage and the second reference voltage, the reverse compensation circuit (56) is used for receiving the power supply voltage and outputting reverse current according to the power supply voltage, and the compensation voltage is obtained according to the forward current, the reverse current and the sixth resistor (R6).
9. The bluetooth chip according to claim 8, wherein the detection circuit (4) comprises a pulse frequency modulated PFM comparator (41), a negative input of the PFM comparator (41) is connected to the modulation circuit (3) and the feedback circuit (2), respectively, a positive input of the PFM comparator (41) is connected to an output of the forward compensation circuit (55), an output of the reverse compensation circuit (56) and one end of the sixth resistor (R6), respectively, and an output of the PFM comparator (41) is connected to a signal input of the modulation circuit (3).
10. The bluetooth chip according to claim 8 or 9, wherein the forward compensation circuit (55) comprises: the second operational amplifier (OP 2), a fourteenth MOS tube (M14), a seventh resistor (R7) and an eighth resistor (R8), and the reverse compensation circuit (56) comprises: a first voltage conversion module (51) and a second divider (57);
The negative input end of the second operational amplifier (OP 2) is used for configuring the second reference voltage, the positive input end of the second operational amplifier (OP 2) is respectively connected with one end of the seventh resistor (R7) and one end of the eighth resistor (R8), the output end of the second operational amplifier (OP 2) is connected with the grid electrode of the fourteenth MOS transistor (M14), the other end of the seventh resistor (R7) is connected with the drain electrode of the fourteenth MOS transistor (M14), the source electrode of the fourteenth MOS transistor (M14) is used for being connected with the third power supply module, the other end of the eighth resistor (R8) is respectively connected with the output end of the reverse compensation circuit (56), the first input end of the detection circuit (4) and one end of the sixth resistor (R6), and the other end of the sixth resistor (R6) is grounded;
the input end of the first voltage conversion module (51) is used for being connected with the external power supply, the output end of the first voltage conversion module (51) is connected with the input end of the second divider (55), and the output end of the second divider is respectively connected with the output end of the forward compensation circuit (55), the first input end of the detection circuit (4) and one end of the sixth resistor (R6).
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CN102255526A (en) * 2011-06-23 2011-11-23 深圳市富满电子有限公司南山分公司 AC-DC power supply conversion chip and power switching circuit

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