CN112071874A - Silicon drift detector and metal oxide semiconductor field effect transistor integrated device - Google Patents

Abstract

The invention discloses a silicon drift detector and metal oxide semiconductor field effect transistor integrated device, comprising: a silicon body; the p-type silicon body is positioned in the silicon body, and the upper surface of the p-type silicon body is flush with the upper surface of the silicon body; the grid electrode is arranged on the silicon dioxide layer and is positioned above the p-type silicon body; the source electrode and the drain electrode are respectively arranged at two sides of the grid electrode, are positioned in the p-type silicon body and are flush with the surface of the p-type silicon body; the p-type heavily doped region is arranged in the silicon body, surrounds the metal oxide semiconductor field effect transistor and is flush with the surface of the p-type silicon body; the anode collecting electrode is positioned in the silicon body, is arranged at intervals with the p-type heavily doped region and is flush with the surface of the p-type silicon body; the cathode ring is positioned in the silicon body, is arranged at a distance from the anode collecting electrode and is flush with the surface of the p-type silicon body; a silicon dioxide layer disposed on the silicon body in contact with the silicon body; and the cathode ring, the anode collecting electrode, the p-type heavily doped region, the source electrode and the drain electrode are exposed by etching the silicon dioxide layer.

Description

A silicon drift detector integrated with a metal-oxide-semiconductor field-effect transistor device

technical field

The invention belongs to the field of chip structures, and in particular relates to an integrated device of a silicon drift detector and a metal oxide semiconductor field effect transistor.

Background technique

Although there have been quite a few papers or patents published on the design of silicon drift detector device chips, due to the high resolution and high sensitivity of silicon drift detectors, its application range is quite wide, which also makes researchers and enterprises to Its interest is growing. When the existing detector is integrated with the pre- and post-amplifier circuits, it is often considered to use wire bonding or flip-chip welding. However, no matter which method, as long as the lead wire is added, its electrical performance will be affected. positive effect,

SUMMARY OF THE INVENTION

In view of the above-mentioned shortcomings of the prior art, the purpose of the present invention is to provide an integrated device of a silicon drift detector and a metal-oxide-semiconductor field effect transistor, which is used to solve the defects of the prior art.

In order to achieve the above object and other related objects, the present invention provides a silicon drift detector and a metal oxide semiconductor field effect transistor integrated device, the silicon drift detector includes an anode collector electrode 10, a cathode ring 12, the metal oxide The semiconductor field effect transistor includes a gate 4, a source 6 and a drain 6', and the integrated device includes:

substrate 1;

The p-type silicon body 2 is located in the substrate 1, and the upper surface is flush with the upper surface of the substrate 1;

The gate electrode 4 is arranged on the silicon dioxide layer, and is located above the p-type silicon body; the source electrode and the drain electrode are respectively arranged on both sides of the gate electrode and are located on the p-type silicon body. In the silicon body and flush with the surface of the p-type silicon body;

The p-type heavily doped region 8 is disposed in the substrate, surrounds the MOSFET and is flush with the surface of the p-type silicon body;

The anode collector electrode 10, located in the substrate, is spaced apart from the p-type heavily doped region 8 and is flush with the surface of the p-type silicon body;

The cathode ring 12, located in the substrate, is spaced from the anode collector electrode 10 and is flush with the surface of the p-type silicon body;

A silicon dioxide layer, disposed on the substrate, is in contact with the silicon body; the cathode ring 12, the anode collector electrode 10, the p-type heavily doped region 8, and the source electrode 6 are exposed by etching the silicon dioxide layer , Drain 6`.

Optionally, part of the p-type heavily doped region 8 is disposed inside the p-type silicon body 2 , and another part is disposed outside the p-type silicon body 2 .

Optionally, the source electrode 6 is an n-type heavily doped region, and the drain electrode 6' is an n-type heavily doped region.

Optionally, the anode collector electrode 10 is heavily n-type doped.

Optionally, the metal-oxide-semiconductor field-effect transistor MOSFET is any one of n-channel/p-channel enhancement mode or depletion mode.

Optionally, the silicon drift detector further includes: a back electrode 3 disposed on the lower surface of the substrate 1 .

Optionally, the back electrode 3 is a p-type heavily doped electrode.

Optionally, the thickness of the substrate is 100 micrometers to 5 millimeters.

As described above, the integrated device of a silicon drift detector and a metal oxide semiconductor field effect transistor of the present invention has the following beneficial effects:

The invention integrates the metal-oxide-semiconductor field-effect transistor and the detector on one chip, which is beneficial to the subsequent readout of the detector, as well as the package integration of the system. From the process point of view, the production of amplifier chips and the lead or flip-chip connection are reduced, which can greatly reduce the possible noise sources of the system, improve the resolution and other properties, and simplify the integration process and packaging process. The metal-oxide-semiconductor field-effect transistor is a MOSFET, which itself has the property of detection and can be used as a detector to provide practicability for the realization of an integrated device chip of a silicon drift detector and a metal-oxide-semiconductor field-effect transistor.

Description of drawings

FIG. 1 is a schematic diagram of an integrated device of a silicon drift detector and a metal oxide semiconductor field effect transistor according to an embodiment.

Detailed ways

The embodiments of the present invention are described below through specific specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that the following embodiments and features in the embodiments may be combined with each other under the condition of no conflict.

It should be noted that the drawings provided in the following embodiments are only used to illustrate the basic concept of the present invention in a schematic way, so the drawings only show the components related to the present invention rather than the number, shape and number of components in actual implementation. For dimension drawing, the type, quantity and proportion of each component can be changed at will in actual implementation, and the component layout may also be more complicated.

As shown in FIG. 1, a silicon drift detector is integrated with a metal oxide semiconductor field effect transistor. The silicon drift detector includes an anode collector electrode 10 and a cathode ring 12, and the metal oxide semiconductor field effect transistor includes a gate electrode. pole 4, source 6, drain 6', the integrated device includes:

Substrate 1; wherein, the substrate is silicon, and the thickness of the silicon body is 100 microns to 5 mm.

The p-type silicon body 2 is located in the substrate 1, and the upper surface is flush with the upper surface of the substrate 1;

The gate electrode 4 is disposed on the silicon dioxide layer, and is located above the p-type silicon body; the source electrode and the drain electrode are respectively disposed on both sides of the gate electrode and located on the p-type silicon body. in the body and flush with the surface of the p-type silicon body;

A p-type heavily doped region 8 is disposed in the substrate, surrounds the MOSFET and is flush with the surface of the p-type silicon body; the p-type heavily doped region 8 is used to isolate the central region FET and peripheral SDD detector

The anode collector electrode 10, located in the substrate, is spaced apart from the p-type heavily doped region 8 and is flush with the surface of the p-type silicon body;

The cathode ring, located in the substrate, is spaced from the anode collector electrode 10 and is flush with the surface of the p-type silicon body; wherein, the cathode ring includes a first ring cathode ring 12 or a suspended guard ring, and the second Two cathode rings 14 .

A silicon dioxide layer, disposed on the substrate, is in contact with the silicon body; the cathode ring 12, the anode collector electrode 10, the p-type heavily doped region 8, and the source electrode 6 are exposed by etching the silicon dioxide layer , Drain 6`.

After the silicon dioxide layer is etched, silicon dioxide region 5 , silicon dioxide region 7 , silicon dioxide region 9 , silicon dioxide region 11 , silicon dioxide region 13 , and silicon dioxide region 15 are formed.

In one embodiment, part of the p-type heavily doped region 8 is disposed inside the p-type silicon body 2 , and another part is disposed outside the p-type silicon body 2 .

In one embodiment, the source electrode 6 is an n-type heavily doped region, and the drain electrode 6' is an n-type heavily doped region.

In one embodiment, the anode collector electrode 10 is heavily n-type doped.

In one embodiment, the metal oxide semiconductor field effect transistor MOSFET is any one of n-channel/p-channel enhancement mode or depletion mode.

MOSFET itself is a structure with detection and amplification properties. Different types have different properties, structures and voltage application methods. In Figure 1, an n-channel enhancement type metal oxide semiconductor field effect transistor is used. It is worth noting that when n-type MOSFET is integrated with p-type MOSFET, due to the complementarity of physical characteristics of NMOS and PMOS, complementary metal-oxide-semiconductor field effect transistors are formed, that is, CMOS components and processes , whether to use CMOS technology depends on the situation. Similar to the triode, the conduction condition of p-channel MOSFET is that the gate voltage is more than 5V lower than the drain voltage, and the conduction condition of n-channel MOSFET is that the gate voltage is more than 5V higher than the source voltage.

In one embodiment, the silicon drift detector further includes: a back electrode 3 disposed on the lower surface of the substrate 1 . Wherein, the back electrode 3 is a p-type heavily doped electrode, which can be a whole area, or a spiral or concentric ring design, and the doping thickness is generally 10 microns.

Those skilled in the art can clearly understand that, for the convenience and simplicity of description, only the division of the above-mentioned functional units and modules is used as an example. Module completion, that is, dividing the internal structure of the device into different functional units or modules to complete all or part of the functions described above. Each functional unit and module in the embodiment may be integrated in one processing unit, or each unit may exist physically alone, or two or more units may be integrated in one unit, and the above-mentioned integrated units may adopt hardware. It can also be realized in the form of software functional units. In addition, the specific names of the functional units and modules are only for the convenience of distinguishing from each other, and are not used to limit the protection scope of the present application. For the specific working process of the units and modules in the above-mentioned system, reference may be made to the corresponding process in the foregoing method embodiments, which will not be repeated here.

In the foregoing embodiments, the description of each embodiment has its own emphasis. For parts that are not described or described in detail in a certain embodiment, reference may be made to the relevant descriptions of other embodiments.

Those of ordinary skill in the art can realize that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Skilled artisans may implement the described functionality using different methods for each particular application, but such implementations should not be considered beyond the scope of the present invention.

In the embodiments provided by the present invention, it should be understood that the disclosed apparatus/terminal device and method may be implemented in other manners. For example, the apparatus/terminal device embodiments described above are only illustrative. For example, the division of the modules or units is only a logical function division. In actual implementation, there may be other division methods, such as multiple units. Or components may be combined or may be integrated into another system, or some features may be omitted, or not implemented. On the other hand, the shown or discussed mutual coupling or direct coupling or communication connection may be through some interfaces, indirect coupling or communication connection of devices or units, and may be in electrical, mechanical or other forms.

The units described as separate components may or may not be physically separated, and components displayed as units may or may not be physical units, that is, may be located in one place, or may be distributed to multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution in this embodiment.

In addition, each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may exist physically alone, or two or more units may be integrated into one unit. The above-mentioned integrated units may be implemented in the form of hardware, or may be implemented in the form of software functional units.

The integrated modules/units, if implemented in the form of software functional units and sold or used as independent products, may be stored in a computer-readable storage medium. Based on this understanding, the present invention can implement all or part of the processes in the methods of the above embodiments, and can also be completed by instructing relevant hardware through a computer program, and the computer program can be stored in a computer-readable storage medium. When the program is executed by the processor, the steps of the foregoing method embodiments can be implemented. Wherein, the computer program includes computer program code, and the computer program code may be in the form of source code, object code, executable file or some intermediate form, and the like. The computer-readable medium may include: any entity or device capable of carrying the computer program code, a recording medium, a U disk, a removable hard disk, a magnetic disk, an optical disk, a computer memory, a read-only memory (ROM, Read-Only Memory) , Random Access Memory (RAM, Random Access Memory), electric carrier signal, telecommunication signal and software distribution medium, etc.

The above-mentioned embodiments merely illustrate the principles and effects of the present invention, but are not intended to limit the present invention. Anyone skilled in the art can modify or change the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or changes made by those with ordinary knowledge in the technical field without departing from the spirit and technical idea disclosed in the present invention should still be covered by the claims of the present invention.

Claims (8)

1. A silicon drift detector and a metal oxide semiconductor field effect transistor integrated device, characterized in that the silicon drift detector comprises an anode collector electrode (10), a cathode ring (12), the metal oxide semiconductor field The effect transistor comprises a gate (4), a source (6), a drain (6'), and the integrated device comprises: substrate (1); A p-type silicon body (2) is located in the substrate (1), and the upper surface is flush with the upper surface of the substrate (1); The gate electrode (4) is arranged on the silicon dioxide layer and is located above the p-type silicon body; the source electrode and the drain electrode are respectively arranged on both sides of the gate electrode and are located on the p-type silicon body. In the silicon body and flush with the surface of the p-type silicon body; A p-type heavily doped region (8) is disposed in the substrate, surrounds the MOSFET and is flush with the surface of the p-type silicon body; The anode collector electrode (10), located in the substrate, is spaced apart from the p-type heavily doped region (8) and is flush with the surface of the p-type silicon body; the cathode ring (12), located in the substrate, spaced apart from the anode collector electrode (10) and flush with the surface of the p-type silicon body; A silicon dioxide layer, disposed on the substrate and in contact with the substrate; the cathode ring (12), the anode collector electrode (10), the p-type heavily doped region ( 8), source (6), drain (6'). 2 . The silicon drift detector and metal oxide semiconductor field effect transistor integrated device according to claim 1 , wherein the p-type heavily doped region ( 8 ) is partially disposed on the p-type silicon body ( 2 ). 3 . ), and the other part is arranged outside the p-type silicon body (2). 3. The silicon drift detector and metal oxide semiconductor field effect transistor integrated device according to claim 1, wherein the source electrode (6) is an n-type heavily doped region, and the drain electrode (6' ) is an n-type heavily doped region. 4 . The silicon drift detector and metal oxide semiconductor field effect transistor integrated device according to claim 1 , wherein the anode collector electrode ( 10 ) is heavily n-type doped. 5 . 5 . The silicon drift detector and metal oxide semiconductor field effect transistor integrated device according to claim 1 , wherein the metal oxide semiconductor field effect transistor (MOSFET) is an n-channel/p-channel enhancement type or depletion type. 6 . any of the. 6. The silicon drift detector and the metal-oxide-semiconductor field effect transistor integrated device according to claim 1, wherein the silicon drift detector further comprises: a silicon drift detector disposed on the lower surface of the substrate (1). Back electrode (3). 7 . The silicon drift detector and metal oxide semiconductor field effect transistor integrated device according to claim 6 , wherein the back electrode ( 3 ) is a heavily doped p-type electrode. 8 . 8 . The silicon drift detector and metal oxide semiconductor field effect transistor integrated device according to claim 1 , wherein the thickness of the substrate is 100 μm to 5 mm. 9 .

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